DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 5, 7, 11, 12, and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2023/0236373 (“VERMEULEN”).
Regarding claim 1, VERMEULEN teaches a method of optically aligning a photonic wafer (par. [0271]), comprising: bonding a carrier wafer to a receptacle wafer comprising one or more receptacles for one or more corresponding photonic ICs (par. [0258]), wherein each of the one or more receptacles is configured to receive a respective connector for its corresponding photonic IC (par. [0102]); etching the receptacle wafer to form an optical path for each of the one or more receptacles (par. [0196]); and bonding the receptacle wafer to the photonic wafer comprising the one or more corresponding photonic ICs (par. [0265]).
Regarding claim 2, VERMEULEN teaches aligning each optical path of each of the one or more receptacles with a corresponding optical window of the one or more corresponding photonic ICs (pars. [0182]-[0184], [0203], [0244], [0258], [0283]).
Regarding claim 5, VERMEULEN teaches thinning the receptacle wafer before bonding the receptacle wafer to the photonic wafer (pars. [0147], [0201], [0226]).
Regarding claim 7, VERMEULEN teaches etching the receptacle wafer to form one or more mechanical alignment features for aligning one or more connectors (par. [0191]).
Regarding claim 11, VERMEULEN teaches an electronic module, comprising: a photonic IC (4706, 4708); and a receptacle configured to receive a connector for the photonic IC (4630, 4632), wherein the receptacle is wafer-bonded to the photonic IC (pars. [0265], [0271])).
Regarding claim 12, VERMEULEN teaches that the photonic IC comprises an optical window, wherein the receptacle comprises an optical path aligned with the optical window, and wherein the optical path is etched through the receptacle (pars. [0182]-[0184], [0203], [0244], [0258], [0283]).
Regarding claim 18, VERMEULEN teaches a clip configured to secure the connector to the receptacle, wherein the receptacle and the connector are configured to optically align the connector with the photonic IC when the clip secures the connector to the receptacle (par. [0276]).
Regarding claim 19, VERMEULEN teaches that the electronic module is deployed in a transceiver device (par. [0169]).
Regarding claim 20, VERMEULEN teaches that the electronic module is deployed in a switch MCM (par. [0147]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over VERMEULEN in view of US 2002/0104622 (“DE”).
VERMEULEN teaches the limitations of the base claim 2. VERMEULEN does not teach that after bonding the receptacle wafer to the photonic wafer, the step of debonding the carrier wafer from the receptacle wafer. DE teaches after bonding a receptacle wafer to a photonic wafer, the step of debonding a carrier wafer from the receptacle wafer (pars. [0018], [0019]). It would have been obvious to one of ordinary skill in the art at the effective filing date to modify the method of VERMEULEN with the step of debonding the carrier wafer from the receptacle wafer, as taught by DE. The motivation would have been to allow for final device integration.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over VERMEULEN in view of US 2019/0086618 (“SHASTRI”).
VERMEULEN teaches the limitations of the base claim 1. VERMEULEN does not teach etching the receptacle wafer to form the optical path for each of the one or more receptacles while the receptacle wafer is bonded to the carrier wafer. SHASTRI teaches etching a receptacle wafer to form an optical path for each of one or more receptacles while the receptacle wafer is bonded to a carrier wafer (par. [0099]). It would have been obvious to one of ordinary skill in the art at the effective filing date to modify the method of VERMEULEN by etching the receptacle wafer to form the optical path for each of the one or more receptacles while the receptacle wafer is bonded to the carrier wafer, as taught by SHASTRI. The motivation would have been to provide mechanical protection for the wafers.
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over VERMEULEN in view of US 2023/0086908 (“LEE”).
VERMEULEN teaches the limitations of the base claim 7. VERMEULEN does not teach that the one or more mechanical alignment features extend into the receptacle wafer away from a surface for receiving the one or more connectors, or that the one or more mechanical alignment features protrude away from the receptacle wafer away from a surface for receiving the one or more connectors, wherein the carrier wafer comprises one or more cavities corresponding to and configured to receive the one or more mechanical alignment features.
LEE teaches that one or more mechanical alignment features extending into a receptacle wafer away from a surface for receiving one or more connectors, or that the one or more mechanical alignment features protrude away from the receptacle wafer away from a surface for receiving the one or more connectors, wherein a carrier wafer comprises one or more cavities corresponding to and configured to receive the one or more mechanical alignment features (pars. [0188]-[0192]). It would have been obvious to one of ordinary skill in the art at the effective filing date to modify the method of VERMEULEN such that the one or more mechanical alignment features extend into the receptacle wafer away from a surface for receiving the one or more connectors, or that the one or more mechanical alignment features protrude away from the receptacle wafer away from a surface for receiving the one or more connectors, as taught by LEE. The motivation would have been to improve reception of the connectors.
Claims 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over VERMEULEN in view of US 2016/0131833 (“PITWON”).
Regarding claim 13, VERMEULEN teaches the limitations of the base claim 12. VERMEULEN does not teach that the optical path comprises adhesive bleeding stoppers configured to prevent adhesive securing the connector to the receptacle from entering the optical path. PITWON teaches adhesive bleeding stoppers configured to prevent adhesive securing the connector to the receptacle from entering the optical path (par. [0070]). It would have been obvious to one of ordinary skill in the art at the effective filing date to modify the module of VERMEULEN with the adhesive bleeding stoppers configured to prevent adhesive securing the connector to the receptacle from entering the optical path, as taught by PITWON. The motivation would have been to prevent undesired bleeding of excess adhesive.
Regarding claim 14, VERMEULEN teaches that the receptacle comprises one or more mechanical alignment features (2502, 2504) for aligning the connector with the photonic IC.
Regarding claim 15, VERMEULEN teaches that the one or more mechanical alignment features are formed via etching the receptacle (par. [0189]).
Claims 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over VERMEULEN in view of PITWON as applied to claim 14 above, and further in view of LEE.
VERMEULEN in view of PITWON renders obvious the limitations of the base claim 14. VERMEULEN does not teach that the one or more mechanical alignment features extend into the receptacle wafer away from a surface for receiving the one or more connectors, or that the one or more mechanical alignment features protrude away from the receptacle wafer away from a surface for receiving the one or more connectors. LEE teaches that one or more mechanical alignment features extending into a receptacle wafer away from a surface for receiving one or more connectors, or that the one or more mechanical alignment features protrude away from the receptacle wafer away from a surface for receiving the one or more connectors, wherein a carrier wafer comprises one or more cavities corresponding to and configured to receive the one or more mechanical alignment features (pars. [0188]-[0192]). It would have been obvious to one of ordinary skill in the art at the effective filing date to modify the module of VERMEULEN such that the one or more mechanical alignment features extend into the receptacle wafer away from a surface for receiving the one or more connectors, or that the one or more mechanical alignment features protrude away from the receptacle wafer away from a surface for receiving the one or more connectors, as taught by LEE. The motivation would have been to improve reception of the connectors.
Allowable Subject Matter
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record, whether taken individually or in combination, when considered in light of the claimed subject matter as a whole as interpreted in light of the Specification as originally filed, fails to disclose or render obvious that after bonding the receptacle wafer to the photonic wafer, a step of simultaneously dicing the receptacle wafer and the photonic wafer to form the one or more receptacles and the one or more corresponding photonic ICs.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JERRY M BLEVINS whose telephone number is (571)272-8581. The examiner can normally be reached Monday - Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached at 571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JERRY M BLEVINS/Primary Examiner, Art Unit 2874
Prosecution Insights