DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Applicant’s Admitted Prior Art (AAPA)(Paragraph 28 of Applicant’s Specification) in view of US 2025/0277933 to Yu et al.
AAPA discloses in paragraph 28, a method of assembling a connector for an IC, the method comprising:
Aligning an optical path window while transmitting signals through a first connector and receptacle and testing the optical signals;
Securing the receptacle to the IC using a first adhesive.
However, AAPA fails to explicitly disclose a second adhesive portion. It is noted that Applicant appears to disclose in paragraph 29 of the Specification that the application of a second adhesive occurs at a later production step. It is unclear if this is a completely different material composition for the adhesive or if applicant intended to claim a second adhesive application at a step different from the first.
Yu discloses the use of a second adhesive layer (paragraph 98) to accommodate different heights.
It would have been obvious to one having ordinary skill in the art to provide two different adhesives as taught by Yu in AAPA to account for differing heights.
Claim(s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over AAPA in view of Yu as applied to claims above, and further in view of US 10,234,644 to Butler et al.
AAPA in view of Yu discloses the invention as claimed except for flip-chip and reflow processes. It is noted that these processes are common in the art.
Butler discloses such a process (column 8, lines 1-8) as an optimized production process.
It would have been obvious to one having ordinary skill in the art to add a flip-chip and reflow process to properly manufacture a photonic IC to maximize footprint.
Claim(s) 4-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 10,234,644 to Butler et al.
Butler discloses in the abstract and figures 1-13, an optical device that comprises a photonic IC (OE-IC), with multiple surfaces, an adhesive layer (95) and connector portions (240; figure 13G) and wherein the material is between surfaces (figure 13G).
As to dependent claims relating to alignment features, such are disclosed as verniers (330). Further, “bleeding stoppers” are not defined. Any vertical face could be considered a bleeding stopper in the prior art.
However, Butler fails to explicitly disclose window locations. Butler discloses numerous portions that could be considered windows, such as in figure 10B where the chip meets the waveguide structure.
It would have been obvious to one having ordinary skill in the art to arrange the window to match complimentary components to enable proper optical signal transmission.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2018/0045882 (figure 4A).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eric K Wong whose telephone number is (571)272-2363. The examiner can normally be reached M-Tu, Th-F 8A-6P.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached on 571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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ERIC K. WONG
Primary Examiner
Art Unit 2874
/Eric Wong/Primary Examiner, Art Unit 2874
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