DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4-6, 8, 9, 12, 13, 14 and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Ahi et al (US Pub. 2024/0070846) in view of Fujii (US Pub. 2020/0390013).
With respect to claim 8, Ahi discloses A wafer inspection method (see Abstract) comprising:
obtaining a reference profile regarding a wafer by capturing a reference image and quantifying the reference image; obtaining an inspection profile regarding the wafer by capturing an inspection image and quantifying the inspection image; and performing a wafer surface inspection based on a difference between the reference profile and the inspection profile, (see paragraph 0025, wherein …the image processing scoring system 314 can compare the reference image to the wafer images…; paragraph 0027, wherein …in a block 403 of FIG. 4, can generate image processing scores for each of the wafer images 301 based on the comparison of the reference image to the wafer images…; and paragraph 0006 wherein …can capture images of the patterns from silicon wafers. The resulting wafer images can be utilized to inspect a quality of the lithographed patterns, detect defects and analyze the root causes that have led to the defects…),
[wherein the reference image comprises a reference wafer and an identification tag, and
wherein the inspection image comprises an inspection target wafer and the identification tag, and wherein the performing of the wafer surface inspection comprises obtaining a profile of the wafer surface based on the difference between the reference profile and the inspection profile], as claimed.
However, Ahi fails to explicitly disclose [wherein the reference image comprises a reference wafer and an identification tag, and wherein the inspection image comprises an inspection target wafer and the identification tag, and wherein the performing of the wafer surface inspection comprises obtaining a profile of the wafer surface based on the difference between the reference profile and the inspection profile], as claimed.
Fujii teaches [wherein the reference image comprises a reference wafer and an identification tag, and wherein the inspection image comprises an inspection target wafer and the identification tag, and wherein the performing of the wafer surface inspection comprises obtaining a profile of the wafer surface based on the difference between the reference profile and the inspection profile], (see paragraph 0036, wherein …mark camera 54 captures image of ID mark…and acquires the wafer…CPU 61 reads pickup position coordinates corresponding to a wafer type based on the acquired wafer ID from HDD…; paragraph 0028, wherein …an ID mark indicating a base material ID attached to a predetermined position on base material S or an ID mark indicating wafer ID attached to a predetermined position on wafer pallet 13; and paragraph 0039, wherein …In the imaging processing, CPU 61 compares a reference image of normal die D with a captured image and determines whether die D is missing, whether there is a shape failure such as crack or chip, or whether there is a skip mark added to a top surface of die D…), as claimed.
It would have been obvious to one ordinary skilled in the art at the effective date of invention to combine the two references as they are analogous because they are solving similar problem of wafer inspection using image analysis. Teaching of Fujii to have an ID that associate various information regarding the wafer that is capture during the inspection of a wafer can be incorporated in to the Ahi’s system as suggested in figure 5, numerical 501 of Ahi, for suggestion, and modifying the system will yield more accurate and speedy inspection of the wafer (see paragraph 0004 for Fujii), for motivation.
With respect to claim 9, combination of Ahi and Fujii further discloses wherein the obtaining the reference profile comprises quantifying a first region occupied by the identification tag included in the reference image, and wherein the obtaining the inspection profile comprises quantifying a second region occupied by the identification tag in the inspection image, (see Fujii figure 15, step S610 “reference image” and S615 “inspection image”), as claimed.
With respect to claim 12 and 13, combination of Ahi and Fujii further discloses wherein the performing the wafer surface inspection comprises comparing a measured profile of the wafer surface with a reference wafer surface profile; and when a difference between the measured profile of the wafer surface and the reference wafer surface profile is greater than a preset threshold value, determining that the inspection target wafer is defective, and when the difference between the measured profile of the wafer surface and the reference wafer surface profile is less than the preset threshold value, determining that the inspection target wafer is normal, (see Ahi paragraph 0028, wherein …image defect detection system 310 can include a defect detection system 316 that, in a block 404 of FIG. 4, can filter the wafer images 301 based, at least in part, on image processing scores. In some embodiments, the defect detection system 316 can determine which of the wafer images 301 have image processing scores falling below a threshold score value, which indicates the pixels in the corresponding wafer image 301 deviate from the reference image over a threshold level…), as claimed.
With respect to claim 14, combination of Ahi and Fujii further discloses wherein the identification tag is located at a vertical level higher than the wafer, (see Fujii figure 3, numerical 19), as claimed.
Claim 1 is rejected for the same reasons as set forth in the rejections for claim 8, because claim 1 is claiming subject matter of similar scope and is encompasses by the scope of claim 8.
With respect to claim 2, combination of Ahi and Fujii further discloses wherein the identification tag comprises at least one of a character and a figure, (see Fujii paragraph 0044, wherein …wafer W having a wafer ID of “W-A1-001”…), as claimed.
With respect to claim 4, combination of Ahi and Fujii further discloses wherein the obtaining the inspection profile comprises quantifying at least one of the character and the figure included in the identification tag in the inspection image, (see Fujii paragraph 0044, wherein …wafer W having a wafer ID of “W-A1-001”…), as claimed.
With respect to claims 5 and 6, combination of Ahi and Fujii further discloses obtaining a reference profile that is a reference for the surface inspection of the wafer; and wherein the performing the surface inspection of the wafer comprises obtaining a profile of the wafer surface, based on a difference between the reference profile and the inspection profile, (see Ahi paragraph 0025, wherein …the image processing scoring system 314 can compare the reference image to the wafer images…; paragraph 0027, wherein …in a block 403 of FIG. 4, can generate image processing scores for each of the wafer images 301 based on the comparison of the reference image to the wafer images…; and paragraph 0006 wherein …can capture images of the patterns from silicon wafers. The resulting wafer images can be utilized to inspect a quality of the lithographed patterns, detect defects and analyze the root causes that have led to the defects…), as claimed.
Claim 17 is rejected for the same reasons as set forth in the rejections for claim 8, because claim 17 is claiming subject matter of similar scope and is encompasses by the scope of claim 8.
With respect to claims 18 and 19, combination of Ahi and Fujii further discloses wherein the inspecting the wafer comprises: obtaining a reference profile for the surface inspection of the wafer; and obtaining a surface profile of the wafer, based on a difference between the reference profile and the inspection profile; and wherein the reference profile is obtained by quantifying a reference image obtained by capturing a reference wafer and the identification tag, (see Ahi paragraph 0025, wherein …the image processing scoring system 314 can compare the reference image to the wafer images…; paragraph 0027, wherein …in a block 403 of FIG. 4, can generate image processing scores for each of the wafer images 301 based on the comparison of the reference image to the wafer images…; and paragraph 0006 wherein …can capture images of the patterns from silicon wafers. The resulting wafer images can be utilized to inspect a quality of the lithographed patterns, detect defects and analyze the root causes that have led to the defects…), as claimed.
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Ahi et al (US Pub. 2024/0070846) in view of Fujii (US Pub. 2020/0390013) as applied to claim 8 above, and further in view of Fenske et al (US Pub. 2012/0255795).
With respect to claim 10, combination of Ahi and Fujii discloses all the elements of the claim limitations as claimed and rejected above in claim 8. However, they fail to explicitly disclose wherein the profile of the wafer surface comprises information on at least one of a foreign substance and a chemical solution on the wafer, as claimed.
Fenske teaches wherein the profile of the wafer surface comprises information on at least one of a foreign substance and a chemical solution on the wafer, (see paragraph 0093-0094, for obtaining images and finding the defects such as particle, scratch etc.), as claimed.
It would have been obvious to one ordinary skilled in the art at the effective date of invention to combine the two references as they are analogous because they are solving similar problem of wafer inspection using image analysis. Teaching of Fenske to find defects such as particles “foreign substance” can be incorporated in to the Ahi’s system as suggested in figure 4, for suggestion, and modifying the system will yield a wafer inspection for foreign particles, for motivation.
With respect to claim 11, combination of Ahi, Fujii and Fenske further discloses wherein at least a portion of the identification tag in the inspection image is obscured by at least one of the foreign substance and the chemical solution on the wafer, (see Fenske paragraph 0007, wherein …When imaging a wafer, in order to obtain "before" and "after" images that can be easily compared with each other, the wafer must be aligned relative to a fiduciary mark (such as notch or flat) “tag” before image capture by a camera …), as claimed.
Claims 3, 7, 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Ahi et al (US Pub. 2024/0070846) in view of Fujii (US Pub. 2020/0390013) as applied to claim 8 above, and further in view of Nishi (JP 2000031050).
With respect to claim 15, combination of Ahi and Fujii discloses all the elements of the claim limitations as claimed and rejected above in claim 8. However, they fail to explicitly disclose wherein a first horizontal width of the identification tag is greater than a second horizontal width of the wafer, as claimed.
Nishi teaches wherein a first horizontal width of the identification tag is greater than a second horizontal width of the wafer, (see figure 10, barcode as ID which is different width), as claimed.
It would have been obvious to one ordinary skilled in the art at the effective date of invention to combine the two references as they are analogous because they are solving similar problem of wafer inspection using image analysis. Teaching of Nishi to have an ID i.e. barcode with various width can be incorporated into the Ahi and Fujii system as suggested in figure 3, numerical 19 of Fujii, for suggestion, and modifying the system will yield barcode marking for the wafer, for motivation.
With respect to claim 16, combination of Ahi, Fujii and Nishi discloses wherein the reference wafer comprises a bare wafer, (see Nishi translation page 12 paragraph 5, wherein … It is assumed that, in response to a command from the host computer HCOM, a reticle R for first printing to be used and a lot of bare silicon wafers W to be processed are mounted on the stepper EXP), as claimed.
Claim 3 is rejected for the same reasons as set forth in the rejections for claim 15, because claim 3 is claiming subject matter of similar scope and is encompasses by the scope of claim 15. Furthermore, Nishi discloses as barcode see figure 10.
Claim 7 is rejected for the same reasons as set forth in the rejections for claim 15, because claim 7 is claiming subject matter of similar scope and is encompasses by the scope of claim 15.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over over Ahi et al (US Pub. 2024/0070846) in view of Fujii (US Pub. 2020/0390013) as applied to claim 17 above, and further in view of Sanada (US 5,843,527).
With respect to claim 20, combination of Ahi and Fujii discloses all the elements of the claim limitations as claimed and rejected above in claim 17. However, they fail to explicitly disclose wherein the performing the semiconductor process on the wafer comprises: applying a chemical solution on the wafer; and dispersing the chemical solution by rotating the wafer, and wherein the inspecting the wafer comprises inspecting a distribution of the chemical solution on the wafer, as claimed.
Sanada teaches the performing the semiconductor process on the wafer comprises: applying a chemical solution on the wafer; and dispersing the chemical solution by rotating the wafer, and wherein the inspecting the wafer comprises inspecting a distribution of the chemical solution on the wafer, (see Abstract; col. 53, lines 5-8, wherein … still picture is stored as a reference still picture in the image memory 55. This reference still picture is compared with still pictures obtained subsequently…; col. 11, lines 55-65, wherein …to pick up images of spreading behavior of the coating solution by means of a high-speed video camera or the like…), as claimed.
It would have been obvious to one ordinary skilled in the art at the effective date of invention to combine the two references as they are analogous because they are solving similar problem of wafer inspection using image analysis. Teaching of Sanada to inspect a wafer for the chemical solution coating can be incorporated into the Ahi and Fujii system as suggested by Ahi paragraph 0001, for suggestion, and modifying the system will yield a chemical distribution inspection for the wafer, for motivation.
Conclusion
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/VIKKRAM BALI/ Primary Examiner, Art Unit 2663