DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed on 12/23/2024 has been considered and placed of record in the file.
Oath/Declaration
The Oath or Declaration is being considered by examiner and complies with PTO requirements.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Devarajan et al. US 9,294,112.
Consider claim 1, Devarajan discloses A calibration apparatus (see FIG. 2 and col. 3 lines 22-23) comprising:
a calibration circuit (see FIG. 2, combination of digital error corrector 206 and error compensation feedback path 212), arranged to perform a calibration process upon a time-interleaved analog-to-digital converter (TI-ADC) with a plurality of TI channels (see FIG. 2 and col. 3 lines 45-61, wherein digital error corrector 206 and error compensation feedback path 212 perform calibration process upon a time-interleaved analog-to-digital converters with a plurality of IT channels i.e. ADC_0 102 and ADC_1 104 ), wherein the calibration process comprises detecting and correcting mismatch between different TI channels of the TI-ADC (see col. 3 lines 24-26 and lines 45-61); and
a singularity detection (SD) circuit (see FIG. 2, error estimator 204), arranged to set an SD flag by evaluating variation of statistical characteristics of an ADC input signal between different TI channels of the TI-ADC, and output the SD flag to the calibration circuit (see FIG. 2 and col. 3 lines 34-61, wherein the error estimator 204 determine an error coefficient i.e. an SD flag, by estimate mismatch between sub-ADCs by statically measuring differences between the digital outputs of ADC_0 102 and ADC_1 104, and output the estimated error coefficient to the digital error corrector 206 and the error compensation feedback path 212 to reduce the estimated mismatch), wherein the calibration circuit is further arranged to control the calibration process according to the SD flag (see FIG. 2 and col. 3 lines 45-61, wherein the digital error corrector 206 and error compensation feedback path 212 are controlled by the error coefficient for the calibration process).
Claim 9 is rejected on the same ground as for claim 1 because of similar scope.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Devarajan et al. US 9,294,112.
Consider claim 2, Devarajan discloses every claimed limitation in claim 1.
Although Devarajan does not explicitly disclose wherein the calibration process is a blind calibration process. Devarajan discloses the calibration process that statically measures the differences between digital outputs of the two sub-ADCs i.e. ADC_0 102 and ADC_1 104 (see col. 3 lines 35-42). And as according to the Specification of the Application in ¶ [0020], the blind calibration process that extracts the statistical characteristic of the ADC input for detecting mismatch. Therefore, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify the invention of Devarajan to include wherein the calibration process is a blind calibration process (see col. 3 lines 35-42), since the calibration process of Devarajan is similar to the blind calibration process as disclosed in the Specification.
Claim 10 is rejected on the same ground as for claim 2 because of similar scope.
Allowable Subject Matter
Claims 3-8 and 11-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Molian et al. US 10,601,434.
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/JANICE N TIEU/Primary Examiner, Art Unit 2633