DETAILED ACTION
I. Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
II. Response to Amendment
The response, filed March 11, 2026, has been entered and made of record. Claims 1,3-6,8,10-12,14, and 16-18 are pending in the application.
III. Response to Arguments
Applicant's arguments regarding amended independent claims 1,8, and 14 and the combination of Keskikangas et al. and Maeshima et al. and the combination of Keskikangas et al. and Kussela et al. have been fully considered but they are not persuasive. Applicant challenges the examiner’s combinations on the grounds that they fail to suggest a configuration where PSRAM and SRAM are utilized in a manner that exploits the larger storage capacity of PSRAM, noting that the instant application uses PSRAM to leverage its large capacity. Accordingly, in asserting the advantages of PSRAM when combining Keskikangas et al. and Maseshima et al., Applicant alleges an improper use of hindsight. The examiner respectfully disagrees with Applicant’s position.
“Any judgment on obviousness is in a sense necessarily a reconstruction based on hindsight reasoning, but so long as it takes into account only knowledge which was within the level of ordinary skill in the art at the time the claimed invention was made and does not include knowledge gleaned only from applicant’s disclosure, such a reconstruction is proper.” In re McLaughlin, 443 F.2d 1392, 1395 (CCPA 1971). The examiner submits that following facts compelled a conclusion of obviousness based on Keskikangas et al., Maeshima et al., and Kuusela et al.: The prior art discloses a camera that uses PSRAM as a frame memory, much like Keskikangas’s pre-event buffer, and the relative advantages of PSRAM and SRAM are also understood by one of ordinary skill in the art, which the examiner gleaned through a cursory review of the Wikipedia® pages of SRAM1 and DRAM2 (discusses PSRAM). Furthermore, since Keskikangas et al. specifically discusses a number of different random access memories that can be used as the pre-event buffer, the examiner finds highly unlikely that PSRAM was not under consideration by Keskikangas et al. The reference’s failure to list PSRAM as an exemplary buffer does not then more precisely place the examiner’s judgment within the crosshairs of hindsight when importing the PSRAM from Maeshima et al., especially the Maeshima et al. discloses its use as a frame memory.
Applicant further asserts that the inclusion of PSRAM in Keskikangas’s system raises the possibility of higher power consumption, and without any discussion of a solution to mitigate this increase in power consumption by the prior art, one of ordinary skill in the art would not be motivated to make such a substitution. First, the examiner disputes the assertion that PSRAM requires consumes more power than SRAM. After reviewing literature on the differences between PSRAM of SRAM, it appears that PSRAM generally consumes less power than SRAM during reading and writing3. Second, even if PSRAM does consume more power than SRAM, this fact would not undermine the examiner’s conclusion. A conclusion of obviousness does not require that the resultant system operate with optimal efficiency. Rather, a sufficient rationale to support a conclusion that the claim would have been obvious is that all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions and that the combination yielded nothing more than predictable results to one of ordinary skill in the art. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Given Keskikangas’s indifference toward a specific type of random access memory as the pre-event buffer, Maeshima’s disclosure of PSRAM as a frame memory, Kuusela’s use of SRAM to store reference image data during compression, and the known relative advantages of PSRAM and SRAM, the examiner submits that the combinations of Keskikangas et al., Maeshima et al., and Kuusela et al. presented in the previous Office action are appropriate conclusions of obviousness.
IV. Claim Rejections - 35 USC § 103
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1,3-6,8,10-12,14, and 16-18 are rejected under 35 U.S.C. 103 as being
unpatentable over Keskikangas et al. (US 2022/0286621 A1) in view of Maeshima et al. (US # 6,211,909 B1) and further in view of Kuusela et al. (US 2021/0021859 A1).
As to claim 1, Keskikangas et al. teaches a pre-roll circuit (Fig. 1, pre-event buffer “112” and compression circuit “114”) for an image sensing system (e.g., Fig. 1, image capturing unit “104”), the pre-roll circuit being configured to receive a pre-stored image data through an image sensor ([0067], lines 1-3) and provide the pre-stored image data to a camera (Fig. 1, camera “100”; {The circuitry of camera “100” downstream from the pre-event buffer “112” is read as the claimed camera.}; [0088], lines 1-10), the pre-roll circuit comprising:
a first memory (Fig. 1, pre-event buffer “112”), configured to store the pre-stored image data ([0067], lines 1-3; {The pre-event image frames are read as the claimed pre-stored image data.}); and
a compressor circuit (Fig. 1, compression unit “114”), coupled to the first memory (Fig. 1), configured to compress the pre-stored image data before the pre-stored image data is stored into the first memory ([0070], lines 1-10).
Claim 1 differs from Keskikangas et al. in that it requires (1) that the first memory is a pseudo static random access memory (PSRAM), (2) that the pre-roll circuit includes a second memory configured to store a reference frame data among the pre-stored image data, (3) that the second memory is a static random access memory (SRAM), and (4) that a storage capacity of the PSRAM is larger than a storage capacity of the SRAM.
However, in the same field of endeavor as the instant application, Maeshima et al. discloses a camera (Fig. 9) having a PSRAM frame memory (1) (Fig. 9, frame memory “33”; col. 6, line 2) that receives image data from an image sensor (Fig. 9, image sensor “30”) before transfer to downstream camera circuitry (Fig. 9; col. 6, lines 1-6). In light of the teaching of Maeshima et al., the examiner submits that it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to design Keskikangas’ pre-event buffer as a PSRAM because it provides large memory space with comparatively lower cost and lower power consumption.
Further in the same field of endeavor as the instant application, Kuusela et al. teaches a mobile device (Fig. 2; [0029], lines 5-10) with image capturing functionality (Fig. 2, image sensing device “220”) and with video compression functionality (e.g., Fig. 3). The video compression hardware includes a local SRAM that stores a reference frame for inter-frame compression (2), (3) ([0051] and [0054]). In light of the teaching of Kuusela et al., the examiner submits that it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to include a SRAM in Keskikangas’s compression unit that stores a reference frame used to compress subsequent pre-event frames because inter-frame compression is a robust encoding algorithm that can significantly reduce file sizes with real-time efficiency. Also, one of ordinary skill would recognize the comparative advantages of using an SRAM to store the inter-frame, like simplistic design and increased read/write speed.
(4) The examiner submits that PSRAM inherently has a higher storage density than SRAM. Therefore, by the combination of Keskikangas et al., Maeshima et al., and Kuusela et al., the PSRAM imported by Keskikangas et al. from Maeshima et al. has a larger storage capacity than the SRAM imported by Keskikangas et al. from Kuusela et al.
As to claim 3, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the pre-roll circuit of claim 1, wherein the camera comprises:
a decompressor circuit, configured to decompress the pre-stored image data received from the first memory (see Keskikangas et al., [0092], lines 7-10).
As to claim 4, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the pre-roll circuit of claim 1, wherein the pre-roll circuit is coupled to a motion sensor, and the motion sensor is configured to wake up the camera when detecting a moving object (see Keskikangas et al., [0079], lines 1-7; {The waking of the camera is the receipt of the first signal “120”}).
As to claim 5, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the pre-roll circuit of claim 4, wherein the camera starts to receive a real-time image data from the image sensor (see Keskikangas et al., [0084]; {The post-event image frames are read as the claimed real-time image data.}) and receive the pre-stored image data from the first memory ([0088], lines 1-10) when the camera is woken up by the motion sensor (see Keskikangas et al., e.g., [0086]).
As to claim 6, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the pre-roll circuit of claim 1, wherein the compressor circuit compresses an input frame data among the pre-stored image data according to the reference frame data (see Kuusela et al., [0054]).
As to claim 8, Keskikangas et al. teaches an image sensing system (Fig. 1, camera “100”), comprising:
an image sensor (Fig. 1, image capturing unit “104:), configured to obtain a plurality of image data ([0067], lines 1-3; [0084]; {The pre-event image frames and the post-event image frames are read as the claimed plurality of image data.});
a camera (Fig. 1; {The circuitry of camera “100” downstream from the pre-event buffer “112” is read as the claimed camera.}), coupled to the image sensor (Fig. 1), configured to receive a real-time image data among the plurality of image data from the image sensor ([0084]);
a motion sensor, coupled to the camera, configured to wake up the camera when detecting a moving object ([0079], lines 1-7; {The waking of the camera is the receipt of the first signal “120”}); and
a pre-roll circuit (Fig. 1, pre-event buffer “112” and compression circuit “114”), coupled to the image sensor and the camera (Fig. 1), configured to receive a pre-stored image data among the plurality of image data from the image sensor ([0067], lines 1-3) and provide the pre-stored image data to the camera ([0088], lines 1-10), the pre-roll circuit comprising:
a first memory (Fig. 1, pre-event buffer “112”), configured to store the pre-stored image data ([0067], lines 1-3); and
a compressor circuit (Fig. 1, compression unit “114”), coupled to the first memory (Fig. 1), configured to compress the pre-stored image data before the pre-stored image data is stored into the first memory ([0070], lines 1-10).
Claim 8 differs from Keskikangas et al. in that it requires (1) that the first memory is a pseudo static random access memory (PSRAM), (2) that the pre-roll circuit includes a second memory configured to store a reference frame data among the pre-stored image data, (3) that the second memory is a static random access memory (SRAM), and (4) that a storage capacity of the PSRAM is larger than a storage capacity of the SRAM.
However, in the same field of endeavor as the instant application, Maeshima et al. discloses a camera (Fig. 9) having a PSRAM frame memory (1) (Fig. 9, frame memory “33”; col. 6, line 2) that receives image data from an image sensor (Fig. 9, image sensor “30”) before transfer to downstream camera circuitry (Fig. 9; col. 6, lines 1-6). In light of the teaching of Maeshima et al., the examiner submits that it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to design Keskikangas’ pre-event buffer as a PSRAM because it provides large memory space with comparatively lower cost and lower power consumption.
Further in the same field of endeavor as the instant application, Kuusela et al. teaches a mobile device (Fig. 2; [0029], lines 5-10) with image capturing functionality (Fig. 2, image sensing device “220”) and with video compression functionality (e.g., Fig. 3). The video compression hardware includes a local SRAM that stores a reference frame for inter-frame compression (2), (3) ([0051] and [0054]). In light of the teaching of Kuusela et al., the examiner submits that it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to include a SRAM in Keskikangas’s compression unit that stores a reference frame used to compress subsequent pre-event frames because inter-frame compression is a robust encoding algorithm that can significantly reduce file sizes with real-time efficiency. Also, one of ordinary skill would recognize the comparative advantages of using an SRAM to store the inter-frame, like simplistic design and increased read/write speed.
(4) The examiner submits that PSRAM inherently has a higher storage density than SRAM. Therefore, by the combination of Keskikangas et al., Maeshima et al., and Kuusela et al., the PSRAM imported by Keskikangas et al. from Maeshima et al. has a larger storage capacity than the SRAM imported by Keskikangas et al. from Kuusela et al.
As to claim 10, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the image sensing system of claim 8, wherein the camera comprises:
a decompressor circuit, configured to decompress the pre-stored image data received from the first memory (see Keskikangas et al., [0092], lines 7-10).
As to claim 11, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the image sensing system of claim 8, wherein the camera starts to receive the real-time image data from the image sensor (see Keskikangas et al., [0084]) and receive the pre-stored image data from the first memory ([0088], lines 1-10) when the camera is woken up by the motion sensor (see Keskikangas et al., e.g., [0086]).
As to claim 12, its body limitations are the same or effectively the same as those of claim 6. Therefore, it is rejected as detailed above.
As to claim 14, Keskikangas et al. teaches an image sensing method, comprising:
obtaining a plurality of image data ([0067], lines 1-3; [0084]; {The pre-event image frames and the post-event image frames are read as the claimed plurality of image data.});
receiving a pre-stored image data among the plurality of image data ([0067], lines 1-3);
compressing the pre-stored image data ([0070], lines 1-10) and storing the pre-stored image data after being compressed ([0067], lines 1-3) in a first memory (Fig. 1, pre-event buffer “112”);
waking up a camera when detecting a moving object ([0079], lines 1-7), to receive a real-time image data among the plurality of image data ([0084]); and
providing the pre-stored image data stored in the first memory to the camera ([0088], lines 1-10).
Claim 14 differs from Keskikangas et al. in that it requires (1) that the first memory is a pseudo static random access memory (PSRAM), (2) that the image sensing method further includes the step of storing a reference frame data among the pre-stored image data in a second memory, (3) that the second memory is a static random access memory (SRAM), and (4) that a storage capacity of the PSRAM is larger than a storage capacity of the SRAM.
However, in the same field of endeavor as the instant application, Maeshima et al. discloses a camera (Fig. 9) having a PSRAM frame memory (1) (Fig. 9, frame memory “33”; col. 6, line 2) that receives image data from an image sensor (Fig. 9, image sensor “30”) before transfer to downstream camera circuitry (Fig. 9; col. 6, lines 1-6). In light of the teaching of Maeshima et al., the examiner submits that it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to design Keskikangas’ pre-event buffer as a PSRAM because it provides large memory space with comparatively lower cost and lower power consumption.
Further in the same field of endeavor as the instant application, Kuusela et al. teaches a mobile device (Fig. 2; [0029], lines 5-10) with image capturing functionality (Fig. 2, image sensing device “220”) and with video compression functionality (e.g., Fig. 3). The video compression hardware includes a local SRAM that stores a reference frame for inter-frame compression (2), (3) ([0051] and [0054]). In light of the teaching of Kuusela et al., the examiner submits that it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to include a SRAM in Keskikangas’s compression unit that stores a reference frame used to compress subsequent pre-event frames because inter-frame compression is a robust encoding algorithm that can significantly reduce file sizes with real-time efficiency. Also, one of ordinary skill would recognize the comparative advantages of using an SRAM to store the inter-frame, like simplistic design and increased read/write speed.
(4) The examiner submits that PSRAM inherently has a higher storage density than SRAM. Therefore, by the combination of Keskikangas et al., Maeshima et al., and Kuusela et al., the PSRAM imported by Keskikangas et al. from Maeshima et al. has a larger storage capacity than the SRAM imported by Keskikangas et al. from Kuusela et al.
As to claim 16, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the image sensing method of claim 14, wherein the camera decompresses the pre-stored image data received from the first memory (see Keskikangas et al., [0092], lines 7-10).
As to claim 17, Keskikangas et al., as modified by Maeshima et al. and Kuusela et al., teaches the image sensing method of claim 14, wherein the camera starts to receive the real-time image data ([0084]) and receive the pre-stored image data from the first memory (see Keskikangas et al., [0088], lines 1-10) when the camera is woken up by the motion sensor (see Keskikangas et al., e.g., [0086]).
As to claim 18, its body limitations are the same or effectively the same as those of claim 6. Therefore, it is rejected as detailed above.
V. Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY J DANIELS whose telephone number is (571)272-7362. The examiner can normally be reached M-F 9:00 AM - 5:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at 571-272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANTHONY J DANIELS/Primary Examiner, Art Unit 2637
5/1/2026
1 https://en.wikipedia.org/wiki/Static_random-access_memory
2 https://en.wikipedia.org/wiki/Dynamic_random-access_memory#PSRAM
3 https://electroniccomponent.com/memory-selection-guide-the-differences-between-dram-sram-nor-flash-and-nand-flash/
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