DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The Information Disclosure Statement filed on September 20, 2024 is considered.
Claim Objections
Claims 1, 8 and 15 are objected to because of the following informalities: claims 1, 8 and 15 each recite “analyzing a pattern of the suspend schedule command”, which should be – analyzing a pattern of a suspend schedule command – to be corrected. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 8-12 and 15-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jung et al. (US Pub. 2020/0026465 A1).
Regarding claim 1, Jung discloses a memory system (figure 1, 10), comprising: a memory device (figure 1, 120); and a memory controller (figure 1, 110) connected to the memory device, wherein the memory controller is configured to: analyze a pattern of the suspend schedule command a plurality of times to obtain a plurality of analysis results ([0068], write control component 20 may also analyze the workload by considering a time interval between the read commands and the size of read data, or other factor indicating the processing of read commands relative to other in order to analyze the tendency of the host commands); select an operating mode from among a plurality of operating modes based on the plurality of analysis results, the plurality of operating modes comprising a latency mode and a throughput mode ([0069]-[0070], write control component 20 may select the first write mode, read as latency mode, or deprived write command execution, read as throughput mode); determine a suspend schedule based on the operating mode ([0071]-[0072], it is determined whether the write commands are being held for a relatively long period of time or both write and read commands are provided and the workload is not deprived of write command execution); and perform a memory operation on the memory device based on the suspend schedule, the memory operation comprising at least one of a read operation or a write operation ([0071]-[0072], the write control component 20 may select the first write mode to execute the held write commands when it is determined that a mix of write and read commands are provided and the workload is deprived of write command execution, and the write control component 20 may select the second write mode, e.g., the normal program mode, when both write and read commands are provided and the workload is not deprived of write command execution).
Regarding claim 2, Jung discloses that the memory controller is further configured to identify a suspend pattern included in the suspend schedule command ([0058] and [0063], the workload analyzer 203 may determine the tendency of the commands provided from the host device by referring to the parsing result of the command analyzer and may determine that the corresponding workload is deprived of write command execution).
Regarding claim 3, Jung teaches that the memory controller is further configured to change the suspend schedule in real time ([0060], write mode decision component 205 may select either the cache program mode or the normal program mode as the write mode based on the analysis result of the workload analyzer 203).
Regarding claims 4 and 5, Jung teaches that the memory controller is further configured to determine, based on the changing of the suspend schedule, a suspend latency based on a preset reference or a write resume time point latency based on a preset reference ([0061]-[0063], the write mode decision component 205 may select the cache program mode when the analysis result of the host commands indicates that they mostly include write commands, and when analysis of the host commands indicates that a mix of write and read commands are being provided, the write mode decision component 205 may select the normal program mode).
Regarding claim 8, the claimed limitations are rejected as the same reasons as set forth in claim 1.
Regarding claim 9, the claimed limitations are rejected as the same reasons as set forth in claim 2.
Regarding claim 10, the claimed limitations are rejected as the same reasons as set forth in claim 3.
Regarding claims 11-12, the claimed limitations are rejected as the same reasons as set forth in claims 4-5.
Regarding claim 15, the claimed limitations are rejected as the same reasons as set forth in claim 1.
Regarding claim 16, the claimed limitations are rejected as the same reasons as set forth in claim 2.
Regarding claim 17, the claimed limitations are rejected as the same reasons as set forth in claim 3.
Regarding claim 18, the claimed limitations are rejected as the same reasons as set forth in claims 4-5.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6-7, 13-14 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. (US Pub. 2020/0026465 A1) in view of Karr (US Pub. 2023/0393742 A1, herein after Karr).
Regarding claims 6-7, Jung differs from the claimed invention in not specifically disclosing that the memory controller is further configured to: based on a determination that a number of read operations is greater than a number of write operations based on the analysis of the pattern of the suspend schedule command: determine the suspend schedule based on the throughput mode; and determine the suspend schedule by grouping the read operations, and wherein the memory controller is further configured to: based on a determination that a number of read operations is less than a number of write operations based on the analysis of the pattern of the suspend schedule command: determine the suspend schedule based on the latency mode; and determine the suspend schedule, and maintain a pattern of the read operations. However, Karr teaches a scheduler may suspend the write operation to enable the storage device to perform one or more read operations to read data from the storage device ([0310]-[0311]) such that a processing logic completes the flash programming operation if the processing logic determines that the flash programming operation does not delay the read request by the threshold amount of time, i.e., determining the suspend schedule based on the throughput mode based on determining that a number of read operations is greater than a number of write operations based on the pattern of the suspend schedule command, and the processing logic determines if the flash programming operation can be interrupted upon determining that the flash programming operation delays the read request by the threshold amount of time, i.e., determining the suspend schedule based on the latency mode based on determining that a number of read operations is less than a number of write operations based on the pattern of the suspend schedule command,([0349]-[0351]) in order to reduce the latency and improve the performance of the storage system. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Jung, in having that the determining of the suspend schedule further comprises determining the suspend schedule based on the throughput mode, based on determining that a number of read operations is greater than a number of write operations based on the pattern of the suspend schedule command, wherein the suspend schedule is further determined by grouping the read operations, and determining the suspend schedule based on the latency mode based on determining that a number of read operations is less than a number of write operations based on the pattern of the suspend schedule command, and wherein the suspend schedule is determined to maintain a pattern of the read operations, as per teaching of Karr, in order to reduce the latency and improve the performance of the storage system.
Regarding claims 13-14, the claimed limitations are rejected as the same reasons as set forth in claims 6-7.
Regarding claims 19-20, the claimed limitations are rejected as the same reasons as set forth in claims 6-7.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Park et al. (US Pub. 2020/0257552 A1) discloses a memory controller including a processor configured to output an operation control signal when the memory device is performing a program/erase operation; and a suspend operation manager configured to output suspend mode change information based on the operation control signal and suspend information (abstract and figure 4).
McCrary (US Pub. 2021/0191730 A1) discloses a processing system includes a set of queues to store command buffers prior to execution in a corresponding plurality of pipelines (abstract and figure 3).
Hamilton et al. (US Pub. 2021/0034290 A1) discloses a method to improve handling of host-initiated requests in a memory sub-system by servicing high-priority read and/or write requests using standard datasheet commands associated with the type of memory component being used in the memory sub-system (abstract and figure 3).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHUO H LI whose telephone number is (571)272-4183. The examiner can normally be reached Mon. Tue. and Thurs. 8:00-4:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rocio Del Mar Perez-Velez can be reached at (571)-270-5935. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ZHUO H LI/Primary Examiner, Art Unit 2133