Non-Final Office Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites the limitation "the producing of the set of addresses" in line 2. There is insufficient antecedent basis for this limitation in the claim. Claim 1 does not recite a set of addresses or producing addresses. However, claim 2 recites an address generator configured to produce a set of addresses. Claim 3 should be dependent on claim 2 instead of claim 1.
Claim 14 recites the limitation "the producing of the set of addresses" in line 2. There is insufficient antecedent basis for this limitation in the claim. Claim 12 does not recite a set of addresses or producing addresses. However, claim 13 recites an address generator configured to produce a set of addresses. Claim 14 should be dependent on claim 13 instead of claim 12.
Allowable Subject Matter
Claims 1, 2, 4-13, and 15-20 are allowed.
Claims 3 and 14 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is an examiner’s statement of reasons for allowance. US 5,297,263 A discloses exception processing in a microprocessor pipeline. US 4,982,402 A discloses detecting and correcting errors in a pipelined computer system. US 2010/0131796 A1 (cited on IDS) discloses detecting and recovering from errors in an instruction stream.
With respect to claim 1, the prior art does not teach or reasonably suggest, in combination with the remaining limitations, a circuit device comprising: a processor core configured to execute an instruction that specifies a data stream that includes a first data element; and a cache memory configured to store a portion of the data stream; a cache controller coupled to the processor core and to the cache memory, wherein the cache controller includes: a set of fault registers, wherein the cache controller is configured to: detect a fault associated with the first data element; based on the fault, store an identifier of the fault in the set of fault registers; defer reporting of the fault to the processor core until the request is received; and in a debug mode, provide the identifier of the fault from the set of fault registers to a debugger.
With respect to claim 12, the prior art does not teach or reasonably suggest, in combination with the remaining limitations, a device comprising: a cache memory controller that includes: an interface configured to couple to a cache memory; a head register coupled to the interface and configured to couple to a processor core; and a set of fault registers; wherein the cache memory controller is configured to, based on an instruction that specifies a data stream: determine whether a fault occurred associated with a first data element of the data stream; based on the fault, store an identifier of the fault in the set of fault registers; defer reporting of the fault to the processor core until the request is received; and in a debug mode, provide the identifier of the fault from the set of fault registers.
With respect to claim 17, the prior art does not teach or reasonably suggest, in combination with the remaining limitations, a method comprising: receiving a stream open instruction that specifies a set of data; and based on the stream open instruction, performing by a cache controller: detecting a fault associated with the first data element; storing an identifier of the fault in a set of fault registers; delaying reporting of the fault to a processor core until a request is received from the processor core for the first data element; entering into a debug mode; and in the debug mode, providing the identifier of the fault.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL C MASKULINSKI whose telephone number is (571)272-3649. The examiner can normally be reached Monday-Friday 8:00 am-5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at (571) 272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL MASKULINSKI/Primary Examiner, Art Unit 2113