CTNF 18/893,028 CTNF 90408 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-34 AIA Claim s 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of U.S. Patent No. 12131402 . Although the claims at issue are not identical, they are not patentably distinct from each other because they are variance of each other. Below is the correspondence of their claims . Instant Application 1 2 3 4 5 6 7 8 9 10 U.S. Patent No. 12131402 1 2 3 4 5 1 1 8 9 10 Instant Application 11 12 13 14 15 16 17 18 19 20 U.S. Patent No. 12131402 11 12 8 8 15 16 17 18 19 15 Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1, 3-5, 8, 10-12, 15, 17-19 is/are rejected under 35 U.S.C. 102 (a)(1) as being unpatentable by Hartog et al. (US 2012/0194524 A1) . Regarding claim 1, Hartog teaches: A graphics processor ([0011]-[0012], “Therefore, what is needed is a method and system for efficiently preempting one or more processes from a GPU and context switching one or more other processes onto the GPU. Although GPUs, accelerated processing units (APUs), and general purpose use of the graphics processing unit (GPGPU) are commonly used terms in this field, the expression "accelerated processing device (APD)" is considered to be a broader expression.” FIG. 1A 104) comprising: a system interface; ([0061], “In the example shown, communication infrastructure 109 interconnects the components of system 100 as needed.”) and circuitry coupled with the system interface, the circuitry including an execution resource (FIG. 1A, resources in 104) and a preemption status register ([0065], “One or more registers 132 in the APD may be used to maintain exception statistics”) , wherein the execution resource is configured to execute an instruction and during execution of the instruction, the execution resource is to: receive a request to preempt execution of a thread associated with the instruction, wherein the thread is one of a plurality of threads executed for the instruction; ([0090], “In step 210, the IOMMU notifies the APD that the OS was notified of the page fault. According to various embodiments, IOMMU can generate the notification to the APD immediately upon generating an interrupt to the OS indicating the page fault, after confirmation by the OS that it has initiated recovery for the page faulted data, or at anytime in between”) and based on a value associated with the thread, the value stored in the preemption status register, ([0091] “…The statistics can, for example, be maintained in one or more registers 132 accessible to the APD.”) execute at least one additional instruction after receipt of the request to preempt execution of the thread. ([0092] –[0094] Once the page fault is detected, the ADP will invoke context switch logic, based on the statistic data in register 132, to decide whether a context switch is warranted: “In step 214, the APD determines if there should be a context switch or a stall in response to the detected page fault. In the embodiment, the CP, upon receiving the notification from the IOMMU that the OS was notified of the page fault, can invoke logic to determine if, based on the detected page fault, a context switch or stall should be implemented in the APD. The APD functionality that determines if a context switch should be attempted when a page fault is detected can be implemented as a preemption and context switch logic. In embodiments of the present invention, the decision to context switch or stall is based upon a metric that may be heuristically determined based upon information available to the APD regarding page faults and/or other exceptions. ... In another embodiment, the APD determines to initiate a context switch based upon one or more statistics maintained by the APD. For example, the APD may determine that, based on statistics available to it, a process currently running on the APD has caused more page faults than a predetermined threshold, and therefore a context switch is warranted.”) Regarding claim 3, Hartog teaches: The graphics processor as in claim 1, wherein the preemption status register is configured to store a value that indicates whether preemption for the thread is enabled or disabled. (Based on the stored statistics in register, a context switch can be decided. [0091] “…The statistics can, for example, be maintained in one or more registers 132 accessible to the APD.”[0092] –[0094] “…For example, the APD may determine that, based on statistics available to it, a process currently running on the APD has caused more page faults than a predetermined threshold, and therefore a context switch is warranted.”) Regarding claim 4, Hartog teaches: The graphics processor as in claim 3, wherein the circuitry, in response to the request to preempt execution of the thread associated with the instruction, (FIG. 2. [0090], “In step 210, the IOMMU notifies the APD that the OS was notified of the page fault. According to various embodiments, IOMMU can generate the notification to the APD immediately upon generating an interrupt to the OS indicating the page fault, after confirmation by the OS that it has initiated recovery for the page faulted data, or at anytime in between”) is to: determine, based on the preemption status register, that preemption for the thread is disabled; (([0094], “In another embodiment, the APD determines to initiate a context switch based upon one or more statistics maintained by the APD. For example, the APD may determine that, based on statistics available to it, a process currently running on the APD has caused more page faults than a predetermined threshold, and therefore a context switch is warranted. A discussion below, in relation to FIG. 5, provides more detail regarding whether to context switch or stall based upon heuristically determined metrics and page fault statistics accessible to the APD.” [0095], ““If, in step 214, it is determined that no context switch is required then a stall is performed at step 216. In step 216 the APD may not take any further action regarding the currently running process for at least the expiration of a predetermined time interval or being triggered to take such action.”) and execute the at least one additional instruction. ([0096], “In one example, the APD can reconsider the context switch decision 214 at the expiration of the predetermined time interval, or upon the receipt of a message from the IOMMU asserting that the pending page fault has been resolved. The pending page fault may be resolved during a stall, for example, when the OS loads or reloads the corresponding page into system memory and notifies the IOMMU that the page is now available. In this example, the APD, for a predetermined time interval, can continue to poll the IOMMU for the resolution of the page fault. In another embodiment, the IOMMU can itself notify the APD when the page fault has been resolved by the OS.”) Regarding claim 5, Hartog teaches: The graphics processor as in claim 3, wherein the circuitry, in response to the request to preempt execution of the thread associated with the instruction, (FIG. 2. [0090], “In step 210, the IOMMU notifies the APD that the OS was notified of the page fault. According to various embodiments, IOMMU can generate the notification to the APD immediately upon generating an interrupt to the OS indicating the page fault, after confirmation by the OS that it has initiated recovery for the page faulted data, or at anytime in between”) is to: determine, based on the preemption status register, that preemption for the thread is enabled; ([0094], “In another embodiment, the APD determines to initiate a context switch based upon one or more statistics maintained by the APD. For example, the APD may determine that, based on statistics available to it, a process currently running on the APD has caused more page faults than a predetermined threshold, and therefore a context switch is warranted. A discussion below, in relation to FIG. 5, provides more detail regarding whether to context switch or stall based upon heuristically determined metrics and page fault statistics accessible to the APD.” [0097], “If, in step 214, it is determined that a context switch is to be initiated, then in step 218, the APD initiates the preemption of the current process from the APD.”) and preempt execution of the thread upon completion of execution of the at least one additional instruction. ( FIG. 2, step 218 and 220) Regarding claim 15, Hartog teaches: A data processing system (FIG. 1A, 100) comprising: a memory device configured to store an instruction; (FIG. 1A, 106) and a graphics processor (FIG. 1A, 104) coupled to the memory device, (The rest of claim 15 recites similar limitations of claim 1, thus are rejected accordingly.) Claim 8 recites similar limitations of claim 1, thus are rejected accordingly. Claim 10-12, 17-19 recites similar limitations of claim 3-5 respectively, thus are rejected accordingly . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 2, 6, 9, 13, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hartog in view of Zhou et al. (“Rapid and Low-Cost Context-Switch through Embedded Processor Customization for Real-Time and Control Applications” from IDS) . Regarding claim 2, Hartog teaches: The graphics processor as in claim 1, However, Hartog does not, but Zhou teaches: wherein the circuitry includes a decode unit (Fig. 5) to: decode the instruction and metadata associated with the instruction; (page 356, left, middle: “ PNG media_image1.png 169 489 media_image1.png Greyscale ”) and set a value of the preemption status register based at least in part on the metadata. (page, 255, left bottom: “ PNG media_image2.png 229 492 media_image2.png Greyscale ” Based on the metadata, if preemption is triggered, the live registered information will be saved in stack.) Hartog teaches a general preemption method for a graphics processor. Zhou teaches a enhanced preemption method that reduces preemption overhead by analyze/decode each instruction status. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have combined the teachings of Hartog with the specific teachings of Zhou to reduces preemption overhead and improve system performance. Regarding claim 6, Hartog teaches: The graphics processor as in claim 1, However, Hartog does not, but Zhou teaches: wherein the preemption status register is to store a preemption hint that indicates an amount of register file space in use (Zhou, During compilation, the register liveness count for instructions are determined, as shown in Figure 6.) and a pending change in an amount of register file space in use. (Zhou page, 354, left: “ PNG media_image3.png 341 669 media_image3.png Greyscale ”) Hartog teaches a general preemption method for a graphics processor. Zhou teaches a enhanced preemption method that reduces preemption overhead deciding switch point based on recorded live registers status. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have combined the teachings of Hartog with the specific teachings of Zhou to reduces preemption overhead and improve system performance. Claim 9, 13 recites similar limitations of claim 2 and 6 respectively, thus are rejected accordingly. Claim 16 recites similar limitations of claim 2, thus are rejected accordingly . Allowable Subject Matter Claims 7, 14 and 20 would be allowable if rewritten to overcome the rejection(s) under ODP, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: none of the references alone or in combination teaches the limitations recited in claims 7, 14 and 20 . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YANNA WU whose telephone number is (571)270-0725. The examiner can normally be reached Monday-Thursday 8:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YANNA WU/Primary Examiner, Art Unit 2615 Application/Control Number: 18/893,028 Page 2 Art Unit: 2615 Application/Control Number: 18/893,028 Page 3 Art Unit: 2615 Application/Control Number: 18/893,028 Page 4 Art Unit: 2615 Application/Control Number: 18/893,028 Page 5 Art Unit: 2615 Application/Control Number: 18/893,028 Page 6 Art Unit: 2615 Application/Control Number: 18/893,028 Page 7 Art Unit: 2615 Application/Control Number: 18/893,028 Page 8 Art Unit: 2615 Application/Control Number: 18/893,028 Page 9 Art Unit: 2615 Application/Control Number: 18/893,028 Page 10 Art Unit: 2615 Application/Control Number: 18/893,028 Page 11 Art Unit: 2615 Application/Control Number: 18/893,028 Page 12 Art Unit: 2615
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