Prosecution Insights
Last updated: October 01, 2026
Application No. 18/893,236

METHOD, A MEMORY SYSTEM AND AN ELECTRONIC DEVICE

Final Rejection §103
Filed
Sep 23, 2024
Priority
Oct 13, 2023 — CN 2023113372105
Examiner
ADVINCULA, LAURENZ
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
Yangtze Memory Technologies Co., Ltd.
OA Round
2 (Final)
Grant Probability
Favorable
3-4
OA Rounds

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resolved cases with interview
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8 currently pending
Career history
8
Total Applications
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Office Action

§103
DETAILED ACTION Applicant’s amendment, filed 06/16/2026, for application number 18/893,236 has been received and entered into record. Claims 1, 13, and 25 have been amended, and no claims have been cancelled or newly added. Therefore, Claims 1-25 are presented for examination. The objections and rejections from the prior correspondence that are not restated herein are withdrawn. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments filed on 06/16/2026 with regards to the 101 rejections have been fully considered, and they are persuasive. Therefore, the 101 rejections of the claims have been withdrawn. Applicant’s arguments filed on 06/16/2026 with respect to the claims have been considered but are moot due to the rejection based on the references cited below. Allowable Subject Matter Claims 4-12 and 16-24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (US 10,276,228 B1), hereafter LEE, in view of YANG et al. (US 2018/0284857 A1), hereafter YANG. Regarding claim 1, LEE teaches: A method for adjusting sampling frequency, including obtaining an impact element for thermal sampling of a target device (LEE C7:L58-59 teach a method of sensing a temperature (i.e. component of an impact element) of a DRAM (i.e. target device) by a temperature sensor), adjusting a sampling frequency of a thermal throttling module corresponding to the target device in accordance with the impact element for thermal sampling (LEE C7:L14-15 teaches a control device (i.e. thermal throttling module) adjusting the sense frequency of the DRAM based on a temperature sensed by the temperature sensor). However, LEE does not explicitly teach wherein the impact element includes at least one of a type of read/write operation being performed by a solid-state drive that comprises the target device or a type of background task being performed by an electronic device comprising the solid-state drive; sensing a temperature of the device; and limiting a read/write speed of the solid-state drive responsive to the temperature of the target device reaching a threshold temperature by adjusting a sampling frequency. In the analogous art of thermal throttling for solid-state drives, YANG teaches wherein the impact element includes at least one of a type of read/write operation being performed by a solid-state drive that comprises the target device ([0031] teaches control system 104 performs thermal throttling based on temperature detection at different frequencies; for example, the time duration of an active read operation to the NAND dies 221 (i.e. a target device) can last for 300 seconds (i.e. the impact element includes at least one type of read/write operation being performed by a solid-state drive); [0034] teaches after a first time period of the active operation, e.g., from 0-40 seconds, the temperature of the NAND dies 221 rises above the temperature threshold 1, which causes the temperature monitoring module 201 to acquire the temperature of the NAND dies 221 at a higher frequency (i.e. the temperature of the NAND dies during the active read operation impacts the thermal sampling frequency)) or a type of background task being performed by an electronic device comprising the solid-state drive; sensing a temperature of the device ([0024] teaches the temperature monitoring module 201 inside the control system of the SSD system can send requests to the temperature detectors (TEDTs) 214 attached to one or more NAND dies 221 (i.e. the target device) and acquire the temperature of the NAND dies 221 (i.e. sensing the temperature of the target device)); and limiting a read/write speed of the solid-state drive responsive to the temperature of the target device reaching a threshold temperature by adjusting a sampling frequency ([0041] teaches when the temperature of the NAND dies 221 is within the normal temperature range, the temperature monitoring module 201 acquires the temperature of the NAND dies 221 at a low frequency; [0042] teaches when the temperature of the NAND dies 221 rises to a temperature within the medium temperature range, the temperature monitoring module 201 acquires the temperature of the NAND dies 221 at a medium frequency (i.e. the frequency adjusted based on reaching a temperature threshold); [0043] teaches when the temperature of the NAND dies 221 continue to rise to a temperature within the high temperature range, the temperature monitoring module 201 acquires the temperature of the NAND dies 221 at a high frequency and the thermal controller performs a higher level of thermal throttling to cool the NAND dies 221; the thermal controller 203 can instruct the resource server 204 to further reduce the data traffic, e.g., by 30% on the NAND dies 221 and can also instruct the NAND die controller 205 to control the NAND dies 221 to operate at a lower interface DDR speed to access (i.e. read) the NAND dies 221, e.g., 400 MHz (i.e. the read/write speed of the solid-state drive was limited in response to the NAND dies reaching a high temperature threshold where the thermal sampling frequency was increased to the highest frequency)). Accordingly, it would have been obvious to a person having ordinary skill in the art having the teachings of LEE and YANG before him before the effective filing date of the invention, to incorporate YANG’s adjusted thermal sampling based on temperature thresholds and thermal throttling based on read/write operations, with LEE’s method of adjusting temperature sensing frequency based on temperature to improve a system’s data reliability (YANG [0056]). Regarding claim 13, LEE teaches: A memory system (Fig. 1 illustrates a Dynamic Random Access Memory (DRAM) 10), A memory (Fig. 1 illustrates a memory 10), A memory controller, coupled to the memory (Fig. 1 illustrates a control device 19). The remainder of Claim 13 recites limitations similar to those of Claim 1 and is rejected accordingly. Claims 2-3 and 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over LEE, in view of YANG, and further in view of DURANT et al. (US 2005/0210896 A1), hereafter DURANT. Regarding claim 2, LEE and YANG teach the elements of claim 1 as outlined above. LEE further teaches: Wherein the impact element for thermal sampling includes a temperature of the target device and an impact factor in at least one dimension (LEE C7:L58-59 teach a temperature (i.e. component of impact element) of a DRAM (i.e. target device) sensed by a temperature sensor; LEE C9:L3-6 teaches the adjustment of sense frequency based on a refresh rate (i.e. impact factor) of the memory array for a self-refresh operation), Determining an adjustment amount for sampling frequency in accordance with an impact factor in at least one dimension (LEE C10:L63-66 teaches the control device being configured to adjust a sense frequency based on both the temperature and a refresh rate of the memory array for a self-refresh operation), Adjusting the sampling frequency of the thermal throttling module corresponding to the target device to a target sampling frequency in accordance with the basic sampling frequency and the adjustment amount for sampling frequency, wherein the target sampling frequency is equal to a sum of the basic sampling frequency and the adjustment amount for sampling frequency (LEE C10:L35-38 teaches the sense frequency is adjusted based on the temperature in a coarse-tune manner. Next, the sense frequency is adjusted based on the refresh rate in a fine-tune manner. The overall sense frequency is adjusted based on temperature at the first stage combined with refresh rate as the second stage). However, LEE and YANG do not explicitly teach “determining a basic sampling frequency in accordance with the temperature of the target device.” In analogous art of thermal management, DURANT teaches determining a device frequency in accordance with the temperature of the target device (DURANT [0044] teaches for each value of ambient temperature, the speed corresponding to each temperature setpoint, including the adjusted setpoints, may be determined and the measured speed-temperature control plotted.) Accordingly, it would have been obvious to a person having ordinary skill in the art having the teachings of LEE, YANG, and DURANT before him before the effective filing date of the invention, to incorporate DURANT’s thermal management method of determining a component’s operating speed based on temperature, with LEE and YANG’s method of adjusting temperature sensing frequency based on temperature in order to achieve stable control with little to no fluctuation (DURANT [0004]). Regarding claim 3, LEE, YANG, and DURANT teach the elements of claim 2 as outlined above. DURANT further teaches: Determining the basic sampling frequency to be a first sampling frequency when the temperature of the target device is within a first temperature interval and determining the basic sampling frequency to be a second sampling frequency when the temperature of the target device is within a second temperature interval (DURANT [0037] teaches a look-up table containing a plurality of speeds, each having a temperature setpoint (i.e. temperature interval) associated therewith; [0044] teaches for each value (i.e. first/second temperature intervals) of ambient temperature, the speed (i.e. first/second sampling frequency) corresponding to each temperature setpoint may be determined and may be stored to a look-up table). Wherein the temperature in the first temperature interval is lower than the temperature in the second temperature interval, and the first sampling frequency is lower than the second sampling frequency (DURANT [0040] teaches an ideal speed-temperature control response by plotting a straight-line approximation between a first endpoint (i.e. first temperature interval) defined by the minimum ambient temperature and the minimum speed (i.e. first sampling frequency) and second endpoint (i.e. second temperature interval) defined by the maximum ambient temperature and the maximum fan speed (i.e. second sampling frequency). The coordinates may be, for example, (25°C., 3300 RPM) and (45°C., 5700 RPM), i.e. the first temperature lower than the second temperature, and the first frequency being lower than the second frequency. Regarding claim 14, LEE and YANG disclose the memory system of Claim 13. Claim 14 recites limitations similar to those of Claim 2 and is rejected accordingly. Regarding claim 15, LEE, YANG, and DURANT disclose the memory system of Claim 14. Claim 15 recites limitations similar to those of Claim 3 and is rejected accordingly. Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over NOWELL et al. (US 2020/0073451 A1), hereafter NOWELL, in view of LEE, and further in view of YANG. Regarding claim 25, NOWELL teaches: An electronic device (Fig. 1 illustrates a computing environment 100), A memory system, including a memory; and a memory controller, coupled to the memory (Fig. 1 illustrates a memory system 110, memory device 112A-112N, and controller 115), A host coupled with the memory system to write data to the memory system or read data stored in the memory system (NOWELL [0020] teaches a host system 120 that can include or be coupled to the memory system 110 so that the host system can read data from or write data to the memory system). However, NOWELL does not explicitly teach “obtain an impact element for thermal sampling a target device wherein the impact element includes at least one of a type of read/write operation being performed by a solid-state drive that comprises the target device or a type of background task being performed by an electronic device comprising the solid-state drive; sensing a temperature of the device; and limiting a read/write speed of the solid-state drive responsive to the temperature of the target device reaching a threshold temperature by adjusting a sampling frequency of a thermal throttling module corresponding to the target device in accordance with the impact element for thermal sampling.” In the analogous art of temperature-sensing operation of a device, LEE teaches obtaining an impact element for thermal sampling a target device; and adjusting a sampling frequency of a thermal throttling module corresponding to the target device in accordance with the impact element for thermal sampling (LEE Fig.1 illustrates a memory 10 and a control device 19; C7:L58-59 teaches sensing temperature of DRAM (i.e. target device) by a temperature sensor; C7:L60-61 teaches a control device adjusting the sense frequency based on the temperature (i.e. impact element) of the DRAM by a temperature sensor). Accordingly, it would have been obvious to a person having ordinary skill in the art having the teachings of NOWELL and LEE before him before the effective filing date of the claim invention, to incorporate LEE’s memory system and method thermal management by adjusting thermal sampling frequency into NOWELL’s thermal compensation method on memory systems in electronic devices in order to reduce risk of data loss and increase power efficiency in a memory device ( LEE C3:L17-43). However, the combination of NOWELL and LEE do not explicitly disclose “wherein the impact element includes at least one of a type of read/write operation being performed by a solid-state drive that comprises the target device or a type of background task being performed by an electronic device comprising the solid-state drive; sensing a temperature of the device; and limiting a read/write speed of the solid-state drive responsive to the temperature of the target device reaching a threshold temperature by adjusting a sampling frequency” In the analogous art of thermal throttling of a device, YANG teaches wherein the impact element includes at least one of a type of read/write operation being performed by a solid-state drive that comprises the target device ([0031] teaches control system 104 performs thermal throttling based on temperature detection at different frequencies; for example, the time duration of an active read operation to the NAND dies 221 (i.e. a target device) can last for 300 seconds (i.e. the impact element includes at least one type of read/write operation being performed by a solid-state drive that comprises the target device); [0034] teaches after a first time period of the active operation, e.g., from 0-40 seconds, the temperature of the NAND dies 221 rises above the temperature threshold 1, which causes the temperature monitoring module 201 to acquire the temperature of the NAND dies 221 at a higher frequency (i.e. the temperature of the NAND dies during the active read operation impacts the thermal sampling frequency)) or a type of background task being performed by an electronic device comprising the solid-state drive; sensing a temperature of the device ([0024] teaches the temperature monitoring module 201 inside the control system of the SSD system can send requests to the temperature detectors (TEDTs) 214 attached to one or more NAND dies 221 (i.e. the target device) and acquire the temperature of the NAND dies 221 (i.e. sensing the temperature of the target device)); and limiting a read/write speed of the solid-state drive responsive to the temperature of the target device reaching a threshold temperature by adjusting a sampling frequency ([0041] teaches when the temperature of the NAND dies 221 is within the normal temperature range, the temperature monitoring module 201 acquires the temperature of the NAND dies 221 at a low frequency; [0042] teaches when the temperature of the NAND dies 221 rises to a temperature within the medium temperature range, the temperature monitoring module 201 acquires the temperature of the NAND dies 221 at a medium frequency (i.e. the frequency adjusted based on reaching a temperature threshold); [0043] teaches when the temperature of the NAND dies 221 continue to rise to a temperature within the high temperature range, the temperature monitoring module 201 acquires the temperature of the NAND dies 221 at a high frequency and the thermal controller performs a higher level of thermal throttling to cool the NAND dies 221; the thermal controller 203 can instruct the resource server 204 to further reduce the data traffic, e.g., by 30% on the NAND dies 221 and can also instruct the NAND die controller 205 to control the NAND dies 221 to operate at a lower interface DDR speed to access (i.e. read) the NAND dies 221, e.g., 400 MHz (i.e. the read/write speed of the solid-state drive was limited in response to the NAND dies reaching a high temperature threshold where the thermal sampling frequency was increased to the highest frequency)). Accordingly, it would have been obvious to a person having ordinary skill in the art having the teachings of NOWELL, LEE, and YANG before him before the effective filing date of the invention, to incorporate YANG’s adjusted thermal sampling based on temperature thresholds and thermal throttling based on read/write operations of a device, with NOWELL and LEE’s electronic device to improve a system’s data reliability (YANG [0056]). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Laurenz Advincula whose telephone number is (571)272-9211. The examiner can normally be reached T-F 8:30AM – 5:30PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew J. Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /L.A./Examiner, Art Unit 2175 /Paul Yen/Primary Examiner, Art Unit 2175
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Prosecution Timeline

Sep 23, 2024
Application Filed
Mar 16, 2026
Non-Final Rejection mailed — §103
Jun 16, 2026
Response Filed
Aug 21, 2026
Final Rejection mailed — §103 (current)

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