Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is in response to the communication filed on 9/23/2024.
Claims 1, 2, 4-12, 14-20 are examined and rejected.
Claims 3 and 13 are objected.
Allowable Subject Matter
Claims 3 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Examiner notes that Reason for allowance will be described upon selection of claims.
Examiner Notes
Claims 3 and 13 are rejected in view of Double Patent rejection as described above, however they overcome any prior art rejection in view of (USC 102/103).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4-12, 14-20 are rejected under 35 U.S.C. 103 as being unpatentable by U.S. Publication 2020/0351657 to Wentz et al. (hereinafter known as “Wentz”) and U.S. Publication 2021/0191882 to Lee et al. (hereinafter known as "Lee”).
As per claim 1 Wentz teaches, a method comprising:
receiving, at an integrated circuit device (Wentz Fig 1 para 22 element 116 teaches TPM which includes Integrated circuit), a request from a requester device to access a physical address in a memory, the request comprising the physical address and a set of key bits (Wentz para 40 teaches container identifier(s) and para 22 which teaches para 22 element 112 / 116 teaches secure computing to analyze key information from requestor device element 108, including private key of the TPM of device module identified with its private key or unique object (fingerprint) which is similar to cryptographic key of claimed function);
extracting the set of key bits from the request; performing a comparison between the set of key bits and a set of allowed keys stored at the integrated circuit device (Wentz para 55 and 82, 87-89 teaches extraction of key bits / signature for access covers the claimed limitation); and
determining, based on the comparison, whether to allow the request to access the physical address in the memory via an interconnect (Wentz para 96-97 teaches verification and authorizing of devices based on key / signature information).
Wentz does not teach, Lee teaches receive a request from the requester device to access a physical address in a host memory coupled to an interconnect (Lee Fig 1 element 100/110 - para 37, 43-45 teaches physical address of the device access request with key identifier controller element 110 teaching key-value command with key value from key pair).
Wentz teaches cryptographic authorization of devices with verification node configured to analyze access request with authentication of the request, authorization token, key / signature analysis (Wentz abstract and Fig 1-3). Wentz does not teach however Lee teaches physical address of the device access request with key identifier (Fig 1 element 100 / 110).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Wentz - Lee before him or her, to combine Wentz’s cryptographic authorization of with verification node with Lee’s teaching of physical address of device for access request with key identifier. The suggestion/motivation for doing so would have been to enhance security of device access based on key-value storage that stores data on a key-value basis (Lee para 5).
As per claim 2 combination of Wentz – Lee teaches, the method of claim 1, wherein the set of key bits are encoded into the physical address of the request (Lee Fig 1 element 100/110 - para 37, 43-45 teaches physical address of the device access request with key identifier controller element 110 teaching key-value command with key value from key pair).
As per claim 4 combination of Wentz – Lee teaches, the method of claim 3, wherein sending the request having the modified physical address to the interconnect with the modified physical address causes a host device to become notified that the request is not allowed to access the physical address (Wentz para 73 does not allow users based on verification of request and digital ledger).
As per claim 5 combination of Wentz – Lee teaches, the method of claim 1, further comprising: in response to determining, based on the comparison, that the request is allowed to access the physical address, sending the request to the interconnect without modifying the physical address (Wentz para 22 where physical circuit memory access based on private key with fuzzy extractor with symmetric or asymmetric keys teaches the claim function. Examiner interprets physical circuit as physical address).
As per claim 6 combination of Wentz – Lee teaches, the method of claim 1, wherein the set of allowed keys includes a first allowed key associated with a first virtual machine (VM) and a second allowed key associated with a second VM (Wentz para 63 teaches multiple systems for secure access such as physical circuit, VR (virtual reality), AR (augmented reality) where VR and AR both cover VM (virtual machine) and para 37-38 teaches secure mechanism such as encrypted key access, private, symmetric or asymmetric keys).
As per claim 7 combination of Wentz – Lee teaches, the method of claim 6, wherein the requester device is a processor core executing the first VM, and wherein the request is allowed to access the physical address in the memory via the interconnect (Wentz para 22, 69 and 72 where physical circuit memory access based on private key with fuzzy extractor with symmetric or asymmetric keys teaches the claim function. Examiner interprets physical circuit as physical address).
As per claim 8 combination of Wentz – Lee teaches, the method of claim 6, wherein the requester device is a processor core executing a third VM, and wherein the request is not allowed to access the physical address in the memory via the interconnect (Wentz para 74 teaches where temporally sequential listing 204 which includes hash chain, in which data is added during a successive hashing process to ensure non-repudiation, where sequential listing include multiple sequence of VM’s (virtual machine) with secure access which does not allow unverified users).
As per claim 9 combination of Wentz – Lee teaches, the method of claim 1, wherein the requester device is a processor core of a set of processor cores of a host device (Wentz para 22 teaches that TPM includes integrated circuit with processor (any one of optoelectronic or pcb or crypto processors)).
As per claim 10 combination of Wentz – Lee teaches, the method of claim 1, wherein the requester device is an input/output (IO) device (Wentz para 20-22 teaches network node with input / output of connectivity and data transfer as known in art).
Claim 11,
Claim 11 is rejected in accordance with claim 1.
Claim 12,
Claim 12 is rejected in accordance with claim 2.
Claim 14,
Claim 14 is rejected in accordance with claim 4.
Claim 15,
Claim 15 is rejected in accordance with claim 5.
Claim 16,
Claim 16 is rejected in accordance with claim 6.
Claim 17,
Claim 17 is rejected in accordance with claim 7.
Claim 18,
Claim 18 is rejected in accordance with claim 8.
Claim 19,
Claim 19 is rejected in accordance with claim 9.
Claim 20,
Claim 20 is rejected in accordance with claim 10.
Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wentz et al US Publication 20200351657
Lee et al US Publication 20210191882
Brandwine et al US Patent 12067119
Chhabra et al US Patent 11841806
Zumdzinski et al US Patent 11030120
Guim et al US Patent 10337288
Miller et al US Publication 20220385470
Suurkivi et al US Publication 20220166605
Kashid et al US Publication 20210377020
Conclusion
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/VIRAL S LAKHIA/Primary Examiner, Art Unit 2431