Prosecution Insights
Last updated: October 01, 2026
Application No. 18/894,289

TECHNIQUES FOR MANAGING OFFLINE IDENTITY UPGRADES

Non-Final OA §103
Filed
Sep 24, 2024
Priority
May 13, 2022 — continuation of 12/124,833
Examiner
RAMPURIA, SATISH
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
758 granted / 852 resolved
+29.0% vs TC avg
Strong +25% interview lift
Without
With
+25.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
19 currently pending
Career history
871
Total Applications
across all art units

Statute-Specific Performance

§101
19.9%
-20.1% vs TC avg
§103
51.2%
+11.2% vs TC avg
§102
10.4%
-29.6% vs TC avg
§112
12.4%
-27.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 852 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This action is in response to the application filed on 09/24/2024. Claims 1-20 are pending. Examiner’s Note Please note that Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirely as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over USPN 20210150013 to Duval in view of USPN 20110061046 to Phillips. Per claim 1: Duval discloses: 1. A memory system, comprising: one or more memory devices (paragraph [0014] “device 105 may include one or more components associated with a memory device”); and processing circuitry coupled with the one or more memory devices (paragraph [0099] “software executed by a processor, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium”) and configured to cause the memory system to: generate an updated device identifier for a device identifier composition engine associated with the memory system (Paragraph [0015] “secure component 110 may include a device identifier 125 generated according to a device identifier composition engine (DICE) standard”); sign a device-specific certificate using a device-specific key (paragraph [0018] “the certificate generator 155 can digitally sign a certificate (e.g., a key certificate 160) for the public key in the corresponding asymmetric key pai”); and execute one or more operations associated with the device identifier composition engine based on the signed updated device identifier (Paragraph [0020] “Once a public key of the device 105 is certified, the device 105 may use the corresponding private key to authenticate itself to the field server 185… system 100 may also allow the device 105 to connect to a service based on a valid public key”). Duval does not explicitly disclose sign the updated device identifier using the device-specific key based on signing the device-specific certificate. However, Phillips discloses in an analogous computer system sign the updated device identifier using the device-specific key based on signing the device-specific certificate (paragraph [0106, 0179] “Updates to the system disk image 128 may be reflected in the subscription (i.e., certificate). When the user later accesses the virtual workspace, the subscription and the system disk image 128… the management server 108 may use a public key (such as may be generated during the client's initial registration) to verify the authenticity of the signature”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention was made to incorporate the method of sign the updated device identifier using the device-specific key based on signing the device-specific certificate as taught by Phillips into the method of authenticating the device to update software as taught by Duval. The modification would be obvious because of one of ordinary skill in the art would be motivated to add/incorporate the features of sign the updated device identifier using the device-specific key based on signing the device-specific certificate to provide an efficient technique for avoiding errors during software updates so as the updates are performed error free as suggested by Phillips (paragraphs [0007-0010]). Per claim 2: Duval discloses: 2. The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to: receive a command to update the device identifier, wherein generating the updated device identifier is based on receiving the command (paragraph [0017] “the certificate generator 155 may be configured to use the same set of commands executed in the device 105 to generate the device identifier 125 from the copy of the secret 115 stored in the key management server 150 and from the software hash 170 received from a registration portal 165”). Per claim 3: Duval discloses: 3. The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to: retrieve the device-specific key from a read-only memory of the memory system (paragraph [0017] “a key management server 150”), wherein signing the device-specific certificate is based on retrieving the device-specific key from the read-only memory (paragraph [0017] “the certificate generator 155 may be configured to use the same set of commands executed in the device 105 to generate the device identifier 125 from the copy of the secret 115 stored in the key management server”). Per claim 4: The rejection of claim 1 is incorporated and further, Duval does not explicitly disclose encrypt the device-specific key using a device-specific wrap key associated with the memory system. However, Phillips discloses in an analogous computer system encrypt the device-specific key using a device-specific wrap key associated with the memory system (Paragraph [0170] “the key 520 that is used to decrypt the secured control domain volume 512… binding key 708 may wrap migratable keys such as disk encryption keys”). The feature of providing encrypt the device-specific key using a device-specific wrap key associated with the memory system would be obvious for the reasons set forth in the rejection of claim 1. Per claim 5: The rejection of claim 4 is incorporated and further, Duval does not explicitly disclose wherein the device-specific wrap key comprises a symmetric key used to encrypt and decrypt information, and wherein the device-specific wrap key is derived based on a unique device secret associated with the memory system. However, Phillips discloses in an analogous computer system wherein the device-specific wrap key comprises a symmetric key used to encrypt and decrypt information (paragraph [0170] “a binding key 708, and the key 520 that is used to decrypt the secured control domain volume 512”), and wherein the device-specific wrap key is derived based on a unique device secret associated with the memory system (Paragraph [0170] “the key 520 that is used to decrypt the secured control domain volume 512… binding key 708 may wrap migratable keys such as disk encryption keys”). The feature of providing wherein the device-specific wrap key comprises a symmetric key used to encrypt and decrypt information, and wherein the device-specific wrap key is derived based on a unique device secret associated with the memory system would be obvious for the reasons set forth in the rejection of claim 1. Per claim 6: The rejection of claim 4 is incorporated and further, Duval does not explicitly disclose decrypt the device-specific key based on encrypting the device-specific key, wherein signing the device-specific certificate is based on decrypting the device-specific key. However, Phillips discloses in an analogous computer system decrypt the device-specific key based on encrypting the device-specific key, wherein signing the device-specific certificate is based on decrypting the device-specific key (paragraph [0165] “apply the cryptographic seal 508 to the key 510 that is used to decrypt the secured control domain volume 512. The trusted user may then, using a management function of the WEE, securely connect to the management system 108, log in to the management system 108, and register the client computer with the management system 108”). The feature of providing decrypt the device-specific key based on encrypting the device-specific key, wherein signing the device-specific certificate is based on decrypting the device-specific key would be obvious for the reasons set forth in the rejection of claim 1. Per claim 7: 7. The memory system of claim 4, wherein the processing circuitry is further configured to cause the memory system to: the nonvolatile memory comprising read-only memory (ROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), ferroelectric random-access memory (FeRAM), magnetic random-access memory (MRAM), phase-change memory (PCM), physical unclonable function (PUF), or a combination thereof (Paragraph [0373] “Various types of memory devices exist, including magnetic hard disks, random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase change memory (PCM), and others. Memory devices may be volatile or non-volatile. Some memory devices may go through an authentication process before performing communications with a server. Some memory devices may perform a software update periodically”). Duval does not explicitly disclose retrieve the device-specific wrap key from nonvolatile memory of the memory system. However, Phillips discloses in an analogous computer system retrieve the device-specific wrap key from nonvolatile memory of the memory system(Paragraph [0170] “the key 520 that is used to decrypt the secured control domain volume 512… binding key 708 may wrap migratable keys such as disk encryption keys”). The feature of providing retrieve the device-specific wrap key from nonvolatile memory of the memory system would be obvious for the reasons set forth in the rejection of claim 1. Per claim 8: Duval discloses: 8. The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to: generate the device-specific key based on a unique device secret associated with the memory system (paragraph [0018] “the certificate generator 155 may generate a certificate (e.g., key certificate 160) based on the key”). Per claim 9: Duval discloses: 9. The memory system of claim 1, wherein the processing circuitry is further configured to cause the memory system to: receive a certificate signing request signed by a server, wherein signing the device-specific certificate is based on receiving the certificate signing request (paragraph [0018] “the certificate generator 155 can digitally sign a certificate (e.g., a key certificate 160) for the public key in the corresponding asymmetric key pair, using a private key of the certificate generator 155 or the key management server 150”). Claims 10-18 is/are the method claims corresponding to apparatus/system claims 1-9 respectively, and rejected under the same rational set forth in connection with the rejection of claims 1-9 respectively, as noted above. Claims 19-20 is/are the medium claims corresponding to method claims 1-2 respectively, and rejected under the same rational set forth in connection with the rejection of claims 1-2 respectively, as noted above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Related cited arts: Kleppmann, Martin, et al. "Local-first software: you own your data, in spite of the cloud." Proceedings of the 2019 ACM SIGPLAN International Symposium on New Ideas, New Paradigms, and Reflections on Programming and Software. 2019. pp. 154-178. Sabella, Dario, et al. "Developing software for multi-access edge computing." ETSI white paper 20.2019 (2019): pp. 1-38. Götzfried, Johannes, et al. "Soteria: Offline software protection within low-cost embedded devices." Proceedings of the 31st Annual Computer Security Applications Conference. 2015. pp. 241-250. USPN20230274002 - Disclosed in some examples are methods, systems, and devices for authenticating a firmware object on a device and in some examples to safeguard the attestation process from the execution of malicious firmware. In some examples, a firmware update process may, in addition to updating the firmware on the device, write a hash of the authentic firmware code in a secure storage device (e.g., a register). This may be done in some examples in a protected environment (e.g., a trusted execution environment or a protected firmware update process). Upon first boot after the update, a firmware update checker compares the firmware object that is booted with the value of the secure storage device. If the values match, the alias certificate may be regenerated, and the boot continues. If the values do not match, then the alias certificate may not be regenerated, and the system may have an authenticity failure because the key and the certificate do not match. USPN20230095755 - A computer-implemented method for securely transferring a secret from a source computing component to a target computing component, wherein the source computing component and the target computing component are part of a secure computing environment is disclosed. The method comprises upon the source computing component receiving from the target computing component a signed attestation document, verifying, by the source computing component, an authenticity and content of the attestation document, and upon a successful verification of the authenticity and the content, transferring, by the source computing component the secret to the target computing system. Thereby, the attestation document is attesting that the target computing component is compliant to an update governance rule. USPN11153074 - A computing system receives encrypted data that can be decrypted by a first secret to obtain data, wherein the first secret is securely stored by the system, determines that the data encodes a second secret and executable code usable to perform cryptographic operations, and run the executable code to perform the cryptographic operations. The first secret may be a one-time pad. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Satish Rampuria whose telephone number is 571-272-3732. The examiner can normally be reached on Monday-Friday from 8:30 AM to 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chat Do, can be reached at telephone number 571-272-3721. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Satish Rampuria/Primary Examiner, Art Unit 2193 *****
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Prosecution Timeline

Sep 24, 2024
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+25.0%)
2y 11m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 852 resolved cases by this examiner. Grant probability derived from career allowance rate.

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