CTNF 18/894,666 CTNF 82560 DETAILED ACTION 1. This action is in response to the application filed on 9/24/24. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia 2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Double Patenting 08-33 AIA 3. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-34 AIA 4. Claim 1, 3-7, and 11-17 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 11 of U.S. Patent No. 12,126 , 249 . Although the claims at issue are not identical, they are not patentably distinct from each other because the differences are obvious variations of the same invention (i.e. see table below) . Current application U.S. Patent No. 12,126,249 1 . A switched-mode power supply (SMPS) comprising: an inductive element coupled to an output of the SMPS; a first switch; a second switch, wherein the first switch is coupled between a first voltage rail and the second switch, and wherein the second switch is coupled between the first switch and the inductive element; a third switch coupled between the inductive element and a reference potential node; a fourth switch; a fifth switch, wherein the fourth switch is coupled between a second voltage rail and the fifth switch, and wherein the fifth switch is coupled between the fourth switch and the second switch; and a sixth switch coupled between the fifth switch and the reference potential node. 3 . The SMPS of claim 1, further comprising: a seventh switch; an eighth switch, wherein the seventh switch is coupled between the first voltage rail and the eighth switch, and wherein the eighth switch is coupled between the seventh switch and the reference potential node; and a first capacitive element coupled between the seventh switch and the fifth switch. 4 . The SMPS of claim 3, wherein: a first current is configured to flow from the second voltage rail to the reference potential node through the fourth switch, the first capacitive element, and the eighth switch during a discharge phase; and a second current is configured to flow from the first voltage rail to the inductive element through the seventh switch, the first capacitive element, the fifth switch, and the second switch during a charge phase. 5 . The SMPS of claim 4, wherein a third current is configured to flow from the second voltage rail to the inductive element through the fourth switch, the fifth switch, and the second switch during the discharge phase. 6 . The SMPS of claim 4, further comprising a second capacitive element, the fifth switch being coupled between the fourth switch and the second switch through the second capacitive element, wherein: a third current is configured to flow from the first voltage rail to the reference potential node through the first switch, the second capacitive element, and the sixth switch during the discharge phase; and the second current is further configured to flow to the inductive element through the second capacitive element. 7 . The SMPS of claim 1, wherein the first voltage rail is shorted to the second voltage rail. 11 . An apparatus comprising the SMPS of claim 1, the apparatus further comprising: a first battery coupled between the first voltage rail and the reference potential node; and a second battery coupled between the second voltage rail and the first battery. 12 . A method for voltage regulation by a switched-mode power supply (SMPS), comprising: charging a first capacitive element during a first discharge phase of the SMPS, the SMPS having a first voltage rail and a second voltage rail, wherein the first voltage rail is separate from the second voltage rail, wherein a voltage at the first voltage rail is less than a voltage at the second voltage rail, and wherein charging the first capacitive element comprises directing a first current to flow from the second voltage rail to a reference potential node through the first capacitive element; and generating an output voltage at an output node during a first charge phase by directing a second current to flow from the first voltage rail to an inductive element of the SMPS through the first capacitive element. 13 . The method of claim 12, wherein: directing the first current comprises directing the first current to flow through a first switch of the SMPS coupled between the second voltage rail and the first capacitive element, through the first capacitive element, and through a second switch of the SMPS coupled between the first capacitive element and the reference potential node; and directing the second current comprises directing the second current to flow through a third switch of the SMPS coupled between the first voltage rail and the first capacitive element, the first capacitive element, and a fourth switch coupled between the first capacitive element and the inductive element. 14 . The method of claim 13, further comprising: directing, during a second charge phase, a third current to flow from the second voltage rail to the inductive element through the first switch; and directing, during a second discharge phase, a fourth current to flow from the first voltage rail to the inductive element through a fifth switch of the SMPS coupled between the first voltage rail and the inductive element. 15 . The method of claim 13, further comprising: directing, during a second charge phase, a third current to flow from the first voltage rail to the inductive element through a fifth switch of the SMPS coupled between the first voltage rail and the inductive element; and directing, during a second discharge phase, a fourth current to flow from the reference potential node to the inductive element through a sixth switch of the SMPS coupled between the reference potential node and the inductive element. 16 . The method of claim 13 wherein a first battery is coupled between the first voltage rail and the reference potential node and wherein a second battery is coupled between the second voltage rail and the first battery. 17 . An apparatus for voltage regulation, comprising: an inductive element; a capacitive element; a first voltage rail; a second voltage rail separate from the first voltage rail, wherein a voltage at the first voltage rail is configured to be less than a voltage at the second voltage rail; means for charging the capacitive element during a discharge phase of the apparatus, wherein the means for charging the capacitive element comprises means for directing a first current to flow from the second voltage rail to a reference potential node through the capacitive element; and means for generating an output voltage at an output node during a charge phase, wherein the means for generating comprises means for directing a second current to flow from the first voltage rail to the inductive element through the capacitive element. 1. A switched-mode power supply (SMPS) comprising: an inductive element coupled to an output of the SMPS; a first switch; a second switch, wherein the first switch is coupled between a first voltage rail and the second switch, and wherein the second switch is coupled between the first switch and the inductive element; a third switch coupled between the inductive element and a reference potential node; a fourth switch; a fifth switch, wherein the fourth switch is coupled between a second voltage rail and the fifth switch, and wherein the fifth switch is coupled between the fourth switch and the second switch; a sixth switch coupled between the fifth switch and the reference potential node, wherein a signal path is coupled between a first node of the SMPS and a second node of the SMPS, wherein the first node is coupled to a terminal of the first switch and a terminal of the second switch, and wherein the second node is coupled to a terminal of the fifth switch and a terminal of the sixth switch; a seventh switch; an eighth switch, wherein the seventh switch is coupled between the first voltage rail and the eighth switch, and wherein the eighth switch is coupled between the seventh switch and the reference potential node; and a first capacitive element coupled between the seventh switch and the fifth switch, wherein a first current is configured to flow from the second voltage rail to the reference potential node through the fourth switch, the first capacitive element, and the eighth switch during a discharge phase, and a second current is configured to flow from the first voltage rail to the inductive element through the seventh switch, the first capacitive element, the fifth switch, and the second switch during a charge phase. 2. The SMPS of claim 1, wherein a third current is configured to flow from the second voltage rail to the inductive element through the fourth switch, the fifth switch, and the second switch during the discharge phase. 3. The SMPS of claim 1, wherein: the signal path comprises a second capacitive element, the fifth switch being coupled between the fourth switch and the second switch through the second capacitive element; a third current is configured to flow from the first voltage rail to the reference potential node through the first switch, the second capacitive element, and the sixth switch during the discharge phase; and the second current is further configured to flow to the inductive element through the second capacitive element. 4. The SMPS of claim 1, wherein the first voltage rail is shorted to the second voltage rail. 5. An apparatus comprising the SMPS of claim 1, the apparatus further comprising: a first battery coupled between the first voltage rail and the reference potential node; and a second battery coupled between the second voltage rail and the first battery. 6. A method for voltage regulation by a switched-mode power supply (SMPS), comprising: charging a first capacitive element during a first discharge phase of the SMPS, the SMPS having a first voltage rail and a second voltage rail, wherein the first voltage rail is separate from the second voltage rail, wherein a voltage at the first voltage rail is less than a voltage at the second voltage rail, and wherein charging the first capacitive element comprises directing a first current to flow from the second voltage rail to a reference potential node through the first capacitive element; and generating an output voltage at an output node during a first charge phase by directing a second current to flow from the first voltage rail to an inductive element of the SMPS through the first capacitive element. 7. The method of claim 6, wherein: directing the first current comprises directing the first current to flow through a first switch of the SMPS coupled between the second voltage rail and the first capacitive element, through the first capacitive element, and through a second switch of the SMPS coupled between the first capacitive element and the reference potential node; and directing the second current comprises directing the second current to flow through a third switch of the SMPS coupled between the first voltage rail and the first capacitive element, the first capacitive element, and a fourth switch coupled between the first capacitive element and the inductive element. 8. The method of claim 7, further comprising: directing, during a second charge phase, a third current to flow from the second voltage rail to the inductive element through the first switch; and directing, during a second discharge phase, a fourth current to flow from the first voltage rail to the inductive element through a fifth switch of the SMPS coupled between the first voltage rail and the inductive element. 9. The method of claim 7, further comprising: directing, during a second charge phase, a third current to flow from the first voltage rail to the inductive element through a fifth switch of the SMPS coupled between the first voltage rail and the inductive element; and directing, during a second discharge phase, a fourth current to flow from the reference potential node to the inductive element through a sixth switch of the SMPS coupled between the reference potential node and the inductive element. 10. The method of claim 7 wherein a first battery is coupled between the first voltage rail and the reference potential node and wherein a second battery is coupled between the second voltage rail and the first battery. 11. An apparatus for voltage regulation, comprising: an inductive element; a capacitive element; a first voltage rail; a second voltage rail separate from the first voltage rail, wherein a voltage at the first voltage rail is configured to be less than a voltage at the second voltage rail; means for charging the capacitive element during a discharge phase of the apparatus, wherein the means for charging the capacitive element comprises means for directing a first current to flow from the second voltage rail to a reference potential node through the capacitive element; and means for generating an output voltage at an output node during a charge phase, wherein the means for generating comprises means for directing a second current to flow from the first voltage rail to the inductive element through the capacitive element . 08-36 AIA 5. Claim s 2 and 8-9 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,126,249 (hereafter 249’) in view of Jong et al. (US 20220231601) . Regarding claim 2 : 249’ disclose the limitation of the claim(s) as discussed above, but does not specifically disclose a capacitive element, wherein the fifth switch is coupled between the fourth switch and the second switch through the capacitive element. Jong et al. disclose a power converter comprising (i.e. figure 14) wherein the signal path (i.e. path through Cfly2) comprises a capacitive element (i.e. Cfly2) and wherein the fifth switch (i.e. Q11) is coupled between the fourth switch (i.e. Q10) and the second switch (i.e. Q6) through the capacitive element (i.e. Cfly2) . Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of 249’s invention with the power converter as disclose by Jong et al. to achieve high efficiency operation, which can further increase solution density. Regarding claim 8 : 249’ disclose the limitation of the claim(s) as discussed above, but does not specifically disclose a first current is configured to flow from the first voltage rail to the inductive element through the first switch and the second switch during a charge phase; and a second current is configured to flow from the reference potential node to the inductive element through the third switch during a discharge phase. Jong et al. disclose a power converter comprising (i.e. figure 14) wherein: a first current is configured to flow from the first voltage rail (i.e. rail of phase 2) to the inductive element (i.e. L2) through the first switch (i.e. Q5) and the second switch (i.e. Q6) during a charge phase; and a second current is configured to flow from the reference potential node (i.e. ground) to the inductive element (i.e. L2) through the third switch (i.e. Q8) during a discharge phase. Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of 249’s invention with the power converter as disclose by Jong et al. to achieve high efficiency operation, which can further increase solution density. Regarding claim 9 : 249’ disclose the limitation of the claim(s) as discussed above, but does not specifically disclose a first current is configured to flow from the first voltage rail to the inductive element through the first switch and the second switch during a discharge phase; and a second current is configured to flow from the second voltage rail to the inductive element through the fourth switch, the fifth switch, and the second switch during a charge phase. Jong et al. disclose a power converter comprising (i.e. figure 14) wherein: a first current is configured to flow from the first voltage rail (i.e. rail of phase 2) to the inductive element (i.e. L2) through the first switch (i.e. Q5) and the second switch (i.e. Q6) during a discharge phase; and a second current is configured to flow from the second voltage rail (i.e. rail of phase N) to the inductive element (i.e. L2) through the fourth switch (i.e. Q10) , the fifth switch (i.e. Q11) , and the second switch (i.e. Q6) during a charge phase. Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of 249’s invention with the power converter as disclose by Jong et al. to achieve high efficiency operation, which can further increase solution density . Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15 AIA 7. Claim s 1-3 and 7-9 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Jong et al. (US 20220231601) . Regarding claim 1 : Jong et al. disclose a switched-mode power supply (SMPS) (i.e. figure 14) comprising: an inductive element (i.e. L2) coupled to an output (i.e. Vout) of the SMPS; a first switch (i.e. Q5) ; a second switch (i.e. Q6) , wherein the first switch (i.e. Q5) is coupled between a first voltage rail (i.e. rail of phase 2) and the second switch (i.e. Q6) , and wherein the second switch (i.e. Q6) is coupled between the first switch (i.e. Q5) and the inductive element (i.e. L2) ; a third switch (i.e. Q8) coupled between the inductive element (i.e. L2) and a reference potential node (i.e. ground) ; a fourth switch (i.e. Q10) ; a fifth switch (i.e. Q11) , wherein the fourth switch (i.e. Q10) is coupled between a second voltage rail (i.e. rail of phase N) and the fifth switch (i.e. Q11) , and wherein the fifth switch (i.e. Q11) is coupled (i.e. electrically coupled via Cfly2) between the fourth switch (i.e. Q10) and the second switch (i.e. Q6) ; and a sixth switch (i.e. Q12) coupled between the fifth switch (i.e. Q11) and the reference potential node (i.e. ground) , wherein a signal path (i.e. path through Cfly2) is coupled between a first node (i.e. node between Q5, Q6) of the SMPS and a second node (i.e. node between Q11, Q12) of the SMPS, wherein the first node (i.e. node between Q5, Q6) is between a terminal of the first switch (i.e. Q5) and a terminal of the second switch (i.e. Q6) , and wherein the second node (i.e. node between Q11, Q12) is between a terminal of the fifth switch (i.e. Q11) and a terminal of the sixth switch (i.e. Q12) . Regarding claim 2 : (i.e. figure 14) wherein the signal path (i.e. path through Cfly2) comprises a capacitive element (i.e. Cfly2) and wherein the fifth switch (i.e. Q11) is coupled between the fourth switch (i.e. Q10) and the second switch (i.e. Q6) through the capacitive element (i.e. Cfly2) . Regarding claim 3 : (i.e. figure 14) further comprising: a seventh switch (i.e. Q1) ; an eighth switch (i.e. Q2) , wherein the seventh switch (i.e. Q1) is coupled between the first voltage rail (i.e. rail of phase 2) and the eighth switch (i.e. Q2) , and wherein the eighth switch (i.e. Q2) is coupled between the seventh switch (i.e. Q1) and the reference potential node (i.e. ground) ; and a first capacitive element (i.e. Cfly1) coupled (i.e. electrically coupled) between the seventh switch (i.e. Q1) and the fifth switch (i.e. Q11) . Regarding claim 7 : (i.e. figure 14) wherein the first voltage rail is shorted to the second voltage rail (i.e. rail for phase N) (i.e. rail for phase 2) . Regarding claim 8 : (i.e. figure 14) wherein: a first current is configured to flow from the first voltage rail (i.e. rail of phase 2) to the inductive element (i.e. L2) through the first switch (i.e. Q5) and the second switch (i.e. Q6) during a charge phase; and a second current is configured to flow from the reference potential node (i.e. ground) to the inductive element (i.e. L2) through the third switch (i.e. Q8) during a discharge phase. Regarding claim 9 : (i.e. figure 14) wherein: a first current is configured to flow from the first voltage rail (i.e. rail of phase 2) to the inductive element (i.e. L2) through the first switch (i.e. Q5) and the second switch (i.e. Q6) during a discharge phase; and a second current is configured to flow from the second voltage rail (i.e. rail of phase N) to the inductive element (i.e. L2) through the fourth switch (i.e. Q10) , the fifth switch (i.e. Q11) , and the second switch (i.e. Q6) during a charge phase . Claim Rejections - 35 USC § 103 07-20-aia AIA 8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21 AIA 9. Claim 11 is rejected under 35 U.S.C. 103(a) as being unpatentable over Jong et al. (US 20220231601) in view of Din et al. (US 10393818) . Regarding claim 11 : Jong et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose a first battery coupled between the first voltage rail and the reference potential node; and a second battery coupled between the second voltage rail and the first battery. Din et al. disclose a power supply having multiple power stage (i.e. figure 3) comprising a first battery (i.e. 306(4)) coupled between the first voltage rail (i.e. rail to stage 3) and the reference potential node (i.e. - node) ; and a second battery (i.e. 306(2)) coupled between the second voltage rail (i.e. rail to stage 2) and the first battery (i.e. 360(4)) . Therefore, it would have been obvious to one with ordinary skill in the art at the time the invention was made to modify the circuit of Jong et al.’s invention with power supply as disclose by Din et al. to have the storage devices such as batteries for a wide range of switching power converter . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 10. Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nguyen Tran/Primary Examiner, Art Unit 2838 Application/Control Number: 18/894,666 Page 2 Art Unit: 2838
