DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received September
24, 2024 for application number 18/894776. The Office hereby acknowledges receipt of the
following and placed of record in file: Specification, Drawings, Abstract, Oath/Declaration, IDS, and
Claims.
Notice of Pre-AIA or AIA Status
The present application, filed on or after September 24, 2024, is being examined under
the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on November 18, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35
U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction
of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be
considered a new ground of rejection if the prior art relied upon, and the rationale supporting
the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness
rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under
35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or
non-obviousness.
Claims 1, 6, 10, 13-17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu (US 2022/0229485 A1) in view of Schutte (US 2007/0288770 A1).
Regarding Claim 1, Hsu teaches the following:
“A controller comprising: an interface to a processing resource of a computing system” ([0020] FIG 1. the power management system includes a power controller (110) configured to perform a power management method in a computing system (100) or a system domain, in which the computing system or the system domain includes a plurality of computing nodes (i.e. processing resource) (140) (FIG 1. also depicts the connection between the Computing Node 1 through computing node N (140) and Power Controller (110), which includes the interface between the components);
“A controller processor to: activate, as a response to an event, a power control signal to the processing resource through the interface” ([0021] The power controller is configured to perform a power cap allocation process in response to the one or more computing nodes in the system domain being reset or being connected to an alternating current power source (i.e. an event); the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain (i.e. a power control signal to the processing resource.));
“Update a value of a resource power capping parameter in an iterative power adjustment process” ([0021] the power controller may enable automatic or dynamic re-configuration of the power cap allocation (i.e. update a value of a resource power capping parameter in an iterative manner) in response to a change in the number of computing nodes in the system domain);
“In an iteration of the iterative power adjustment process, provide the updated value of the resource power capping parameter to the processing resource to set a power consumption cap of the processing resource” ([0026] The power management method includes determining the total power available to the pending computing nodes at each iteration of the power cap allocation process, in which each iteration allocates a power cap value to one of a plurality of computing nodes in the system domain (i.e. to set a power consumption cap of the processing resource)).
Hsu does not teach:
“The activated power control signal to place the processing resource in a reduced power mode”
However, in the analogous art of systems and methods for power management of disk drive disk subsystems, Schutte does teach “the activated power control signal to place the processing resource in a reduced power mode” ([0030] power reduction logic 440 (i.e. reduced power mode) may send a reduce power command (490) (i.e. the activated power control signal) to disk drive subsystem 270 (i.e. processing resource), (Power reduction logic 440 is discussed in more detail in connection with FIG. 6). In the embodiment of FIG. 4, power reduction logic 440 interfaces with disk drive subsystem 270 through device driver 450).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Hsu and Schutte before him, the effective filing date of the claimed invention, to include Schutte’s adaptive power management of a disk drive based on temperature in Hsu’s power management method and system for a computing system to reduce the wear and tear on a device and improve device lifespan [Schutte, par 3]).
Regarding Claim 6, Hsu in view of Schutte teaches “The controller of claim 1”. Hsu further teaches:
“Wherein the iterative power adjustment process updates the resource power capping parameter based on a current value of the resource power capping parameter and a current power consumption of the computing system” ([0021] the power controller may enable automatic re-configuration of the power cap allocation (i.e. updates the resource power capping parameter) in response to a change in a parameter related to operational performance and/or power requirements (i.e. current value of resource power capping parameter). The power controller may be configured to determine the respective power cap values for the computing nodes in the system domain, in response to a change in the total power (i.e. current power consumption of computing system)).
Regarding Claim 10, the combination Hsu in view of Schutte teaches “The controller of claim 9, wherein the controller processor is to: ”
Hsu further teaches:
“Exit the iterative power adjustment process in response to determining that the updated resource power capping parameter would cause the system power capping parameter to be exceeded” ([0035] The power controller is configured such that the total power decreases and the power ratio increases with each iterative update; [0036] the power cap values can be assigned so that each computing node is allocated a power cap value that is sufficient for each computing node to be operational, regardless of its position in the order of powering-on, and regardless of when the computing node is added to the computing system; using the power management method disclosed herein, the total power requirement of all the computing nodes does not exceed the total power available to the system domain (i.e. the maximum is determined and thus is considered and will not be exceeded when allocating power cap values to the computing nodes)).
Regarding Claim 13, Hsu in view of Schutte teaches “The controller of claim 1”. Hsu further teaches:
“Wherein the iterative power adjustment process iteratively adjusts power consumption of the processing resource in a plurality of iterations” ([0026] The power management method includes determining the total power available to the pending computing nodes at each iteration of the power cap allocation process, in which each iteration allocates a power cap value to one of a plurality of computing nodes in the system domain).
Hsu does not teach:
“Wherein the activating of the power control signal as the response to the event is part of a quick reaction power reduction process”
However, Schutte does teach “Wherein the activating of the power control signal as the response to the event is part of a quick reaction power reduction process” ([0030] power reduction logic 440 may send a reduce power command (490) (i.e. activating the power control signal) to disk drive subsystem 270. (Power reduction logic 440 is discussed in more detail in connection with FIG. 6). In the embodiment of FIG. 4, power reduction logic 440 interfaces with disk drive subsystem 270 through device driver 450; [0033] when the drive temperature is above the higher threshold (i.e. response to the event), it results in immediate drive power reduction).
Regarding Claim 14, Hsu in view of Schutte teaches “The controller of claim 13”.
Schutte teaches:
“Wherein the event is responsive to one or more of: a power supply becoming unavailable, a power consumption of the computing system exceeding a critical power threshold, or a temperature of the computing system exceeding a temperature threshold” ([0033] where drive temperature above the higher threshold (i.e. a temperature of the computing system exceeding a temperature threshold) results in immediate drive power reduction).
Regarding Claim 15, Hsu in view of Schutte teaches “The controller of claim 13”. Hsu further teaches:
“Wherein the controller processor is to: trigger the iterative power adjustment process” ([0029] the power controller is configured to iterate a power cap allocation process).
Hsu does not teach:
“Trigger a power adjustment but not the quick reaction power reduction process in response to a further event”
However, Schutte does teach “Trigger a power adjustment process but not the quick reaction power reduction process in response to a further event” ([0035] If the current drive temperature does not exceed the first predefined threshold, then this temperature is compared (block 540) to a second predefined threshold. If the temperature does not exceed the second threshold, then the check temperature processing is finished. (Figure 5A references a flowchart in which the RESTART TIMER function is enacted when CURR. TEMP. does not exceed THRESH 530. Therefore, not initiating the immediate drive power reduction in response to the event of not exceeding a threshold)).
Regarding Claim 16, Hsu in view of Schutte teaches “The controller of claim 15”. Hsu further teaches:
“Wherein the further event is responsive to one or more of: a modification of a power consumption cap for the computing system, a power consumption of the computing system exceeding a first power threshold that is less than a critical power threshold, or a change in a power allocation for the computing system” ([0021] The computing system may be configured to perform the node initialization and/or power inventory process (220) (i.e. an event leading to adjusting the power cap).
Regarding Claim 17, Hsu teaches the following:
“A computing system comprising: a processing resource; and a controller” ([0020] The power management system includes a power controller (110) configured to perform a power management method in a computing system (100) or a system domain, in which the computing system or the system domain includes a plurality of computing nodes (140) (i.e. processing resource));
“Trigger an iterative power adjustment process to iteratively update a resource power capping parameter to set a power consumption cap of the processing resource” ([0026] The power management method includes determining the total power available to the pending computing nodes at each iteration of the power cap allocation process, in which each iteration allocates a power cap value to one of a plurality of computing nodes in the system domain.) ([0021] the power controller may enable automatic or dynamic re-configuration of the power cap allocation (i.e. update a value of a resource power capping parameter) in response to a change in the number of computing nodes in the system domain)
Hsu does not teach:
“In response to a power event, trigger a quick reaction power reduction process of the controller that includes activating a power control signal to place the processing resource in a reduced power mode”
“After the quick reaction power reduction process, trigger an iterative power adjustment”
However, in the analogous art of systems and methods for power management of disk drive disk subsystems, Schutte teaches the following:
“In response to a power event, trigger a quick reaction power reduction process of the controller that includes activating a power control signal to place the processing resource in a reduced power mode” ([0030] power reduction logic 440 may send a reduce power command (490) to disk drive subsystem 270. (Power reduction logic 440 is discussed in more detail in connection with FIG. 6). In the embodiment of FIG. 4, power reduction logic 440 interfaces with disk drive subsystem 270 through device driver 450; [0033] when the drive temperature is above the higher threshold, it results in immediate drive power reduction);
“After the quick reaction power reduction process, trigger an iterative power adjustment” ([0033] when the drive temperature is above the higher threshold, it results in immediate drive power reduction; [0038] FIG. 6 is a flow chart of one embodiment of the power reduction process 535 in FIG. 5. At block 610, power reduction logic 440 determines whether a scheduled recording is currently in progress. If yes, then at block 620 a timer is started so that the same check can be performed again after a delay (i.e. iterative power adjustment)).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Hsu and Schutte before him, the effective filing date of the claimed invention, to include Schutte’s adaptive power management of a disk drive based on temperature in Hsu’s power management method and system for a computing system to reduce the wear and tear on a device and improve device lifespan (Schutte [0003]).
Regarding Claim 19, Hsu teaches the following:
“A method of a computing system, comprising:” ([0020] The power management system includes a power controller (110) configured to perform a power management method in a computing system (100) or a system domain, in which the computing system or the system domain includes a plurality of computing nodes (140));
“Triggering, by the controller, an iterative power adjustment process to iteratively update a resource power capping parameter to set a power consumption cap of the processing resource” ([0021] the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain; [0026] The power management method includes determining the total power available to the pending computing nodes at each iteration of the power cap allocation process, in which each iteration allocates a power cap value to one of a plurality of computing nodes in the system domain);
Hsu does not teach:
“Receiving a critical power event”
“Based on receipt of the critical power event: triggering, by a controller, a quick reaction power reduction process of the controller that includes activating a power control signal to place a processing resource in a reduced power mode”
“After the quick reaction power reduction process, triggering, by the controller, an iterative power adjustment”
“Receiving a change power event”
“Based on receipt of the change power event, triggering, by the controller, the iterative power adjustment process without triggering the quick reaction power reduction process”
However, in the analogous art of systems and methods for power management of disk drive disk subsystems, Schutte teaches the following:
“Receiving a critical power event” ([0036] In this embodiment, disk drive subsystem 270 notifies temperature monitor 430 when drive temperature has exceeded either of two thresholds [0003] A drive operating at 40 degrees C. can be expected to have a longer life than one operating at 50 degrees C. (High temperatures can lead to data errors, and can also reduce the time-to-failure for the drive, i.e. critical events), par 26));
“Based on receipt of the critical power event: triggering, by a controller, a quick reaction power reduction process of the controller that includes activating a power control signal to place a processing resource in a reduced power mode” ([0033] when drive temperature is above the higher threshold, it results in immediate drive power reduction; [0030] power reduction logic 440 may send a reduce power command (490) to disk drive subsystem 270. (Power reduction logic 440 is discussed in more detail in connection with FIG. 6). In the embodiment of FIG. 4, power reduction logic 440 interfaces with disk drive subsystem 270 through device driver 450);
“After the quick reaction power reduction process, triggering, by the controller, an iterative power adjustment” ([0033] when the drive temperature is above the higher threshold, it results in immediate drive power reduction; [0038] FIG. 6 is a flow chart of one embodiment of the power reduction process 535 in FIG. 5. At block 610, power reduction logic 440 determines whether a scheduled recording is currently in progress. If yes, then at block 620 a timer is started so that the same check can be performed again after a delay);
“Receiving a change power event” ([0033] when drive temperature is above the higher threshold, it results in immediate drive power reduction);
“Based on receipt of the change power event, triggering, by the controller, the iterative power adjustment process without triggering the quick reaction power reduction process” ([0036] In this embodiment, disk drive subsystem 270 notifies temperature monitor 430 when drive temperature has exceeded either of two thresholds (i.e. Critical Power Event)); [0030] power reduction logic 440 may send a reduce power command (490) to disk drive subsystem 270. (Power reduction logic 440 is discussed in more detail in connection with FIG. 6). In the embodiment of FIG. 4, power reduction logic 440 interfaces with disk drive subsystem 270 through device driver 450; [0035] If the current drive temperature does not exceed the first predefined threshold, then this temperature is compared (block 540) to a second predefined threshold. If the temperature does not exceed the second threshold, then the check temperature processing is finished. (Figure 5A references a flowchart in which the RESTART TIMER function is enacted when CURR. TEMP. does not exceed THRESH530. Therefore, not initiating the immediate drive power reduction).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Hsu and Schutte before him, the effective filing date of the claimed invention, to include Schutte’s adaptive power management of a disk drive based on temperature in Hsu’s power management method and system for a computing system to reduce the wear and tear on a device and improve device lifespan (Schutte [0003]).
Claims 2-3, 5, 11-12, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu and Schutte, and further in view of Allen-Ware et al. (US 2015/0241943 A1).
Regarding Claim 2, Hsu in view of Schutte teaches “The controller of claim 1”.
Hsu in view of Schutte, does not teach:
“Wherein the controller processor is to: after activating the power control signal to the processing resources, set the resource power capping parameter to a minimum value”
However, in the analogous art of distributed power management of processor and memory systems, Allen-Ware does teach “Wherein the controller processor is to: after activating the power control signal to the processing resources, set the resource power capping parameter to a minimum value” ([0054] At block 200, a power cap analyzer receives the node power consumption data, the node power cap data, the priority data for all zones, and the zone power consumption data for all zones; [0060] a particular power cap level can be set as the minimum power cap for a zone; [0014] A "power management zone" (hereinafter "zone") is a collection of components that share the same power management controller (hereinafter "controller")).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of Hsu, Schutte, and Allen-Ware before him, the effective filing date of the claimed invention, to incorporate the controller setting the power cap for the power management zones associated with their respective power management controllers into the computing device disclosed by Hsu and Schutte to allow simpler power management hardware to control a subset of the system components, resulting in more responsive power management (Allen-Ware [0002]).
Regarding Claim 3, Hsu in view of Schutte, and further in view of Allen-Ware teaches: the controller of Claim 2. Hsu further discloses
Allen-Ware further teaches:
“Wherein the controller processor is to: after setting the resource power capping parameter to the minimum value, deactivate the power control signal to the processing resource” ([0062] After the power cap analyzer sets the local zone's power cap to a lower power consumption level (i.e. minimum value), control then flows to block 214. (FIG.2, Block 214 of the flowchart depicts the 'End Power Cap Decrease Loop' (i.e. deactivation of the power control signal to the processing resource));
“Wherein the iterative power adjustment process to update the value of the resource power capping parameter is initiated after deactivating the power control signal to the processing resource” ([0062] block 214. (FIG.2, Block 214 of the flowchart depicts the 'End Power Cap Decrease Loop' (i.e. deactivation of the power control signal to the processing resource); [0063] At block 214, the loop in which the power cap analyzer iterated over the zone data ends. At the end of the loop the power cap analyzer has either determined that there is one or more zones with a lower priority than the local zone that can also have their zone power cap lowered (i.e. update the value of the resource power capping parameter)).
Regarding Claim 5, Hsu in view of Schutte, teaches “The controller of claim 1”
Hsu in view of Schutte does not teach:
“Wherein the updated value of the resource power capping parameter causes the processing resource to adjust one or more of an operating frequency of the processing resource or a voltage of the processing resource”
“The resource power capping parameter updated to restrict an amount of power consumed by the processing resource according to the power consumption cap”
However, Schutte does teach “to restrict an amount of power consumed by the processing resource according to the power consumption cap”
Allen-Ware does teach:
“Wherein the updated value of the resource power capping parameter causes the processing resource to adjust one or more of an operating frequency of the processing resource or a voltage of the processing resource” ([0025] When the power cap is updated, the controller determines how to adjust the power cap based on the priority of the zones (i.e. zones comprising processing resources); [0024] if the power cap is increased for both zones, the second zone, running the low priority thread, might not choose to consume more power in response to the increased power cap (i.e. adjust an operating frequency of the processing resource).
“The resource power capping parameter updated to restrict an amount of power consumed by the processing resource according to the power consumption cap” ([0025] When the power cap is updated, the controller determines how to adjust the power cap based on the priority of the zones (i.e. zones comprising processing resources); [0056] the power caps may be lowered based on zone priorities (i.e. restrict an amount of power consumed by the processing resource according to the power cap).
Regarding Claim 11, Hsu in view of Schutte teaches the controller of claim 1:
Hsu further discloses
“A controller processor” ([0021] The power controller is configured to perform a power cap allocation (i.e. power control signal) process in response to the one or more computing nodes in the system domain being reset or being connected to an alternating current power source; the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain (i.e. a power control signal to the processing resource.));
Hsu in view of Schutte does not teach:
“Determine whether the updated value of the resource power capping parameter exceeds a maximum value of the resource power capping parameter”
“Proceed with a next iteration of the iterative power adjustment process in response to determining that the updated value of the resource power capping parameter does not exceed the maximum value”
Allen-Ware does teach:
“Determine whether the updated value of the resource power capping parameter exceeds a maximum value of the resource power capping parameter” ([0045] the zone power cap can be decreased when, if ever, the node power consumption exceeds the node power cap (i.e. determine whether the updated value of the resource power capping parameter exceeds a maximum value);
“Proceed with a next iteration of the iterative power adjustment process in response to determining that the updated value of the resource power capping parameter does not exceed the maximum value” ([0045] the zone power cap can be decreased when, if ever, the node power consumption exceeds the node power cap (i.e. determine whether the updated value of the resource power capping parameter exceeds a maximum value); [0066] The workload analyzer (i.e. power adjustment process) might receive an indication that the node or zone power cap has been updated. The specific indications that can trigger analysis by the workload analyzer can vary between implementations. After the workload analyzer receives the indication that the zone workload should be analyzed to determine characteristics of the workload, control then flows to block 302 (i.e. proceed with a next iteration of the iterative power adjustment process).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of Hsu, Schutte, and Allen-Ware before him, the effective filing date of the claimed invention, to incorporate the controller setting the power cap for the power management zones associated with their respective power management controllers into the computing device disclosed by Hsu and Schutte to allow simpler power management hardware to control a subset of the system components, resulting in more responsive power management (Allen-Ware [0002]).
Regarding Claim 12, the combination of Hsu, Schutte, and Allen-Ware teach “The controller of claim 11”.
Hsu further discloses:
A controller processor ([0021] The power controller is configured to perform a power cap allocation (i.e. power control signal) process in response to the one or more computing nodes in the system domain being reset or being connected to an alternating current power source; the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain (i.e. a power control signal to the processing resource));
“Exit the iterative power adjustment process in response to determining that the updated value of the resource power capping parameter exceeds the maximum value" (([0035] The power controller is configured such that the total power decreases and the power ratio increases with each iterative update; [0036] the power cap values can be assigned so that each computing node is allocated a power cap value that is sufficient for each computing node to be operational; using the power management method disclosed herein, the total power requirement of all the computing nodes does not exceed the total power available to the system domain (i.e. the maximum is determined and thus is considered and will not be exceeded when allocating power cap values to the computing nodes)).
Regarding Claim 18, Hsu in view of Schutte teach “The computing system of claim 17.”
Hsu further teaches “a controller performing an iterative power adjustment process” ([0021] the power controller may enable automatic or dynamic re-configuration of the power cap allocation (i.e. update a value of a resource power capping parameter in an iterative manner) in response to a change in the number of computing nodes in the system domain);
Schutte teaches the quick reaction power reduction process ([0033] when the drive temperature is above the higher threshold, it results in immediate drive power reduction).
Hsu in view of Schutte does not teach:
“Set the resource power capping parameter to a minimum value, and after setting the resource power capping parameter to a minimum value, deactivate the power control signal to allow the processing resource to adjust a power consumption of the processing resource according to the minimum value of the resource power capping parameter”
“Iteratively increase a value of the resource power capping parameter in a plurality of iterations”
Allen-Ware does teach:
“as part of an iterative power adjustment process, iteratively increase a value of the resource power capping parameter in a plurality of iterations” ([0049] the power cap analyzer 110 increases the power cap for zone A 102A (i.e. resource power capping parameter). The zone power cap can be increased based on the priority of the zone, increased proportionally based on the current power consumption, etc. (i.e. plurality of iterations);
“Set the resource power capping parameter to a minimum value, and after setting the resource power caping parameter to the minimum value, deactivate the power control signal to allow the processing resource to adjust a power consumption of the processing resource according to the minimum value of the resource power capping parameter” (([0062] After the power cap analyzer sets the local zone's power cap to a lower power consumption level, control then flows to block 214. (FIG.2, Block 214 of the flowchart depicts the 'End Power Cap Decrease Loop' (i.e. deactivation of the power control signal); At block 212, the power cap analyzer sets the local zone's power cap to a lower power consumption; the power cap analyzer can lower the local zone's power cap by a single increment until the process is run again).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of Hsu, Schutte, and Allen-Ware before him, the effective filing date of the claimed invention, to incorporate the controller setting the power cap for the power management zones associated with their respective power management controllers into the computing device disclosed by Hsu and Schutte to allow simpler power management hardware to control a subset of the system components, resulting in more responsive power management (Allen-Ware [0002]).
Regarding Claim 20, Hsu in view of Schutte teach “The method of claim 19”
Hsu further teaches “An updated value of the resource power capping parameter” ([0026] The power management method includes determining the total power available to the pending computing nodes at each iteration of the power cap allocation process, in which each iteration allocates a power cap value to one of a plurality of computing nodes in the system domain).
Hsu in view of Schutte does not teach:
“Updating the resource power capping parameter causes the processing resource to adjust one or more of an operating frequency of the processing resource or a voltage of the processing resource to restrict an amount of power consumed by the processing resource”
Allen-Ware does teach:
“Updating the resource power capping parameter causes the processing resource to adjust one or more of an operating frequency of the processing resource or a voltage of the processing resource to restrict an amount of power consumed by the processing resource” ([0016] In general, the lower the performance state, the lower the processor frequency and processor voltage, and thus, the lower the performance of the computing system; [0047] In some implementations, the power cap analyzer 110 determines, based on the performance states (i.e., power consumption) of the lower priority zones, whether the lower priority zones can cover the excess power consumption. If not, the power cap analyzer 110 can lower the zone power cap immediately.
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of Hsu, Schutte, and Allen-Ware before him, the effective filing date of the claimed invention, to incorporate the controller setting the power cap for the power management zones associated with their respective power management controllers into the computing device disclosed by Hsu and Schutte to allow simpler power management hardware to control a subset of the system components, resulting in more responsive power management (Allen-Ware [0002]).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Hsu, Schutte, Allen-Ware and further in view of Li et al. (US 2019/0041937 A1).
Regarding Claim 4, Hsu in view of Schutte, and further view of Allen-Ware teach the controller of Claim 3. Hsu further discloses:
“The controller processor” ([0021] The power controller is configured to perform a power cap allocation (i.e. power control signal) process in response to the one or more computing nodes in the system domain being reset or being connected to an alternating current power source; the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain (i.e. a power control signal to the processing resource));
Allen-Ware further teaches:
“Deactivating the power control signal before initiating the iterative power adjustment process” ([0062] block 214. (FIG.2, Block 214 of the flowchart depicts the 'End Power Cap Decrease Loop' (i.e. deactivation of the power control signal to the processing resource); [0063] At block 214, the loop in which the power cap analyzer iterated over the zone data ends. At the end of the loop the power cap analyzer has either determined that there is one or more zones with a lower priority than the local zone that can also have their zone power cap lowered (i.e. deactivation of the signal before initiating the power adjustment process).
Hsu in view of Schutte, and further view of Allen-Ware does not teach:
“Wait a specified stabilization duration after completing the power control signal”
However, in the analogous art of power allocation in computer systems, Li does teach “Wait a specified stabilization duration after completing the power control signal” ([0044] The updated power capping amount is provided to the management controller 104 and set to the node. The management software 120 then proceed to block 316 to wait for a next schedule or iteration of the power capping determination (i.e. wait a specified stabilization duration).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Hsu, Schutte, Allen-Ware and Li before him, the effective filing date of the claimed invention, to incorporate Li’s system allocating a power amount to a plurality of computing devices into the computing device disclosed by Hsu, Schutte, and Allen-Ware to mitigate insufficient power environments comprising multiple loads. (Li [0003]).
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu and Schutte, and further in view of Kim (US 2021/0051620 A1).
Regarding Claim 7, Hsu in view of Schutte teach “The controller of claim 6”
Hsu further teaches:
“Wherein the iterative power adjustment process updates the resource power capping parameter based on the current value of the resource power capping parameter” ([0021] the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain).
Hsu in view of Schutte does not teach:
“Updates the resource power capping parameter based on a current value and a difference between a system power capping parameter and the current power consumption of the computing system”
However, in the analogous art of synchronization methods for Time Division Duplexing (TDD), Kim does teach “Updates the resource power capping parameter based on a current value and a difference between a system power capping parameter and the current power consumption of the computing system” ([0043] If the power level is less than the threshold (i.e. system power capping parameter) (317), then an iterative process (319) can be used to continue checking the power level (i.e. current power value) in order to determine when it exceeds the threshold. As an example, if the BTS (Base Transceiver Station) is off, no synchronization is performed and the system will check the power level (i.e. current power level) before starting the synchronization process. In this iterative case, the system may or not be initialized as the input signal is received and the power level measured and compared to the threshold (i.e. difference between system power capping parameter and the current power consumption).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Hsu, Schutte, and Kim before him, the effective filing date of the claimed invention, to incorporate the sync switching pulse, detection method for time division duplexing (TDD) systems into the computing device as disclosed by Hsu and Schutte to extract a highly accurate time division duplexing synchronization pulse without a complicated demodulator or a correlator (Kim [0006]).
Regarding Claim 8, the combination of Hsu, Schutte, and Kim teach “The controller of claim 7”.
Hsu further teaches “Wherein the iterative power adjustment process updates the resource power capping parameter based on the current value of the resource power capping parameter” ([0021] the power controller may enable automatic or dynamic re-configuration of the power cap allocation in response to a change in the number of computing nodes in the system domain).
Hsu in view of Schutte does not teach:
“Updating power capping parameter based on current value of the parameter and a scaled value of the difference”
Kim does teach “Updating power capping parameter based on current value of the parameter and a scaled value of the difference” ([0043] In this iterative case, the system may or not be initialized as the input signal is received and the power level measured (i.e. current value) and compared to the threshold (i.e. a scaled value of the difference)).
Regarding Claim 9, the combination of Hsu, Schutte, and Kim teach “The controller of claim 7”
Kim further teaches:
“Wherein the controller processor is to: determine whether the updated resource power capping parameter would cause the system power capping parameter to be exceeded” ([0043] The TDD/FDD (Time Division Duplexing) Power Meter (i.e. controller processor) is utilized to determine if power level is less than the threshold (317), then an iterative process (319) can be used to continue checking the power level in order to determine when it exceeds the threshold (i.e. determine whether the updated resource power capping parameter would cause the system power capping parameter to be exceeded));
“Proceed with a next iteration of the iterative power adjustment process in response to determining that the updated resource power capping parameter would not cause the system power capping parameter to be exceeded” ([0043] If the power level is less than the threshold (317), then an iterative process (319) can be used to continue checking the power level in order to determine when it exceeds the threshold).
Conclusion
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/J.L.R./
Examiner, Art Unit 2175
/ANDREW J JUNG/Supervisory Patent Examiner, Art Unit 2175