Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 - 5 are rejected under 35 U.S.C. 103 as being unpatentable over Crompton et al. (US Pub. No. 20130092432), hereinafter referred to as Crompton in view of Choi et al. (US Pub. No. 20070180170), hereinafter referred to as Choi.
As to claim 4, Crompton discloses wherein the diode includes an anode and a cathode (rectifying diode, D1, Fig. 6), wherein the capacitor is coupled to the cathode of the diode (storage capacitor, C1, coupled to the cathode of D1, Fig. 6).
Choi discloses, what Crompton lacks, wherein the first UART connector is coupled to the anode of the diode (USB connector 1100 providing UART connector signal lines D+_RXD and D−_TXD connected to UART TXD/RXD ports, Fig. 8, paras. [0089]-[0090] — Choi); and
wherein the first UART connector is on a surface of the device (USB connector 1100 providing an interface to an external device and carrying UART connector signal lines, Figs. 8–9, paras. [0089], [0093] — Choi).
Crompton and Choi are analogous art because they are from the same problem-solving area of providing communication interfaces between electronic devices and circuitry associated with communication signal lines.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Crompton and Choi before him or her, to modify the 1-Wire communication interface of Crompton to include the UART communication interface of Choi, including UART connector signal lines coupled to UART receive and transmit ports because Choi teaches that a connector can provide an interface to an external device and that its connector signal lines are selectively connected to UART TXD and UART RXD ports through analog switch 1200.
The suggestion/motivation for doing so would have been to permit Crompton's device to communicate using the known UART serial communication interface taught by Choi and thereby provide an interface capable of communicating with UART-compatible external devices.
Therefore, it would have been obvious to combine Choi with Crompton to obtain the invention as specified in the instant claim.
As to claim 5, the modified device of Crompton discloses the device of claim 4, wherein the first UART connector is a UART receive connector (USB connector 1100 having D−_TXD connector signal line connected to UART reception signal RXD port, Fig. 8, para. [0089] — Choi), further comprising: a UART transmit connector (USB connector 1100 having D+_RXD connector signal line connected to UART transmission signal TXD port, Fig. 8, para. [0089] — Choi);
a UART receive pin (UART reception signal RXD port, Fig. 8, paras. [0089]-[0090] — Choi); and
a UART transmit pin (UART transmission signal TXD port, Fig. 8, paras. [0089]-[0090] — Choi);
wherein the UART receive connector is coupled to the UART receive pin (D−_TXD connector signal line coupled through analog switch 1200 to UART RXD port, Fig. 8, paras. [0089]-[0090] — Choi), and
wherein the UART transmit connector is coupled to the UART circuit and to the UART transmit pin (D+_RXD connector signal line coupled through analog switch 1200 to UART TXD port provided from or to system controller, Fig. 8, paras. [0089]-[0091] — Choi).
Allowable Subject Matter
Claims 1, 6 – 13 and 15 - 23 allowed.
The following is an examiner’s statement of reasons for allowance:
the prior art, does not teach or fairly suggest:
In claim 1: a power management circuit coupled to the switch or diode and to the capacitor; wherein the capacitor is configurable to charge to a line voltage of a UART data channel within a duration of a single UART bit, also claims 13 and 19.
Further the combination of the above limitations with all of the other limitations in the respective independent claim is not obvious.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUANITO C BORROMEO whose telephone number is (571)270-1720. The examiner can normally be reached on Monday - Friday 9 - 5.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached on 5712724176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUANITO C BORROMEO/ Assistant Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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