DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined
under the first inventor to file provisions of the AIA .
Claim Objection
2. Claims 12-14 and 16-18 are objected to because of the following informalities:
In line 5 of claim 12: “… the display driver; ..." should be changed to --... the display driver, ...--; and
In line 8 of claim 12: “… a noise interference mode; ..." should be changed to --... a noise interference mode, and ...--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claims 1-2, 5, 12-13 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen’994 (U.S. Pub. No. US 2014/0062994 A1) in view of Lee (U.S, Patent No. US 9,305,483 B2).
As to claim 1, Chen’994 (Figs. 1-11) teaches a control method of a display control circuit that comprises a timing controller (a timing controller 1; Fig. 1A) and a display driver (a source driver 20 and a gate driver 22; Fig. 1A), comprising:
setting an asynchronization signal which indicates that the timing controller is desynchronized from the display driver (when at least one source driving unit 200 of the source driver 20 has not locked the timing signal, the output status of the first time-locking signal L1 is at a low-voltage level; [0032], lines 8-11);
when determining that a time duration (a time duration between a time T1 and a time T3) of the asynchronization signal (the first time-locking signal L1 (low-voltage level)) is less than a given time duration (a given time duration between the time T1 and a time T2), performing a noise interference mode (at the time T1, performing noise interference; [0042], lines 1-6) (Figs. 4-5).
Chen’994 does not expressly teach after performing the noise interference mode and when determining that the time duration of the asynchronization signal is equal to or greater than the given time duration, performing a crash reset mode.
Lee (Figs. 1-10) teaches
after performing the noise interference mode (a surge of very high voltage such as electrostatic discharge (ESD) or/and electrical overstress (EOS)) and when determining that the time duration of the asynchronization signal is equal to or greater than the given time duration (the time period t1) (Fig. 7), performing a crash reset mode (outputting black data for display during the time period t3) (Fig. 7).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have used black data as taught by Lee in a control method for a display control circuit of Chen’994 because black data is output is to prevent the data signal of the unknown state from being displayed on the panel during the black data period.
As to claim 2, Chen’994 teaches
wherein in the noise interference mode (the noise interference mode during the time duration between the time T1 and the time T3), a last driving voltage (a high level voltage of a gate driving signal S1) prior to occurrence of the asynchronization signal (the output status of the first time-locking signal L1 is at a low-voltage level) is kept for the time duration of the asynchronization signal (the high level voltage of gate driving signals S2, S3 and S4 during a period between the time T1 and the time T2) (Fig. 4).
As to claim 5, Chen’994 teaches
wherein the given time duration (the given time duration between the time T1 and a time T2) is a time duration for enabling at least one scan line (a scan line of the gate driving signal S2) (Fig. 4) or displaying at least one image frame.
As to claims 12-13 and 16, these claims differ from claims 1-2 and 5, respectively, in that claims 1-2 and 5 are control method claims whereas claims 12-13 and 16 are display control circuit claims thereof. Thus, claims 12-13 and 16 are analyzed as previous discussed with respect to claims 1-2 and 5, respectively.
5. Claims 3 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen’994 in view of Lee as applied to claim 1/12 above, and further in view of Chen’433 (U.S. Pub. No. US 2008/0204433 A1).
As to claim 3, Chen’994 and Lee teach the control method according to claim 1.
Chen’994 and Lee do not expressly teach wherein in the crash reset mode, a last driving voltage prior to occurrence of the asynchronization signal is adjusted to be equal to a common voltage applied to a common electrode until the time duration of the asynchronization signal ends.
Chen’433 (Figs. 1-7) teaches
wherein in the crash reset mode (when the first black insertion control signal is 0; [0041], lines 1-2), a last driving voltage prior to occurrence of the asynchronization signal is adjusted to be equal to a common voltage applied to a common electrode until the time duration of the asynchronization signal ends (the first black insertion control signal serves as a so-called black signal, and is then converted to a black driving voltage having a value the same as that of the common voltage; [0041], lines 4-7) (Fig. 3).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have used a common voltage as taught by Chen’433 in a control method for a display control circuit of Chen’994 as modified by Lee because the common voltage is used to prevent light beams from transmitting the target pixels for generating a black image.
As to claim 14, this claim differs from claim 3 in that claim 3 is a control method claim whereas claim 14 is a display control circuit claim thereof. Thus, claim 14 is analyzed as previous discussed with respect to claim 3.
Allowable Subject Matter
6. Claims 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claim(s).
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record, Chen’994, Lee, and Chen’433, either individually or in combination, does not teach a limitation “wherein the display driver includes: a display driving unit coupled to the timing controller and configured to set the asynchronization signal; and a time detecting unit coupled to the display driving unit and configured to determine the time duration of the asynchronization signal” of claim 17 in combination with other limitations of the base claim.
Conclusion
7. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Komine (U.S. Pub. No. US 2013/0271586 A1) is cited to teach an endoscope system that outputs an optimal image according to a synchronized state between a phase of an image pickup signal and a phase of a reference clock signal.
Kawamura (U.S. Pub. No. US 2013/0021497 A1) is cited to teach an image pickup apparatus and a dark current correction method that make it possible to correct the dark current at high precision without using a driving pattern of a peripheral circuit or a layout on an image pickup device chip.
Inquiry
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kwang-Su Yang whose telephone number is (571)270-7307. The examiner can normally be reached on Mon-Fri during 9:00am-6:00pm EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh Nguyen, can be reached on (571)272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KWANG-SU YANG/
Primary Examiner, Art Unit 2623
Prosecution Insights