DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No.22044747.6, filed on 3/31/2022.
The Information Disclosure Statements
The prior art cited in the information disclosure statements filed on 9/25/2024, 10/7/2025 has been considered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 7-9, 19-20 is/are rejected under 35 U.S.C. 102 (1)(1)/(a)(2) as being anticipated by Albrechtsen (US 20220283372 A1) [hereinafter Albrechtsen].
As to claims 1, 20, Albrechtsen teaches a semiconductor structure for a photonic integrated circuit (abstract), comprising: a waveguide (1, Figs. 1, 4); an active component (2, Figs. 1, 4; paragraph 0013; note the waveguide 2 is coupled to an electric current 11, thus active component) of the photonic integrated circuit; and an electrically resistive material (3, Figs. 1, 4) between the waveguide and the active component along a light propagation axis between the waveguide and the active component, wherein the electrically resistive material has an electrical resistivity higher than the waveguide (note air gap 3, a perfect insulator, is inherently higher resistivity than semiconductor waveguide which is conductive to some degree).
As to claim 2, Albrechtsen teaches all as applied to claim 1, and in addition the limitation ‘the electrical resistivity of the electrically resistive material is at least eight orders of magnitude higher than the electrical resistivity of the waveguide,’ is intended use. A recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim.
As to claim 3, Albrechtsen teaches all as applied to claim 1, and in addition teaches wherein the waveguide comprises a first surface, and the active component comprises a second surface, wherein the first surface and the second surface are coplanar (1, 2, Figs. 1, 4 both elements are coplanar).
As to claim 7, Albrechtsen teaches all as applied to claim 1, and in addition the limitation ‘a length of the electrically resistive material along the light propagation axis is equal to an odd integer multiplied by a quarter of the given wavelength of light,’ is intended use. A recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim.
As to claim 8, Albrechtsen teaches all as applied to claim 1, and in addition teaches wherein: the active component is a photodetector (paragraph 0013).
As to claim 9, Albrechtsen teaches all as applied to claim 1, and in addition teaches wherein: the electrically resistive material is a dielectric material; or the electrically resistive material is air (3, Figs. 1,4; paragraph 0048).
As to claim 19, Albrechtsen teaches all as applied to claim 1, and in addition teaches wherein at least one of: (i) a first side of the electrically resistive material in contact with the active component is at a non-zero angle relative to a second side of the electrically resistive material in contact with the waveguide; and (ii) the electrically resistive material is in contact with the active component (1, 3, 2, Figs. 1, 4).
Allowable Subject Matter
Claims 4-6, 10-15 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As to claim 4, the prior art of record, taken alone or in combination, fails to disclose or render obvious a semiconductor structure, comprising: a first layer in contact with the waveguide and between the waveguide and a substrate; and a second layer in contact with the active component and between the active component and the substrate, wherein: the electrically resistive material is between the first layer and the second layer , in combination with the rest of the limitations of the claim. Claim 5 depends on claim 4.
As to claim 6, the prior art of record, taken alone or in combination, fails to disclose or render obvious a semiconductor structure, comprising: a first cladding layer in contact with the waveguide; and a second cladding layer in contact with the active component, wherein: the electrically resistive material is between the first cladding layer and the second cladding layer, in combination with the rest of the limitations of the claim.
As to claim 10, the prior art of record, taken alone or in combination, fails to disclose or render obvious a semiconductor structure according to claim 1, wherein: (i) the waveguide comprises a tapered portion in contact with the electrically resistive material; and a width of the tapered portion in a direction perpendicular to the light propagation axis is progressively greater at positions further away from the electrically resistive material; or (ii) the waveguide comprises a tapered portion in contact with the electrically resistive material; and a width of the tapered portion in a direction perpendicular to the light propagation axis is progressively greater at positions further away from the electrically resistive material, and the width of the tapered portion at a position closest to the electrically resistive material is less than 400 nanometers, in combination with the rest of the limitations of the claim.
As to claim 11, the prior art of record, taken alone or in combination, fails to disclose or render obvious a semiconductor structure, wherein at least one of the waveguide and the active component comprises a facet at least partially in contact with the electrically resistive material; or wherein at least one of the waveguide and the active component comprises a facet at least partially in contact with the electrically resistive material and wherein the facet intersects the light propagation axis at a non-perpendicular angle, in combination with the rest of the limitations of the claim. Claims 12-15 depend on claim 11.
Claims 16-18, are allowed over the prior art of record.
The following is an examiner’s statement of reasons for allowance:
As to claim 16, the prior art of record, taken alone or in combination, fails to disclose or render obvious a method of manufacturing a semiconductor structure for a photonic integrated circuit, the method comprising: at least partly forming a waveguide and an active component on a substrate, wherein a contact side of the waveguide is in contact with the active component; removing a portion of at least one of the waveguide or the active component; and depositing an electrically resistive material in a space formed by the removing the portion of at least one of the waveguide or the active component, in combination with the rest of the limitations of the claim.
Claims 17-18 are allowed by the virtue of dependency on the allowed claim 16.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Menard et al. (US 2018/0299622 A1) teaches packaging of photonic integrated circuit comprising waveguide geometry 1100, air gap, and MEMSM 1100 (Fig.1; paragraph 0114).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABDULLAHI NUR whose telephone number is (571)270-1298. The examiner can normally be reached on M-F, 9am to 6pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kara Geisel, can be reached on 571-272-2416. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ABDULLAHI NUR/Primary Examiner, Art Unit 2886
Prosecution Insights