Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
The instant application having Application No. 18/896,897 has claims 1-20 pending filed on 09/26/2024; there are 3 independent claims and 17 dependent claims, all of which are ready for examination by the examiner.
Response to Arguments
This Office Action is in response to applicant’s communication filed on December 11, 2025 in response to PTO Office Action dated September 11, 2025. The Applicant’s remarks and amendments to the claims and/or specification were considered with the results that follow.
Claim Rejections
Claim Rejections - 35 USC § 101
In view of the applicant’s clarification and explanation especially for the in the context of the independent claims 1, 10 and 16 (dated 12/11/2025), the 35 U.S.C. § 101 rejection for a judicial exception (an abstract idea) without significantly more of the claims 1-20 is maintained. The examiner respectfully disagrees with arguments on pages 13-15 in regards to the independent claims 1, 10 and 16. The applicant states that “The Claims Are Integrated into a Practical Application (Step 2A, Prong 2). Even if the Examiner were to view the claims as involving abstract information (e.g. "offset information"), the claims are still integrated into a practical application that improves the functioning of a storage system. Specifically, the claimed invention provides a host-driven zone-level garbage collection scheme, in which the host device provides identification and offset information for zones containing valid data; the memory controller converts the offset information to physical addresses; and the memory device internally copies the valid data directly between physical memory areas. This configuration eliminates unnecessary host-to-device data transfers and thereby reduces data movement time and internal garbage collection load, a clear improvement to computer system efficiency, not a mere abstract use of mathematical relationships. The Claims Recite Significantly More Than Any Judicial Exception (Step 2B). Under Step 2B, the amended claims recite specific technical elements: ‘a memory controller,’ ‘a memory device,’ ‘physical addresses,’ and ‘zones’ that interact in a particular hardware architecture to perform physical data relocation operations. These are not generic computer functions but concrete, structured operations that realize a tangible improvement in memory management and data transfer performance”. However, this is not an improvement in the functioning of the computer or an improvement to other technology and is merely using a computer as a tool to perform the concept. Any described improvement would occur for mental/manual process (abstract idea) as well. As stated in MPEP 2106.05(a) “It is important to note that in order for a method or system or device claim to improve computer functionality, the broadest reasonable interpretation of the claim must be limited to computer implementation. That is, a claim whose entire scope can be performed mentally, cannot be said to improve computer technology.” Here, there are no additional elements to really consider – any improved aspect is an improved mental process for “a memory controller,” “a memory device,” “physical addresses,” and “zones” which alone does not provide integration into a practical application or significantly more. The amendment to the independent claims 1, 10 and 16 does not provide an improvement in the functioning of the computer or an improvement to other technology and is merely using a computer as a tool to perform the concept.
Claim Rejections - 35 USC § 103
35 USC § 103 Rejection of claims 1-20
Applicant's arguments filed on 12/11/2025 with respect to the claims 1-20 have been fully considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Independent Claims 1, 10 and 16
As per claim 1:
Claim 1 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim 1 recites: A storage device comprising; a memory device including a plurality of zones corresponding to groups of consecutive logical addresses provided from a host device; the plurality of zones including a first zone and a second zone; and a memory controller configured to receive a garbage collection request from the host device; wherein the garbage collection request provided from the host device includes first identification information identifying the first zone; a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone; second identification information identifying the second zone; second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; and control, in response to the garbage collection request, the memory device; and control, in response to the garbage collection request, the memory device; to acquire, based on the plurality of first offset information items, physical addresses corresponding to the plurality of valid data items; and to store the plurality of valid data items of the first zone in the second zone.
Step 1: Statutory Category:
Yes, the claim recites a Storage Device.
Step 2A – Prong 1: Judicial Exception Recited:
The limitations of the claim recites storage device comprising; a memory device including a plurality of zones corresponding to groups of consecutive logical addresses provided from a host device; the plurality of zones including a first zone and a second zone; and a memory controller configured to: receive a garbage collection request from the host device; wherein the garbage collection request provided from the host device includes first identification information identifying the first zone; a plurality of items indicating positions at which the plurality of; second identification information identifying the second zone; indicating positions at which the; and control, in response to the garbage collection request, the memory device; and control, in response to the garbage collection request, the memory device; to acquire, based on the plurality of first offset information items; and to store the plurality of valid data items of the first zone in the second zone. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind, then it falls within the “Mental Processes” grouping of abstract ideas. As per MPEP 2106,04(a)(2) III “The courts consider a mental process (thinking) that ‘can be performed in the human mind, or by a human using a pen and paper’ to be an abstract idea. CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1372, 99 USPQ2d 1690, 1695 (Fed. Cir. 2011)”. Accordingly, the claim recites an abstract idea.
Step 2A – Prong 2: Integrated into a Practical Application
This judicial exception is not integrated into a practical application. The additional elements of “first offset information”, “valid data items are stored in the first zone”, “second offset information”, “plurality of valid data items are to be stored in the second zone” and “physical addresses corresponding to the plurality of valid data items” in the claim limitations do not improve the functioning of a computer, or an improvement to storage device or other technology and is merely using a computer or storage device as a tool to perform the concept. Accordingly, there are no additional elements in the claim limitations that integrate the abstract idea into a practical application. The claim is directed to an abstract idea.
Step 2B: Claims provide an Inventive Concept
The claim 1 does not have additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, there are no additional elements that are sufficient to amount to significantly more than the judicial exception. The claim 1 is not patent eligible.
As per claim 10:
Claim 10 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim 10 recites: A method of operating a storage device comprising a memory controller and a memory device, the method comprising; receiving, from a host device, first identification information identifying a first zone among a plurality of zones of a memory device; a plurality of first offset information items indicating positions at which a plurality of valid data items are stored in the first zone; second identification information identifying a second zone among the plurality of zones; and second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; acquiring, by the memory controller, a plurality of first physical addresses indicating memory areas in which the plurality of valid data items are stored; based on the first identification information and the plurality of first offset information items; reading, by the memory device, the plurality of valid data items from memory areas indicated by the plurality of first physical addresses included in the first zone; acquiring, by the memory controller, a plurality of second physical addresses indicating memory areas in which the plurality of valid data items are to be stored; based on the second identification information and the second offset information; and storing, by the memory device, the plurality of read valid data items in memory areas indicated by the plurality of second physical addresses included in the second zone.
Step 1: Statutory Category:
Yes, the claim recites a Method.
Step 2A – Prong 1: Judicial Exception Recited:
The limitations of the claim recites a method of operating a storage device, the method comprising; receiving, from a host device, first identification information identifying a first zone among a plurality of zones of a memory device; a plurality of first offset information items indicating positions at which a plurality of valid data items are stored in the first zone; second identification information identifying a second zone among the plurality of zones; and second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; acquiring, by the memory controller, a plurality of first physical addresses indicating memory areas in which the plurality of valid data items are stored; reading, by the memory device, the plurality of valid data items from memory areas included in the first zone; acquiring, by the memory controller, memory areas in which the plurality of valid data items are to be stored; and storing, by the memory device, the plurality of read valid data items in memory areas included in the second zone. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind, then it falls within the “Mental Processes” grouping of abstract ideas. As per MPEP 2106,04(a)(2) III “The courts consider a mental process (thinking) that ‘can be performed in the human mind, or by a human using a pen and paper’ to be an abstract idea. CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1372, 99 USPQ2d 1690, 1695 (Fed. Cir. 2011)”. Accordingly, the claim recites an abstract idea.
Step 2A – Prong 2: Integrated into a Practical Application
This judicial exception is not integrated into a practical application. The additional elements of “comprising a memory controller and a memory device”, “based on the first identification information and the plurality of first offset information items”, “indicated by the plurality of first physical addresses”, “a plurality of second physical addresses indicating” and “based on the second identification information and the second offset information” in the claim limitations do not improve the functioning of a computer, or an improvement to storage device or other technology and is merely using a computer or storage device as a tool to perform the concept. Accordingly, there are no additional elements in the claim limitations that integrate the abstract idea into a practical application. The claim is directed to an abstract idea.
Step 2B: Claims provide an Inventive Concept
The claim 10 does not have additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, there are no additional elements that are sufficient to amount to significantly more than the judicial exception. The claim 10 is not patent eligible.
As per claim 16:
Claim 16 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim 16 recites: A computing system comprising; a host device configured to provide; when a garbage collection is requested, first identification information identifying a first zone among a plurality of zones; first offset information including distance information from a start logical address of the first zone to an address indicating a first memory area in which valid data is stored; second identification information identifying a second zone among the plurality of zones; and second offset information including distance information from a start logical address of the second zone to an address indicating a second memory area in which the valid data is to be stored; a storage device comprising a memory controller and a memory device including the plurality of zones, the storage device being configured to; receive, from the host device; the first identification information, the first offset information, the second identification information and the second offset information; acquire, by the memory controller, physical addresses corresponding to the valid data items based on the first identification information and the first offset information; and store, by the memory device, the valid data items in the second memory area of the second zone corresponding to the physical addresses acquired based on the second identification information and the second offset information.
Step 1: Statutory Category:
Yes, the claim recites a Computing System.
Step 2A – Prong 1: Judicial Exception Recited:
The limitations of the claim recites a computing system comprising; a host device configured to provide; when a garbage collection is requested, first identification information identifying a first zone among a plurality of zones; first offset information indicating a first memory area in which valid data is stored; second identification information identifying a second zone among the plurality of zones; and second offset information indicating a second memory area in which the valid data is to be stored; a storage device including the plurality of zones, the storage device being configured to; receive, from the host device; the first identification information, the first offset information, the second identification information and the second offset information; acquire, by the memory controller, the first offset information; and store, by the memory device, the valid data items in the second memory area of the second zone corresponding to the the second offset information. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind, then it falls within the “Mental Processes” grouping of abstract ideas. As per MPEP 2106,04(a)(2) III “The courts consider a mental process (thinking) that ‘can be performed in the human mind, or by a human using a pen and paper’ to be an abstract idea. CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1372, 99 USPQ2d 1690, 1695 (Fed. Cir. 2011)”. Accordingly, the claim recites an abstract idea.
Step 2A – Prong 2: Integrated into a Practical Application
This judicial exception is not integrated into a practical application. The additional elements of “including distance information from a start logical address of the first zone to an address”, “including distance information from a start logical address of the second zone to an address”, “comprising a memory controller and a memory device”, “physical addresses corresponding to the valid data items based on the first identification information” and “physical addresses acquired based on the second identification information” in the claim limitations do not improve the functioning of a computer, or an improvement to storage device or other technology and is merely using a computing system or storage device as a tool to perform the concept. Accordingly, there are no additional elements in the claim limitations that integrate the abstract idea into a practical application. The claim is directed to an abstract idea.
Step 2B: Claims provide an Inventive Concept
The claim 16 does not have additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, there are no additional elements that are sufficient to amount to significantly more than the judicial exception. The claim 16 is not patent eligible.
As per dependent claims 2-9, 11-15 and 17-20 depend directly or indirectly on the independent claims 1, 10 and 16 and these additional claim elements do not provide meaningful limitations to transform the abstract idea into a patent eligible application of the abstract idea such that the claims amount to significantly more than the abstract idea itself. The dependent claim 2 states additional steps for the storage device of the claim 1 “wherein the plurality of first offset information items include distance information from a start logical address of the first zone to a plurality of first logical addresses indicating memory areas in which the plurality of valid data items are stored”, the claim 3 states additionally steps of the storage device of the claim 1, “wherein the second offset information includes distance information from a start logical address of the second zone to a second logical address indicating a memory area in which storing of the plurality of valid data items is to be started”, the claim 4 states additionally steps of the storage device of the claim 1, “wherein the memory controller stores map data indicating a mapping relationship between offset information provided from the host device on the plurality of zones and a physical address indicating a position at which data is stored in the memory device”, the claim 5 states additionally steps of the storage device of the claim 4, “wherein the memory controller determines the map data on the first zone, based on the first identification information; and acquires a plurality of first physical addresses mapped to the plurality of first offset information items, based on the determined map data”, the claim 6 states additionally steps of the storage device of the claim 5, “wherein the memory controller controls the memory device to read the plurality of valid data items from memory areas indicated by the plurality of first physical addresses included in the first zone”, the claim 7 states additional steps of the storage device of the claim 4, “wherein the memory controller determines the map data for the second zone, based on the second identification information; and acquires a plurality of second physical addresses mapped to the second offset information and offset information consecutive to the second offset information, based on the determined map data”, the claim 8 states additional steps of the storage device of the claim 7, “wherein the memory controller controls the memory device to store the plurality of valid data items in memory areas indicated by the plurality of second physical addresses included in the second zone”, the claim 9 states additional steps of the storage device of the claim 1, “wherein the memory controller stores the plurality of valid data items in the second zone; and then provides the host device with third offset information including distance information from a start logical address of the second zone to a logical address indicating an empty memory area”, the claim 17 states additional steps of the computing system of claim 16, “wherein the storage device acquires a first physical address indicating the first memory area, based on the first identification information and the first offset information; and reads the valid data from the first memory area, based on the first physical address”, the claim 18 states additional steps of the computing system of claim 16, “wherein the storage device acquires a second physical address indicating the second memory area, based on the second identification information and the second offset information; and stores the valid data in the second memory area, based on the second physical address”.
The dependent claims 11-15 have similar limitations as the dependent claims 2, 3, 5, 7 and 9 respectively and the dependent claims 19-20 have similar limitations as the dependent claims 7 and 9 respectively, thus the dependent claims 11-15 and 19-20 are also rejected for the reasons specified supra for the dependent claims 2, 3, 5, 7 and 9.
Therefore, the claims 1-20 are rejected under 35 U.S.C. 101 as being directed to an abstract idea without significantly more.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kang Hye (US PGPUB 20220138099) in view of Choi et al (US PGPUB 20260154010).
As per claim 1:
Kang teaches:
“A storage device comprising” (Paragraph [0030] (the storage device may include))
“a memory device including a plurality of zones corresponding to groups of consecutive logical addresses provided from a host device” (Paragraph [0038] and Paragraph [0041] (the memory device may include a plurality of memory blocks allocated to a plurality of zones and the memory controller may receive data and a logical block address (LBA) from the host and may translate the LBA into a physical block address (PBA) indicating an address of memory cells in which the data is to be stored in the memory device))
“the plurality of zones including a first zone and a second zone” (Paragraph [0082] (the first zone Zone 1 may correspond to an area that stores data corresponding to a first memory block group LBA Group 1 and the second zone Zone 2 may correspond to an area that stores data corresponding to a second memory block group LBA Group 2))
“and a memory controller configured to receive a garbage collection request from the host device” (Paragraph [0049] (the memory device controller may receive the information on whether to perform the garbage collection for the target zone from the host controller))
“wherein the garbage collection request provided from the host device includes first identification information identifying the first zone” (Paragraph [0116] and Paragraph [0119] (the host controller may provide the zone management component with the garbage collection (GC) information request where the zone management component may determine whether the garbage collection for the first zone ZONE 1 is required based on information related to the plurality of zones stored therein which may include identification information for each of the plurality of zones and information on whether valid or invalid data is included in each of the plurality of zones))
“second identification information identifying the second zone” (Paragraph [0082] (the plurality of zones may correspond to areas that store data corresponding to logical address groups, respectively like the second zone Zone 2 may correspond to an area that stores data corresponding to a second memory block group LBA Group 2))
“and control, in response to the garbage collection request, the memory device” (Paragraph [0049] (the memory device controller may receive the information on whether to perform the garbage collection for the target zone from the host controller and the memory device controller may control the memory device)).
Kang does not EXPLICITLY teach: a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone; second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; acquire, based on the plurality of first offset information items, physical addresses corresponding to the plurality of valid data items; and to store the plurality of valid data items of the first zone in the second zone.
However, in an analogous art, Choi teaches:
“a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone” (Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone))
“and second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone” (Paragraph [0179] When the logical address of “00100” is received from the external host device, the memory controller may calculate the write pointer (the plurality of valid data items are to be stored in the second zone) of “0100” from an offset (second offset) of “0100” included in the logical address of “00100)))
“acquire, based on the plurality of first offset information items, physical addresses corresponding to the plurality of valid data items” (Paragraph [0161] and Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone and the multi-level map table manager may translate one or more logical addresses received from the external host device into one or more physical addresses of the nonvolatile memory device using the zone map table))
“and to store the plurality of valid data items of the first zone in the second zone” (Paragraph [0166] (the memory controller may read data from a first zone among zones of the logical unit LU and may write the data read from the first zone in a second zone of the logical unit LU)).
It would have been obvious to one of ordinary skill in the art before the effective filing date to take the teachings of Choi and apply them on teachings of Kang for the storage device “a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone; second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; acquire, based on the plurality of first offset information items, physical addresses corresponding to the plurality of valid data items; and to store the plurality of valid data items of the first zone in the second zone”. One would be motivated as when valid data of a specific zone are moved through the garbage collection operation, the memory controller may reset the specific zone depending on the reset request received from the external host device (Choi, Paragraph [0493]).
As per claim 2:
Kang and Choi teach the storage device of the claim 1 above.
Choi further teaches:
“wherein the plurality of first offset information items include distance information from a start logical address of the first zone to a plurality of first logical addresses indicating memory areas in which the plurality of valid data items are stored” (Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone (distance information from a start logical address of the first zone))).
As per claim 3:
Kang and Choi teach the storage device of the claim 1 above.
Choi further teaches:
“wherein the second offset information includes distance information from a start logical address of the second zone to a second logical address indicating a memory area in which storing of the plurality of valid data items is to be started” (Paragraph [0304] (the memory controller may identify the target zone based on the logical address included in the read request RD and the zone map table ZM, may calculate the offset of the write pointer WP from the logical address, and may calculate the physical address of the nonvolatile memory device based on the offset (a start logical address of the second zone to a second logical address indicating a memory area in which storing of the plurality of valid data items is to be started))).
As per claim 4:
Kang and Choi teach the storage device of the claim 1 above.
Choi further teaches:
“wherein the memory controller stores map data indicating a mapping relationship between offset information provided from the host device on the plurality of zones and a physical address indicating a position at which data is stored in the memory device” (Paragraph [0161] (the multi-level map table manager may translate one or more logical addresses received from the external host device into one or more physical addresses of the nonvolatile memory device using the zone map table)).
As per claim 5:
Kang and Choi teach the storage device of the claim 4 above.
Kang further teaches:
“wherein the memory controller determines the map data on the first zone, based on the first identification information” (Paragraph [0113] (the mapping information may include identification information for each zone and identification information for memory blocks allocated to each zone)).
Also, Choi further teaches:
“and acquires a plurality of first physical addresses mapped to the plurality of first offset information items, based on the determined map data” (Paragraph [0161] and Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone and the multi-level map table manager may translate one or more logical addresses received from the external host device into one or more physical addresses of the nonvolatile memory device using the zone map table)).
As per claim 6:
Kang and Choi teach the storage device of the claim 5 above.
Choi further teaches:
“wherein the memory controller controls the memory device to read the plurality of valid data items from memory areas indicated by the plurality of first physical addresses included in the first zone” (Paragraph [0304] (the memory controller may identify the target zone based on the logical address included in the read request RD and the zone map table ZM, may calculate the offset of the write pointer WP from the logical address, and may calculate the physical address of the nonvolatile memory device based on the offset and the memory controller may read the data from the nonvolatile memory device using the physical address)).
As per claim 7:
Kang and Choi teach the storage device of the claim 4 above.
Kang further teaches:
“wherein the memory controller determines the map data for the second zone, based on the second identification information” (Paragraph [0113] (the mapping information may include identification information for each zone and identification information for memory blocks allocated to each zone)).
Also, Choi further teaches:
“and acquires a plurality of second physical addresses mapped to the second offset information and offset information consecutive to the second offset information, based on the determined map data” (Paragraph [0179] When the logical address of “00100” is received from the external host device, the memory controller may calculate the write pointer (the plurality of valid data items are to be stored in the second zone) of “0100” from an offset (second offset) of “0100” included in the logical address of “00100))).
As per claim 8:
Kang and Choi teach the storage device of the claim 7 above.
Choi further teaches:
“wherein the memory controller controls the memory device to store the plurality of valid data items in memory areas indicated by the plurality of second physical addresses included in the second zone” (Paragraph [0166] and Paragraph [0312] (the memory controller may read data from a first zone among zones of the logical unit LU allocated to the zone write ZW and may write the data read from the first zone in a second zone of the logical unit LU where the memory controller may obtain the physical address based on the logical address and the page map table)).
As per claim 9:
Kang and Choi teach the storage device of the claim 1 above.
Kang further teaches:
“wherein the memory controller stores the plurality of valid data items in the second zone” (Paragraph [0082] (the second zone Zone 2 may correspond to an area that stores data corresponding to a second memory block group LBA Group 2)).
Choi further teaches:
“and then provides the host device with third offset information including distance information from a start logical address of the second zone to a logical address indicating an empty memory area” (Paragraph [0274] (when the next zone is writable and empty and the feature of the next zone is the same as the feature of the target zone, the memory controller may determine to proceed with the over-zone write using the next zone)).
As per claim 10:
Kang teaches:
“A method of operating a storage device comprising a memory controller and a memory device, the method comprising” (Paragraph [0008] and Paragraph [0009] (a method of operating a memory system which operates a memory controller that controls a memory device including a plurality of memory blocks includes))
“receiving, from a host device, first identification information identifying a first zone among a plurality of zones of a memory device” (Paragraph [0082] and Paragraph [0113] (the memory device controller may receive the ZONE information corresponding to the specific memory block on which the first internal operation is to be performed and the first zone Zone 1 may correspond to an area that stores data corresponding to a first memory block group LBA Group 1))
“second identification information identifying a second zone among the plurality of zones” (Paragraph [0133] (the memory device controller may control the memory device to perform the second internal operation on the memory blocks allocated to the first zone ZONE 1 where the. the second internal operation is part of the garbage collection operation))
“based on the first identification information and the plurality of first offset information items” (Paragraph [0113] (the mapping information may include identification information for each zone and identification information for memory blocks allocated to each zone))
“based on the second identification information and the second offset information” (Paragraph [0113] (the mapping information may include identification information for each zone and identification information for memory blocks allocated to each zone))
Kang does not EXPLICITLY teach: a plurality of first offset information items indicating positions at which a plurality of valid data items are stored in the first zone; second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; acquiring, by the memory controller, a plurality of first physical addresses indicating memory areas in which the plurality of valid data items are stored; reading, by the memory device, the plurality of valid data items from memory areas indicated by the plurality of first physical addresses included in the first zone; acquiring, by the memory controller, a plurality of second physical addresses indicating memory areas in which the plurality of valid data items are to be stored; and storing, by the memory device, the plurality of read valid data items in memory areas indicated by the plurality of second physical addresses included in the second zone.
However, in an analogous art, Choi teaches:
“a plurality of first offset information items indicating positions at which a plurality of valid data items are stored in the first zone” (Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone))
“second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone” (Paragraph [0179] When the logical address of “00100” is received from the external host device, the memory controller may calculate the write pointer (the plurality of valid data items are to be stored in the second zone) of “0100” from an offset (second offset) of “0100” included in the logical address of “00100)))
“acquiring, by the memory controller, a plurality of first physical addresses indicating memory areas in which the plurality of valid data items are stored” (Paragraph [0158], Paragraph [0161] and Paragraph [0182] (modules which may be executed by the memory controller cause, a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone and the multi-level map table manager may translate one or more logical addresses received from the external host device into one or more physical addresses of the nonvolatile memory device using the zone map table))
“reading, by the memory device, the plurality of valid data items from memory areas indicated by the plurality of first physical addresses included in the first zone” (Paragraph [0010] and Paragraph [0304] (the storage device is further configured to read first data from a first zone from among the plurality of zones and the memory controller may read the data from the nonvolatile memory device using the physical address))
“acquiring, by the memory controller, a plurality of second physical addresses indicating memory areas in which the plurality of valid data items are to be stored” (Paragraph [0161] and Paragraph [0166] (the memory controller may write the data read from the first zone in a second zone of the logical unit LU allocated to the zone write ZW and the multi-level map table manager may translate one or more logical addresses into one or more physical addresses of the nonvolatile memory device using the zone map table))
“and storing, by the memory device, the plurality of read valid data items in memory areas indicated by the plurality of second physical addresses included in the second zone” (Paragraph [0010] and Paragraph [0180] (the storage device is further configured to write the first read data in a second zone from among the plurality of zones and the physical addresses of the zone may be managed using the write pointer WP)).
It would have been obvious to one of ordinary skill in the art before the effective filing date to take the teachings of Choi and apply them on teachings of Kang for the storage device “a plurality of first offset information items indicating positions at which a plurality of valid data items are stored in the first zone; second offset information indicating positions at which the plurality of valid data items are to be stored in the second zone; acquiring, by the memory controller, a plurality of first physical addresses indicating memory areas in which the plurality of valid data items are stored; reading, by the memory device, the plurality of valid data items from memory areas indicated by the plurality of first physical addresses included in the first zone; acquiring, by the memory controller, a plurality of second physical addresses indicating memory areas in which the plurality of valid data items are to be stored; and storing, by the memory device, the plurality of read valid data items in memory areas indicated by the plurality of second physical addresses included in the second zone”. One would be motivated as when valid data of a specific zone are moved through the garbage collection operation, the memory controller may reset the specific zone depending on the reset request received from the external host device (Choi, Paragraph [0493]).
As per claim 11, the claim is rejected based upon the same rationale given for the parent claim 10 and the claim 2 above.
As per claim 12, the claim is rejected based upon the same rationale given for the parent claim 10 and the claim 3 above.
As per claim 13, the claim is rejected based upon the same rationale given for the parent claim 10 and the claim 5 above.
As per claim 14, the claim is rejected based upon the same rationale given for the parent claim 10 and the claim 7 above.
As per claim 15, the claim is rejected based upon the same rationale given for the parent claim 10 and the claim 9 above.
As per claim 16:
Kang teaches:
“A computing system comprising” (Paragraph [0007] (a memory system includes))
“a host device configured to provide” (Paragraph [0030] (the storage device may include))
“when a garbage collection is requested, first identification information identifying a first zone among a plurality of zones” (Paragraph [0049] (the memory device controller may receive the information on whether to perform the garbage collection for the target zone from the host controller))
“second identification information identifying a second zone among the plurality of zones” (Paragraph [0082] (the plurality of zones may correspond to areas that store data corresponding to logical address groups, respectively like the second zone Zone 2 may correspond to an area that stores data corresponding to a second memory block group LBA Group 2))
“a storage device comprising a memory controller and a memory device including the plurality of zones, the storage device being configured to:” Paragraph [0038] and Paragraph [0041] (the memory device may include a plurality of memory blocks allocated to a plurality of zones and the memory controller may receive data and a logical block address (LBA) from the host))
Kang does not EXPLICITLY teach: first offset information including distance information from a start logical address of the first zone to an address indicating a first memory area in which valid data is stored; and second offset information including distance information from a start logical address of the second zone to an address indicating a second memory area in which the valid data is to be stored; receive, from the host device, the first identification information and the first offset information, the second identification information, and the second offset information; acquire, by the memory controller, physical addresses corresponding to the valid data items based on the first identification information and the first offset information; and store, by the memory device, the valid data items in the second memory area of the second zone corresponding to the physical addresses acquired based on the second identification information and the second offset information.
However, in an analogous art, Choi teaches:
“first offset information including distance information from a start logical address of the first zone to an address indicating a first memory area in which valid data is stored” (Paragraph [0120] (Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone))
“and second offset information including distance information from a start logical address of the second zone to an address indicating a second memory area in which the valid data is to be stored” (Paragraph [0179] When the logical address of “00100” is received from the external host device, the memory controller may calculate the write pointer (the plurality of valid data items are to be stored in the second zone) of “0100” from an offset (second offset) of “0100” included in the logical address of “00100)))
“receive, from the host device, the first identification information and the first offset information, the second identification information, and the second offset information” (Paragraph [0510] (The twelfth to fifteenth fields of the source information may include bits from an LSB to an MSB of a data buffer offset and may indicate an offset of the corresponding source information from among all the logical addresses targeted for the zone copy))
“acquire, by the memory controller, physical addresses corresponding to the valid data items based on the first identification information and the first offset information” (Paragraph [0161] and Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone and the multi-level map table manager may translate one or more logical addresses received from the external host device into one or more physical addresses of the nonvolatile memory device using the zone map table))
“and store, by the memory device, the valid data items in the second memory area of the second zone corresponding to the physical addresses acquired based on the second identification information and the second offset information” (Paragraph [0166] (the memory controller may read data from a first zone among zones of the logical unit LU and may write the data read from the first zone in a second zone of the logical unit LU)).
It would have been obvious to one of ordinary skill in the art before the effective filing date to take the teachings of Choi and apply them on teachings of Kang for the computing system “first offset information including distance information from a start logical address of the first zone to an address indicating a first memory area in which valid data is stored; and second offset information including distance information from a start logical address of the second zone to an address indicating a second memory area in which the valid data is to be stored; receive, from the host device, the first identification information and the first offset information, the second identification information, and the second offset information; acquire, by the memory controller, physical addresses corresponding to the valid data items based on the first identification information and the first offset information; and store, by the memory device, the valid data items in the second memory area of the second zone corresponding to the physical addresses acquired based on the second identification information and the second offset information”. One would be motivated as when valid data of a specific zone are moved through the garbage collection operation, the memory controller may reset the specific zone depending on the reset request received from the external host device (Choi, Paragraph [0493]).
As per claim 17:
Kang and Choi teach the computing system of the claim 16 above.
Choi further teaches:
“wherein the storage device acquires a first physical address indicating the first memory area, based on the first identification information and the first offset information” (Paragraph [0161] and Paragraph [0182] (a plurality of first offset information items indicating positions at which the plurality of valid data items are stored in the first zone and the multi-level map table manager may translate one or more logical addresses received from the external host device into one or more physical addresses of the nonvolatile memory device using the zone map table))
“and reads the valid data from the first memory area, based on the first physical address” (Paragraph [0010] and Paragraph [0304] (the storage device is further configured to read first data from a first zone from among the plurality of zones and the memory controller may read the data from the nonvolatile memory device using the physical address)).
As per claim 18:
Kang and Choi teach the computing system of the claim 16 above.
Choi further teaches:
“wherein the storage device acquires a second physical address indicating the second memory area, based on the second identification information and the second offset information” (Paragraph [0161] and Paragraph [0166] (the memory controller may write the data read from the first zone in a second zone of the logical unit LU allocated to the zone write ZW and the multi-level map table manager may translate one or more logical addresses into one or more physical addresses of the nonvolatile memory device using the zone map table))
“and stores the valid data in the second memory area, based on the second physical address” (Paragraph [0010] and Paragraph [0180] (the storage device is further configured to write the first read data in a second zone from among the plurality of zones and the physical addresses of the zone may be managed using the write pointer WP)).
As per claim 19, the claim is rejected based upon the same rationale given for the parent claim 18 and the claim 7 above.
As per claim 20, the claim is rejected based upon the same rationale given for the parent claim 18 and the claim 9 above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Honda et al, (US PGPUB 20250199685), a controller of the memory system manages a plurality of zones using first information indicating (i) a correspondence between the zones and storage areas of a nonvolatile memory and (ii) a status of each of the zones. The status includes a first status indicating that data is written over an entire logical address range corresponding to a zone and a second status indicating that a zone is reset. In response to receiving a first command from a host device, the controller transmits to the host device a first list including information indicating a zone which is to be garbage collected. Colcord et al (US PGPUB 20220012250), a data analytics system is disclosed that is configured to perform operations comprising creating at least one data storage, creating a metadata store separate from the at least one data storage, creating a flow storage, and configuring a flow service using first received instructions. The flow service is configured to obtain a first flow from the flow storage, obtain metadata from the metadata storage, and execute the flow.
BAE et al, (US PGPUB 20250190344), a storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to, based on receiving an open zone command from an external host device: based on a number of free erase units from among a plurality of erase units included in the plurality of memory cells being greater than a threshold value, allocate at least two free erase units to a first-type zone, and based on the number of the free erase units being smaller than or equal to the threshold value, allocate the at least two free erase units to a second-type zone, wherein the controller is further configured to permit a random write based on a random logical address received from the external host device for the first-type zone.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAMAL K DEWAN whose telephone number is (571)272-2196. The examiner can normally be reached on Mon-Fri 8:00 AM – 5:00 PM (EST). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TONY MAHMOUDI can be reached on 571-272-4078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Kamal K Dewan/
Examiner, Art Unit 216
/TONY MAHMOUDI/Supervisory Patent Examiner, Art Unit 2163
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