DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/26/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 7-10, and 12-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cetinoneri, (U.S. Patent Application Publication No. 20200220256 A1), [hereinafter Cetinoneri].
Regarding claim 1, Cetinoneri discloses a communication apparatus ([0160] a radio frequency system 12), comprising:
1. A communication apparatus ([0027] a wireless device), comprising:
a first antenna (Fig. 7, 34A);
a signal co-processing circuit (Fig. 7, intermediate (e.g., driver) routing circuitry 86);
a first signal amplifying circuit electrically coupled between the signal co-processing circuit and the first antenna (Fig. 7, a first intermediate amplifier unit 84A);
a first signal path electrically coupled to the signal co-processing circuit (Fig. 8, 92A and [0138] one or more electrical connectors 92 may be coupled between the transceiver integrated circuit 74 and the remote heads 78. In particular, a first end of an electrical connector 92 may be coupled to the driver integrated circuit 76 and a second (e.g., opposite) end of the electrical connector 92 may be coupled to a remote head 78. In other words, the driver integrated circuit 76 may be coupled on a transceiver-side of the electrical connector 92 and the remote head 78 may be coupled on an antenna-side of the electrical connector 92.);
a second signal path (Fig. 8, 92B);
a switch electrically coupling the second signal path to the signal co-processing circuit ([0175] a first control signal to the first amplifier switching device 60 and/or a second control signal to the second amplifier switching device 64.) under a merged communication state (0160] As described above, in some embodiments, routing circuitry 50 implemented in front-end circuitry 32 of a radio frequency system 12 may include one or more filters 68 and/or one or more combiners 72. For example, the first remote front-end routing circuitry 106A may include a first one or more combiners 72 that, during transmission, operate to combine amplified analog electrical signals output from the first set of remote front-end amplifier units 104 into a first combined analog electrical signal to be supplied to the first antenna 34A. Similarly, the Nth remote front-end routing circuitry 106N may include an Nth one or more combiners 72 that, during transmission, operate to combine amplified analog electrical signals output from the Nth set of remote front-end amplifier units 104 into an Nth combined analog electrical signal to be supplied to the Nth antenna 34N);
a first signal transceiver circuit configured to perform communication in a first frequency band through the first signal path, the signal co-processing circuit, the first signal amplifying circuit and the first antenna ([0158] an example of a dual-band remote front-end integrated circuit 109 is shown in FIG. 11. As depicted, the single-band remote front-end integrated circuit 105 and the dual-band remote front-end integrated circuit 98 is each implemented and/or operated to facilitate concurrent wireless communication of a first data stream 80A and a second data stream 80B via at least a first antenna 34A and an Nth antenna 34N. In particular, the dual-band remote front-end integrated circuit 109 of FIG. 11 is implemented and/or operated to facilitate concurrent wireless of a first (e.g., 28 GHz band) frequency component 107A and a second (e.g., 39 GHz band or 60 GHz band) frequency component 107B in the first data stream 80A and the second data stream 80B.); and
a second signal transceiver circuit configured to perform communication on a second frequency band through the second signal path, the switch, the signal co-processing circuit, the first signal amplifying circuit and the first antenna under the merged communication state ([0157] a data stream 80 may utilize one or more frequency bands. In other words, when one or more data stream 80 communicated therethrough utilizes multiple frequency components, the remote front-end integrated circuit 98 may be implemented and/or operated as a multi-band (e.g., dual-band) remote front-end integrated circuit 98. On the other hand, when each data stream 80 communicated therethrough utilizes a single frequency band, the remote front-end integrated circuit 98 may be implemented and/or operated as a single-band remote front-end integrated circuit 98.).
Regarding claim 2, Cetinonari discloses all the limitations of claim 1, as discussed above. Cetinonari also discloses wherein the first signal path is a first signal transmission path, the second signal path is a second signal transmission path ([0182] a first control signal to the first amplifier switching device 60 and/or a second control signal to the second amplifier switching device 64), the first signal amplifying circuit is a power amplifier ([0192] one or more of the remote front-end amplifier units 104 may be implemented as a gallium arsenide (GaA) power amplifier or a gallium-nitride (GaN) power amplifier.) and the signal co-processing circuit is a power combiner ([0160] one or more combiners 72.); the first signal transceiver circuit performs transmission of a first analog signal corresponding to the first frequency band through the first signal path and the second signal transceiver circuit performs transmission of a second analog signal corresponding to the second frequency band through the second signal path, such that the power combiner merges the first analog signal and the second analog signal to generate a transmission signal to be amplified by the first signal amplifying circuit and further transmitted by the first antenna ([0157] a data stream 80 may utilize one or more frequency bands. In other words, when one or more data stream 80 communicated therethrough utilizes multiple frequency components, the remote front-end integrated circuit 98 may be implemented and/or operated as a multi-band (e.g., dual-band) remote front-end integrated circuit 98. On the other hand, when each data stream 80 communicated therethrough utilizes a single frequency band, the remote front-end integrated circuit 98 may be implemented and/or operated as a single-band remote front-end integrated circuit 98.).
Regarding claim 3, Cetinonari discloses all the limitations of claim 2, as discussed above. Cetinonari also discloses a conversion circuit; and a base band circuit electrically coupled to the first signal transceiver circuit and the second signal transceiver circuit through the conversion circuit to provide a first digital signal to the conversion circuit to perform digital-to-analog conversion thereon to generate the first analog signal to be transmitted to the first signal transceiver circuit, and provide a second digital signal to the conversion circuit to perform digital-to-analog conversion thereon to generate the second analog signal to be transmitted to the second signal transceiver circuit ([0185] During reception, the transceiver integrated circuit 74 may process a received analog electrical signal to enable further processing and/or analysis by the digital processing circuitry 30. For example, the transceiver integrated circuit 74 may convert the analog electrical signal to a processing (e.g., baseband) frequency expected by the digital processing circuitry 30. Additionally or alternatively, the transceiver integrated circuit 74 may convert the analog electrical signal into a digital electrical signal and, thus, from the analog domain to the digital domain. In other words, a remote front-end integrated circuit 98 implemented in remote head 78 of a radio frequency system 12 may be operate in this manner to facilitate receiving data wirelessly transmitted from another radio frequency system 12, a communication network, and/or another electronic device 10.).
Regarding claim 4, Cetinonari discloses all the limitations of claim 2, as discussed above. Cetinonari also discloses a transceiver switch disposed between the first signal amplifying circuit and the first antenna and configured to electrically couple the first signal amplifying circuit and the first antenna under a transmission state and electrically isolate the first signal amplifying circuit and the first antenna under a receiving state (Fig. 6, 48).
Regarding claim 5, Cetinonari discloses all the limitations of claim 2, as discussed above. Cetinonari also discloses wherein the first signal amplifying circuit is directly electrically coupled to the first antenna and the first antenna only allows the first signal amplifying circuit to perform signal transmission therethrough (Fig. 6, 48 and [0184] To facilitate overcoming connector loss and/or propagation loss produced during reception, the remote front-end amplifier units 104 may amplify corresponding analog electrical signals, for example, after filtering by the remote front-end routing circuitry 106 and/or phase-shifting by the phase shift circuitry 52 (process block 146). After amplification, one or more amplified analog electrical signals may be output from the remote front-end amplifier units 104 to an antenna integrated circuit 96 (process block 148). As described above, in some embodiments, the antenna integrated circuit 96 may then output an analog electrical signal to a driver integrated circuit 76 and/or a transceiver integrated circuit 74.).
Regarding claim 7, Cetinonari discloses all the limitations of claim 1, as discussed above. Cetinonari also discloses wherein the first signal path is a first signal receiving path, the second signal path is a second signal receiving path, the first signal amplifying circuit is a low noise amplifier (LNA) and the signal co-processing circuit is a power splitter; the first antenna receives a received signal to be amplified by the first signal amplifying circuit and further split into a first analog signal corresponding to the first frequency band and a second analog signal corresponding to the second frequency band by the power splitter, such that the first signal transceiver circuit performs signal receiving on the first analog signal through the first signal path and the second signal transceiver circuit performs signal receiving on the second analog signal through the second signal path ([0120] Additionally, an amplifier unit 48 implemented in front-end circuitry 32 of a radio frequency system 12 generally operates to amplify magnitude (e.g., amplitude) of an analog electrical signal, for example, to facilitate overcoming communication (e.g., propagation and/or connector) losses. Thus, as in the depicted example, an amplifier unit 48 may include a transmit (e.g., power) amplifier 58 and a receipt (e.g., low noise) amplifier 62 each selectively connectable via a first amplifier switching device 60 and/or a second amplifier switching device 64. In some embodiments, the first amplifier switching device 60 and/or the second amplifier switching device 64 may be a semiconductor switching device, such as a metal-oxide-semiconductor field-effect transistor (MOSFET). [0121] However, it should again be appreciated that the depicted example is merely intended to be illustrative and not limiting. For example, in some embodiments, front-end circuitry 32 may include one or more transmit amplifier units 48, which each includes a selectively connectable transmit amplifier 58, but not a receipt amplifier 62. Additionally or alternatively, front-end circuitry 32 may include one or more receipt amplifier units 48, which each includes a selectively connectable receipt amplifier 62, but not a transmit amplifier 58. Furthermore, in some embodiments, an amplifier unit 48 may include a selectively connectable bypass path, which bypasses its transmit amplifier 58 and/or its receipt amplifier 62 when connected. And Claim 22. The remote head of claim 19, wherein: each amplifier unit of the first plurality of amplifier units comprises: a first power amplifier; a first low noise amplifier; and a first one or more switching devices configured to selectively connect one of the first power amplifier and the first low noise amplifier; and each amplifier unit of the second plurality of amplifier units comprises: a second power amplifier; a second low noise amplifier; and a second one or more switching devices configured to selectively connect one of the second power amplifier and the second low noise amplifier.).
Regarding claim 8, Cetinonari discloses all the limitations of claim 7, as discussed above. Cetinonari also discloses a conversion circuit; and a base band circuit electrically coupled to the first signal transceiver circuit and the second signal transceiver circuit through the conversion circuit to receive a first digital signal after the conversion circuit receives and performs analog-to-digital conversion on the first analog signal to generate the first digital signal, and receive a second digital signal after the conversion circuit receives and performs analog-to-digital conversion on the second analog signal to generate the second digital signal (Fig. 10).
Regarding claim 9, Cetinonari discloses all the limitations of claim 7, as discussed above. Cetinonari also discloses a transceiver switch disposed between the first signal amplifying circuit and the first antenna and configured to electrically couple the first signal amplifying circuit and the first antenna under a receiving state (Fig. 6, 48).
Regarding claim 10, Cetinonari discloses all the limitations of claim 7, as discussed above. Cetinonari also discloses wherein the first signal amplifying circuit is directly electrically coupled to the first antenna and the first antenna only allows the first signal amplifying circuit to perform signal receiving therethrough (Fig. 6, 48 switch configured to receive).
Regarding claim 12, Cetinonari discloses all the limitations of claim 1, as discussed above. Cetinonari also discloses a second antenna (Fig. 10); and a second signal amplifying circuit electrically coupled between the second signal transceiver circuit and the second antenna (Fig. 10); wherein the switch electrically couples the second signal path and the second signal amplifying circuit under a non-merged communication state, and the second signal transceiver circuit is configured to perform communication corresponding to the second frequency band through the second signal path, the second signal amplifying circuit and the second antenna under the non-merged communication state (Fig. 10 showing separate data streams and ultiple antennas separated by switches).
Regarding claim 13, Cetinonari discloses all the limitations of claim 1, as discussed above. Cetinonari also discloses wherein the switch makes the second signal path floating under a non-merged communication state such that the second signal transceiver circuit does not perform communication (Fig. 10).
Regarding claim 14, Cetinonari discloses all the limitations of claim 1, as discussed above. Cetinonari also discloses wherein the first signal path and the first signal transceiver circuit form a first channel, and the second signal path, the switch and the second signal transceiver circuit form a second channel, in which a number of the second channel is N, N being an integer larger than or equal to 1 (Fig. 10 34A-N).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Cetinonari, and further in view of Ma, (U.S. Patent No. 9,985,667 B1), [hereinafter Ma].
Regarding claim 6, Cetinonari discloses all the limitations of claim 2, as discussed above. Cetinonari also discloses a ([0193] The remote front-end routing circuitry 106 and the one or more remote front-end amplifier units 104 may be electrically connected via conductive traces, for example, formed (e.g., etched) on the substrate. In some embodiments, implementing the remote front-end integrated circuit 98 may additionally include coupling phase shift circuitry 52 between the remote front-end amplifier units 104 and the remote front-end routing circuitry 106. Additionally or alternatively, implementing the remote front-end integrated circuit 98 may include connecting a power sensor 112 and a bi-directional coupler 73 to one or more of the remote front-end amplifier units 104, for example, to facilitate determining and, thus, controlling output (e.g., transmission) power closer to the antennas 34. In this manner, a remote front-end integrated circuit 98 may implemented as an integrated circuit device, for example, distinct from an antenna integrated circuit 96). However, Cetinonari does not explicitly disclose a duplexer. Ma discloses a dupexer ((42) Fig. 5 a duplexer/diplexer antenna 560.).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the duplexer as suggested by Ma with the front end taught by Cetinonari. The motivation would be to provide dual-band operation. Ma at Fig. 5.
Regarding claim 11, Cetinonari discloses all the limitations of claim 7, as discussed above. However, Cetinonari does not disclose a duplexer electrically coupled between the first signal amplifying circuit and the first antenna such that the first antenna simultaneously performs signal transmission and signal receiving corresponding to different frequency bands. In a similar field of endeavor, Ma suggests a duplexer electrically coupled between the first signal amplifying circuit and the first antenna such that the first antenna simultaneously performs signal transmission and signal receiving corresponding to different frequency bands ((42) FIG. 5 shows a block diagram of an IB-CA DTX 500 according to embodiments of the present disclosure. The IB-CA DTX 500 includes a CMB-DSM power encoder 520, a dual-band digital quadrature modulator (DB-DQM) 525, a MSOB-NC 530, a digital delay unit 535, a class-S digital PA 545, an asymmetric power combiner 555 and a duplexer/diplexer antenna 560.)
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the duplexer as suggested by Ma with the front end taught by Cetinonari. The motivation would be to provide dual-band operation. Ma at Fig. 5.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892. Qian 2019/0149386 A1 discloses [0059] In this embodiment, specifically, as shown in FIG. 4a, each transmit channel 4020 in the transmit array 402 may include: a modulation phase shifter 4021 and a power amplifier (PA) 4022. Weissman 2017/0294951 A1 discloses [0014] FIG. 2A illustrates a wireless device configured to perform antenna switch diversity using coherently combined power amplifiers.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ALISON SLATER can be reached on 571-270-0375. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Alison Slater/Supervisory Patent Examiner, Art Unit 2647
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