DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received September
26, 2024 for application number 18/897221. The Office hereby acknowledges receipt of the
following and placed of record in file: Specification, Drawings, Abstract, Oath/Declaration, IDS, and
Claims.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicants’ claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged. The present application claims foreign priority based on Korean Patent Application No. 10-2023-0157135 filed November 14, 2023.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on January 14, 2025 and
the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 7-9 are objected to because of the following informalities:
Claim 7, line 1 recites, “wherein the resource usage prediction model and the CPU temperature prediction model are operated in a SSP” (emphasis added) and should instead read, “wherein the resource usage prediction model and the CPU temperature prediction model are operated in an SSP” (emphasis added).
Claim 7, lines 1-2 recite the acronyms “SSP” and “PSP” which are unclear as they are not commonly used terms in the art. The full form of each term should be disclosed as an “(SSP) Secondary Service Processor” (emphasis added) and a “(PSP) Primary Service Processor.” (emphasis added).
Claims 8-9, recite similar usage of the acronyms “SSP” and “PSP” and should be addressed accordingly as an “(SSP) Secondary Service Processor” (emphasis added) and a “(PSP) Primary Service Processor” (emphasis added). Appropriate correction is required.
Specification Objections
The disclosure is objected to because of the following informalities:
Paragraph 42, lines 1-2 recite “The first bit is an owner bit that determines whether data is data that is transmitted from the PSP of the Cortex A7 environment or data that is transmitted from the SPS of the Cortex M3 environment” and should instead read “The first bit is an owner bit that determines whether data is data that is transmitted from the PSP of the Cortex A7 environment or data that is transmitted from the SSP of the Cortex M3 environment”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 7 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 7, the claim recites the phrase “wherein the resource usage prediction model and the CPU temperature prediction model are operated in a SSP which is distinguished from a PSP of the BMC” (emphasis added) in line 2. There is insufficient antecedent basis for this limitation in the claim, as there is no mention of a BMC prior to the reference to the BMC. For purposes of examination, the examiner construes the phrase “wherein the resource usage prediction model and the CPU temperature prediction model are operated in a SSP which is distinguished from a PSP of a BMC” (emphasis added). Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
Claims 10 is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitations use a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are:
In Claim 10:
“a handler configured to collect monitoring data on computing resources”
“a prediction module configured to predict future computing resource usage from the collected monitoring data”
“a power capping module configured to control power capping based on the predicted future computing resource usage”
Because these claim limitations are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
A review of the Specification shows there does not appear to provide any disclosure to the structure associated with a “handler”, “prediction module”, or “power capping module”. As such, the “handler” of paragraph [0029], “prediction module” of paragraphs [0032 – 0033], and “power capping module” of paragraph [0037] are not interpreted to cover any particular structure.
If applicant does not intend to have these limitations interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitations to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Davis et al. (US 2013/0124885 A1).
Regarding Claim 1, Davis teaches the following:
“A power consumption control method of a computing server” ([0003] The power consumption of computing devices (i.e. computing server) is monitored along with performance counters and used to generate a power model for each computing device. The power models are used to later estimate the power consumption of each computing device based on the performance counters (i.e. power consumption control method));
“The power consumption control method comprising: collecting monitoring data on computing resources” ([0064] Values of a plurality of performance counters (i.e. computing resources) associated with the computing device 110 are monitored over the time period at 503. The values of the plurality of performance counters may be comprised within the performance counter data 207 (i.e. collecting monitoring data) and may be monitored by the power model generator 210);
“Predicting future computing resource usage from the collected monitoring data” ([0058] In implementations where the estimated power consumption is an estimate of the future power consumption of the computing device 110 at a proposed power state, the power control 305 may estimate the power consumption of the computing device 110 by determining values of the performance counters, and estimating the power consumption (i.e. predicting future computing resource usage) using the power model 215);
“Controlling power capping based on the predicted future computing resource usage” ([0065] the power model 215 corresponding to a type of computing device 110, or an application or task associated with the computing device 110, may be used to estimate the power consumption of the computing device 110 based on performance counter data 207 (i.e. computing resource usage). The estimated power consumption (i.e. predicted future computing resource usage) may be used to keep the power consumed by the computing device 110 below a power cap 315 (i.e. controlling power capping).
Claim Rejections - 35 USC § 103
The factual inquiries for establishing a background for determining obviousness under
35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or
non-obviousness.
Claims 2 is rejected under 35 U.S.C. 103 as being unpatentable over Davis in view of Goodrum et al. (US 2013/0024708 A1).
Regarding Claim 2, Davis teaches:
“The power consumption control method of claim 1” ([0003] The power consumption of computing devices (i.e. computing server) is monitored along with performance counters and used to generate a power model for each computing device. The power models are used to later estimate the power consumption of each computing device based on the performance counters (i.e. power consumption control method)).
Davis does not teach:
“Wherein controlling the power capping comprises controlling the power capping to reduce idle power of the computing server”
However, in the analogous art of power capping based on exceeding a power threshold for a computer system Goodrum does teach “Wherein controlling the power capping comprises controlling the power capping to reduce idle power of the computing server” ([0012] When the capping controller 110 asserts the output 120 to inform the CPU 140 to reduce performance to the low-power level for example (i.e. controlling the power capping), this signal is routed internal to CPU cores to the instruction execution units 170, and at the next instruction boundary, for example, those units behave as if an idle instruction were executed. Thus, when the external control input 160 is asserted, the cores enter the idle state approximately in unison, and the CPU 140 takes the appropriate action as if the operating system had executed the idle instruction on each core, thereby reducing the power to the C-state idle power (i.e. controlling the power capping to reduce idle power).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Davis and Goodrum before him, the effective filing date of the claimed invention, to incorporate Goodrum’s power capping system based on exceeding a power threshold in Davis’ power consumption estimates based on performance counters to avoid power overload and/or a power supply shutdown (Goodrum [0001]).
Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Davis, Goodrum, and further view of Maddukuri et al. (US 2020/0026338 A1).
Regarding Claim 3, Davis and Goodrum teach:
“The power consumption control method of claim 2”
Davis in view of Goodrum does not teach:
“Wherein controlling the power capping comprises controlling power capping of a PSU and a CPU core”
However, in the analogous art of maintaining optimal system performance while adhering to competing power cap policies, Maddukuri does teach “Wherein controlling the power capping comprises controlling power capping of a PSU and a CPU core” ([0011] a user can set system level power caps to try to maintain overall input power in the power supply (i.e. controlling power capping of a PSU), a CPU thermal power cap is used to control overall CPU output power (i.e. controlling power capping of CPU));
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Davis, Goodrum and Maddukuri before him, the effective filing date of the claimed invention, to incorporate Maddukuri’s system for setting a power cap state into the computing system disclosed by Davis and Goodrum to maintain optimal system performance while adhering to competing power cap policies (Maddukuri [0001]).
Regarding Claim 4, Davis in view of Goodrum, and further in view of Maddukuri teach “The power consumption control method of claim 3”. Davis further discloses:
“Wherein predicting the computing resource usage comprises predicting the computing resource usage by receiving a resource usage prediction model” ([0058] In implementations where the estimated power consumption is an estimate of the future power consumption of the computing device 110 at a proposed power state, the power control 305 may estimate the power consumption of the computing device 110 by determining values of the performance counters (i.e. future power consumption informed by performance counters (computing resource usage)), and estimating the power consumption using the power model 215; [0055] A power model is received at 401 (i.e. receiving a resource prediction model);
“A resource usage prediction model is trained to predict future computing resource usage from monitoring data from an AI model platform, and using the resource usage prediction model” ([0057] A power consumption of the computing device 110 is estimated using the power model at 405 (i.e. resource prediction model). The power consumption may be estimated by the power control 305 of the computing device 110; When the current power consumption of the computing device 110 is an accurate estimate of future power consumption, the power consumption may be estimated by determining values of performance counters (i.e. future power consumption informed by performance counters (computing resource usage)) published by an operating system 205 of the computing device 110, and estimating the power consumption using the power model 215 and the determined values (i.e. using the resource usage prediction model)); [0064] Values of a plurality of performance counters (i.e. computing resources) associated with the computing device 110 are monitored over the time period at 503. The values of the plurality of performance counters may be comprised within the performance counter data 207 (i.e. monitoring data) and may be monitored by the power model generator 210); [0065] The power model 215 may be generated by the power model generator 210 (i.e. AI model platform).
Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Davis, Goodrum, Maddukuri, and in further view of Lee et al. (US 2022/0156171 A1).
Regarding Claim 5, the combination of Davis, Goodrum, and Maddukuri teach “The power consumption control method of claim 4”
Davis, Goodrum, and Maddukuri do not teach:
“Predicting a future CPU temperature from the collected monitoring data”
“Controlling a cooling fan based on the predicted future CPU temperature”
However, in the analogous art of predicting a temperature of a chip using a neural network model, Lee does teach:
“Predicting a future CPU temperature from the collected monitoring data” ([0006] collecting training data (training data is partially informed by past monitored historical data as mentioned in para. 16) of the temperature prediction model; the temperature prediction model is used to obtain a training result close to a measured temperature of the chip (the chip 30 containing CPU 20) from the output terminal of the temperature prediction model, and evaluate the training result to obtain a plurality of features that best reflect the temperature change of the chip (i.e. predicting future CPU temperature));
“Controlling a cooling fan based on the predicted future CPU temperature” ([0007] The baseboard management controller is configured to control a temperature prediction model to generate a predicted temperature of the chip of the PCIe card according to the set of key features, and control a fan speed of the server according to the predicted temperature).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Davis, Goodrum, Maddukuri , and Lee before him, the effective filing date of the claimed invention, to incorporate Lee’s predicting a temperature of a chip using a neural network model into the computing system disclosed by Davis, Goodrum, and Maddukuri to dissipate heat in order to support the performance and stability of the server (Lee [0002]).
Regarding Claim 6, the combination of Davis, Goodrum, Maddukuri, and Lee teach “The power consumption control method of claim 5”. Lee further discloses:
“Wherein predicting the CPU temperature comprises predicting the CPU temperature by receiving a CPU temperature prediction model that is trained to predict a future CPU temperature from monitoring data from the AI model platform, and using the CPU temperature prediction model” ([0006] predicting a temperature of a chip (the chip 30 containing CPU 20) of a PCIe card of a server comprises using a gated recurrent unit of a recurrent neural network (i.e. AI model platform) to define a temperature prediction model for the chip, collecting training data of the temperature prediction model according to mutual response changes of a plurality of control variables, using the training data to train the temperature prediction model at the input terminal of the temperature prediction model to obtain a training result close to a measured temperature of the chip from the output terminal of the temperature prediction model, and evaluate the training result to obtain a plurality of features that best reflect the temperature change of the chip).
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Davis, Goodrum, Maddukuri, Lee, and in further view of Moskowitz et al. (US 2018/0039552 A1).
Regarding Claim 7, the combination of Davis, Goodrum, Maddukuri, and Lee teach “The power control method of claim 6”
Davis further discloses “The resource prediction model” ([0057] the power model at 405 (i.e. resource prediction model). The power consumption may be estimated by the power control 305 of the computing device 110; When the current power consumption of the computing device 110 is an accurate estimate of future power consumption, the power consumption may be estimated by determining values of performance counters (i.e. future power consumption informed by performance counters (computing resource usage));
Lee further discloses “The CPU temperature prediction model” ([0006] predicting a temperature of a chip (the chip 30 containing CPU 20) of a PCIe card of a server comprises using a gated recurrent unit of a recurrent neural network to define a temperature prediction model for the chip (i.e. CPU prediction model)).
Davis, Goodrum, Maddukuri, and Lee do not teach:
“Models operated in a SSP which is distinguished from a PSP of the BMC”
However, in the analogous art of monitoring and controlling computing components to help ensure that they are available to perform load balancing, Moskowitz does teach “Models operated in a SSP which is distinguished from a PSP of the BMC” ([0036] A second service processor is operated as a secondary baseboard management controller (each BMC can comprise an Intelligent Platform Management Interface (IPMI) utilized for monitoring and controlling other components of the server board), (i.e. models operated in an SSP); [0045] The first service processor (i.e. Primary Service Processor (PSP)) is configured as a master baseboard management controller; [0046] The second service processor (i.e. Secondary Service Processor (SSP) is configured as a secondary baseboard management controller of the server board when the first service processor is configured as the master baseboard management controller (i.e. distinguished from the PSP of the BMC);
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Davis, Goodrum, Maddukuri, Lee, and Moskowitz before him, the effective filing date of the claimed invention, to incorporate Moskowitz’s multi-processor unit for monitoring and controlling the components of a server system into the computing system disclosed by Davis, Goodrum, Maddukuri , and Lee to decentralize functionality from the Baseboard Management Controller (BMC) to avoid failure of the entire server board (Moskowitz [0001]).
Regarding Claim 8, the combination of Davis, Goodrum, Maddukuri, Lee, and Moskowitz teach “The power control method of claim 7”.
Moskowitz further discloses:
“Wherein the PSP and the SSP communicate through a shared memory” ([0011] The shared system memory 118 includes a storage location 168 to store WD timer information for each of the service processors 120-150 storage location 168. The plurality of devices 102-108 can utilize their respective memory controllers 124-154 to communicate with the shared system memory 118 and with their corresponding processor memories 110-116 (i.e. PSP and SSP communicate through a shared memory)).
Regarding Claim 9, the combination of Davis, Goodrum, Maddukuri, Lee, and Moskowitz teach “The power control method of claim 8”.
Moskowitz further discloses:
“Wherein data between the PSP and the SSP comprises a bit indicating a data transmission entity” ([0048] The method includes monitoring, by a first service processor (i.e. PSP), a communication channel for alive messages (i.e. data transmission entity) from a plurality of service processors corresponding to a plurality of other devices including a second device (i.e. further comprising an SSP));
“A bit distinguishing between a request and a response, a type of requested data, and a content of responded data” ([0047] the second service processor is further configured to reset the second timer to a next to expire expiration timer value (i.e. content of responded data) in the storage location of the shared memory in response to receiving the primary alive message. In an embodiment, the second service processor is further configured to, during the switchover process, send an alive message request (i.e. a type of requested data) to the first service processor)).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Davis in view of Lee.
Regarding Claim 10, Davis teaches:
“A handler configured to collect monitoring data on computing resources” ([0064] Values of a plurality of performance counters (i.e. computing resources) associated with the computing device 110 are monitored over the time period at 503. The values of the plurality of performance counters may be comprised within the performance counter data 207 (i.e. collecting monitoring data) and may be monitored by the power model generator 210);
“A prediction module configured to predict future computing resource usage from the collected monitoring data” ([0058] In implementations where the estimated power consumption is an estimate of the future power consumption of the computing device 110 at a proposed power state, the power control 305 may estimate the power consumption of the computing device 110 by determining values of the performance counters, and estimating the power consumption (i.e. predicting future computing resource usage) using the power model 215);
“A power capping module configured to control power capping based on the predicted future computing resource usage” ([0037] The power policy manager 310 (i.e. a power capping module) may provide a power model 215 and a power cap 315 to each of the computing devices 110 in the cluster 105; [0065] the power model 215 corresponding to a type of computing device 110, or an application or task associated with the computing device 110, may be used to estimate the power consumption of the computing device 110 based on performance counter data 207 (i.e. computing resource usage). The estimated power consumption (i.e. predicted future computing resource usage) may be used to keep the power consumed by the computing device 110 below a power cap 315 (i.e. controlling power capping).
Davis does not teach:
“A BMC comprising [modules]”
However, Lee teaches:
a. “A BMC comprising [modules]” ([0002] the server is equipped with a baseboard management controller (BMC) which handles the power supply, voltage, temperature, fan speed, etc.).
b. Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Davis and Lee before him, the effective filing date of the claimed invention, to include Lee’s predicting a temperature of a chip using a neural network model in Davis’ power consumption estimates based on performance counters to mitigate the rising power costs of data centers. (Davis [0001]).Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Lee and Davis before him, the effective filing date of the claimed invention, to include Davis’ power consumption estimates based on performance counters in Lee’s predicting a temperature of a chip using a neural network model to dissipate heat in order to support the performance and stability of the server (Lee [0002]).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Davis in view of Lee.
Regarding Claim 11, Davis teaches:
“A power consumption control method of a computing server” ([0003] The power consumption of computing devices (i.e. computing server) is monitored along with performance counters and used to generate a power model for each computing device. The power models are used to later estimate the power consumption of each computing device based on the performance counters (i.e. power consumption control method));
“The power consumption control method comprising: predicting future computing resource usage from monitoring data on computing resources” ([0058] In implementations where the estimated power consumption is an estimate of the future power consumption of the computing device 110 at a proposed power state, the power control 305 may estimate the power consumption of the computing device 110 by determining values of the performance counters, and estimating the power consumption (i.e. predicting future computing resource usage) using the power model 215);
“Controlling power capping based on the predicted future computing resource usage” ([0065] the power model 215 corresponding to a type of computing device 110, or an application or task associated with the computing device 110, may be used to estimate the power consumption of the computing device 110 based on performance counter data 207 (i.e. computing resource usage). The estimated power consumption (i.e. predicted future computing resource usage) may be used to keep the power consumed by the computing device 110 below a power cap 315 (i.e. controlling power capping).
Davis does not teach:
“Predicting a future CPU temperature from the monitoring data on the computing resources”
“Controlling a cooling fan based on the predicted future CPU temperature”
However, in the analogous art of predicting a temperature of a chip using a neural network model, Lee does teach:
“Predicting a future CPU temperature from the monitoring data on the computing resources” ([0006] collecting training data (training data is partially informed by past monitored historical data as mentioned in para. 16) of the temperature prediction model; the temperature prediction model is used to obtain a training result close to a measured temperature of the chip (the chip 30 containing CPU 20) from the output terminal of the temperature prediction model, and evaluate the training result to obtain a plurality of features that best reflect the temperature change of the chip (i.e. predicting future CPU temperature));
“Controlling a cooling fan based on the predicted future CPU temperature” ([0007] The baseboard management controller is configured to control a temperature prediction model to generate a predicted temperature of the chip of the PCIe card according to the set of key features, and control a fan speed of the server according to the predicted temperature).
Accordingly, it would be obvious to a person having ordinary skill in the art, having the teachings of Davis and Lee before him, the effective filing date of the claimed invention, to include Lee’s predicting a temperature of a chip using a neural network model in Davis’ power consumption estimates based on performance counters to dissipate heat in order to support the performance and stability of the server (Lee [0002]).
Conclusion
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/J.L.R./
Examiner, Art Unit 2175
/ANDREW J JUNG/Supervisory Patent Examiner, Art Unit 2175
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