DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: Sz/@, BAdd[31:16], BAdd[15:0], Sz[19:16], Sz[15:0], R/W flag, OPC, FCT, CRC7, E.
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
Claims 6 and 13 refer to the “Secure Digital Input Output - SDIO” communication standard defined by the “SD Association” group. Based on this, the broadest reasonable interpretation of the art would be a method or system that is compatible with the SDIO standard at the time the application was filed.
Claim Objections
Claims 2-3 and 8-14 are objected to because of the following informalities:
In claim 2, line 3, “including” should be -includes-.
In claim 8, line 3, “device, the” should be -device, and the-.
In claim 9, line 3, “bits; the indirection register being” should be -bits; and the indirection register is-.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Singla et al. (US 2005/0216609), hereafter referred to as Singla’609.
Referring to independent claim 1, Singla’609 anticipates a method for communicating data between a slave device and a master device according to a communication protocol (master requests/programs the DMA engine to transfer a message to the slave device, paragraph 52, lines 1-3), the data being recorded in a memory belonging to the slave device (memory space S2 memory, see figure 2 and paragraph 58, lines 1-2), the method comprising: generating, by the master device, a command provided by the communication protocol (master device can communicate with the Slave Device using 32 Mailbox Registers, paragraph 34, lines 1-3); and using a field of the command in order to select an indirection register belonging to the slave device and containing an address of a region of the memory including the data (Master writes 64/32 bit address in Indirect Access Address Register, paragraph 59, lines 6-7).
Note that independent claim 8 contains the corresponding limitations of claim 1 as shown above; therefore, it is rejected using the same reasoning accordingly.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2-3 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Singla’609 in view of Li et al. (CN 111008076 A), hereafter referred to as Li’076.
As to claim 2, Singla’609 does not appear to explicitly teach the method of claim 1, wherein the communication protocol provides that the command field is intended to contain an address of a memory location on a first number of bits; and the indirection register includes a second number of bits greater than the first number to contain the address of the region of the memory including the data.
Li’076 teaches wherein the communication protocol provides that the command field is intended to contain an address of a memory location on a first number of bits (boundary address register containing a logical address value, paragraph 44, lines 13-14); and the indirection register includes a second number of bits greater than the first number to contain the address of the region of the memory including the data (the re-location register containing the smallest physical address value, a boundary address register containing a logical address value, each logical address value must be less than the physical address value, paragraph 44, lines 13-14).
Singla’609 and Li’076 are analogous because they are both drawn to the same inventive field of data communication between master/slave devices.
Prior to the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of Singla’609 and Li’076 before them, to modify the method of Singla’609 to include the indirection register with the second number of bits of Li’076 by configuring the Indirect Access Address Register of Singla’609 to be larger than a command field.
The motivation for doing so would have been to increase the utilization efficiency of the memory block (paragraph 4, lines 5-6).
Therefore, it would have been obvious to combine Singla’609 and Li’076 to bring about the invention as claimed.
Note that claim 9 contains the corresponding limitations of claim 2 as shown above; therefore, it is rejected using the same reasoning accordingly.
As to claim 3, Singla’609 does not appear to explicitly teach the method of claim 2 wherein the indirection register contains a base address and a size of the region of the memory containing the data.
However, Li’076 teaches wherein the indirection register contains a base address and a size of the region of the memory containing the data (each table entry comprises a start address, size and state of each partition, paragraph 19, lines 1-2).
Singla’609 and Li’076 are analogous because they are both drawn to the same inventive field of data communication between master/slave devices.
Prior to the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of Singla’609 and Li’076 before them, to modify the method of Singla’609 to include the base address and size of the region of Li’076 by configuring the Indirect Access Address Register of Singla’609 to include a start address and size of a region.
The motivation for doing so would have been to increase the utilization efficiency of the memory block (paragraph 4, lines 5-6).
Therefore, it would have been obvious to combine Singla’609 and Li’076 to bring about the invention as claimed.
Note that claim 10 contains the corresponding limitations of claim 3 as shown above; therefore, it is rejected using the same reasoning accordingly.
Claim(s) 6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Singla’609 in view of Matsukawa et al. (US 2014/0013062), hereafter referred to as Matsukawa’062.
As to claim 6, Singla’609 does not appear to explicitly teach the method of claim 1, wherein the communication protocol follows a “Secure Digital Input Output - SDIO” communication standard defined by the “SD Association” group, and wherein the command is an extended block read/write command.
However, Matsukawa’062 teaches wherein the communication protocol follows a “Secure Digital Input Output - SDIO” communication standard defined by the “SD Association” group (SDIO access command, paragraph 64, lines 2-3), and wherein the command is an extended block read/write command (transfer a command payload 20b constituted of a plurality of blocks to the extended function section 19 through the extension command payload port of the extension register by using CMD59, and read a response payload including long data constituted of a plurality of blocks through the extension response payload port of the extension register by using CMD58, see figure 48 and paragraph 379, lines 2-8).
Singla’609 and Matsukawa’062 are analogous because they are drawn to the same inventive field of memory communication.
Prior to the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of Singla’609 and Matsukawa’062 before them, to modify the method of Singla’609 to include the SDIO command of Matsukawa’062 by employing the SDIO protocol in the system.
The motivation for doing so would have been that prior to the effective filing date of the claimed invention, SDIO was a known protocol for memory communication. Implementing this protocol would not require undue experimentation, nor is it expected to have undesired results.
Therefore, it would have been obvious to combine Singla’609 and Matsukawa’062 to bring about the invention as claimed.
Note that claim 13 contains the corresponding limitations of claim 6 as shown above; therefore, it is rejected using the same reasoning accordingly.
Allowable Subject Matter
Claims 4-5 and 11-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As to claim 4, the prior art of record does not appear to anticipate, explicitly teach, or fairly suggest wherein using the field of the command includes a quantification, on one or more least significant bits of the field, of an address offset positioning a start of the location of the data in the region.
Further, it would not have been obvious to combine the above limitations with the remaining limitations of the claim.
Hosogi et al. (US 2007/0294514) discloses wherein MADDR, MWidth, MCount, and MPitch of the slave register are inputted to the data memory address generator via the address selector to access the data memory as the address. However, this does not appear to anticipate or explicitly teach the subject matter determined to be allowable.
Note that claim 11 contains the corresponding limitations of claim 4 as shown above; therefore, it is considered to contain allowable subject matter by the same reasoning accordingly.
As to claim 7, the prior art of record does not appear to anticipate, explicitly teach, or fairly suggest the method of claim 1, further comprising another using of the command field in order to address a register of a function following the protocol, including a respectively dedicated code on one or more most significant bits of the field to identify this other use.
Further, it would not have been obvious to combine the above emphasized limitations with the remaining limitations of the claim.
Venkataramanan et al. (US 2021/0044622) discloses utilizing one or more MSBs for a master class and LSBs for a local class. However, this does not appear to anticipate or explicitly teach the limitations of the claimed invention.
Note that claim 14 contains the corresponding limitations of claim 7 as shown above; therefore, it is considered to contain allowable subject matter by the same reasoning accordingly.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hosogi et al. (US 2007/0294514) discloses wherein MADDR, MWidth, MCount, and MPitch of the slave register are inputted to the data memory address generator via the address selector to access the data memory as the address.
Venkataramanan et al. (US 2021/0044622) discloses utilizing one or more MSBs for a master class and LSBs for a local class.
However, these references do not appear to anticipate or explicitly teach the subject matter determined to be allowable.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN B ROCHE whose telephone number is (571)270-1721. The examiner can normally be reached Monday-Friday, 10:30 - 7.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.B.R/Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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