DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received 09/26/2024 for application number 18/898,646. The Office hereby acknowledges receipt of the following and placed of record in file: Specification, Drawings, Abstract, Oath/Declaration, IDS, and Claims.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 2 and 4 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2, lines 3-10 recite, “in response to the priority parameter indicating a real-time priority…assign a hard-minimum power setting…or in response to the priority parameter indicating a best-effort priority…and a power-mode setting being satisfied by the hardware compute unit, assign a soft-minimum power setting” (emphasis added). However, it is unclear whether the hard-minimum response involves a power-mode setting as presented in the soft-minimum response due to Claims 3 and 4, which depend on Claim 2. If the device were to proceed to the response with the hard-minimum power setting as presented, then the following Claim 3 would be moot as it does not further limit the power-mode setting as explained in the 112(d) rejection below. While Claim 4 depends on Claim 3, the claim language requires the power-mode setting to exist within the alternate response of the hard-minimum power setting. For the purposes of examination, the examiner construes “or” between the alternate responses to be “and” (emphasis added).
Claim 4, lines 3-5 recite, “…the hard-minimum power setting consuming more power than a potential power setting selected based on the power-mode setting” (emphasis added). However, similar to the 112(b) rejection in Claim 2, the hard-minimum power setting is represented as an alternate response to the priority parameters and QoS parameters and the power-mode settings are only represented in the alternative response to the soft-minimum power settings. It is unclear whether the power-mode settings should also be included in the response to the hard-minimum power settings. For purposes of examination, the examiner interprets Claim 4 as presented.
Claim 3 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
As presented, Claim 3 is directed towards the power-mode setting of the hardware compute unit. However, Claim 2, on which Claim 3 depends, provides for any combination of the hardware functions assigning a hard-minimum power setting or a soft-minimum power setting. In the combination of functions in which the soft-minimum power setting is not selected, Claim 3 would not further the limit the subject matter of Claim 2.
Applicant may cancel the claim, amend the claim to place the claim in proper dependent form, rewrite the claim in independent form, or present a sufficient showing that the dependent claim complies with the statutory requirements.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by YEUNG et al., US 2019/0258528 A1.
Regarding Claim 1, YEUNG discloses:
A device comprising: (Fig. 1, system 100),
a power manager configured to: (Fig. 1, [0014] disclose an operating system layer 102 (i.e. a power manager)),
expose an application programming interface to an application to specify a priority parameter and a quality-of-service (QoS) parameter for processing a workload ([0014] discloses the operating system layer 102 (i.e. the power manager) receives graphics workloads from applications via application programming interfaces (APIs); Fig. 1 illustrates the media API 112, inking API 114, and late stage reprojection (LSR) API 116 are within the operating system layer 102. The operating system layer 102 would provide APIs to the video application 108, inking application 106, and virtual reality application 104 (i.e. exposing an application programming interface to an application); [0019] discloses the graphics workloads are received with completion deadline information (i.e. specifying a quality-of-service (QoS) parameter) and execution metadata (i.e. specifying a priority parameter); [0050] discloses execution metadata may be, for example, execution time variability, priority metadata, or other metadata), and
configure a hardware compute unit of the device to process the workload at a first power setting among multiple power settings based at least in part on the priority parameter and the QoS parameter ([0014] discloses the operating system layer 102 (i.e. the power manager) passes the graphics workload to the graphics processing unit 121 (i.e. a hardware compute unit); [0018] discloses the operating system layer 102 suggests the operating frequency to the GPU to execute the graphics workload through a processor performance adjustment (i.e. configuring the hardware compute unit of the device to process the workload at a first power setting); the processor performance adjustment is an energy performance level (EPL) represented as an integer between 0 and 100 (i.e. among multiple power settings), where 0 indicates lowest energy savings and 100 indicates highest frequency for speed and performance; [0019] discloses the processor performance adjustment (i.e. first power setting) is generated based in part on (i.e. is based at least in part on) completion deadline information (i.e. the QoS parameter) and execution metadata (i.e. the priority parameter); [0051] discloses the execution metadata may be execution time variability, priority metadata, or other metadata).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, in view of LI et al., US 2011/0173478 A1, and further in view of ROTEM et al., US 2025/0060808 A1 (as cited in the IDS).
Regarding Claim 2, YEUNG discloses the device of Claim 1. YEUNG further discloses:
wherein the power manager is further configured to: in response to the priority parameter and the QoS parameter specifying a latency or throughput for the workload, assign a power setting associated with the workload that ensures the QoS parameter is satisfied ([0018] discloses the operating system layer 102 (i.e. the power manager) provides the processor performance adjustment (i.e. assigns a power setting) to the GPU 121; [0019] discloses the processor performance adjustment is based on (i.e. in response to) the execution metadata (i.e. priority parameter) and completion deadline information (i.e. QoS parameter specifying a latency) for the graphics workload; the processor performance adjustment (i.e. the power setting) is generated according to the workload to ensure that the GPU completes the graphics workload by the deadline (i.e. associated with the workload that ensures the QoS parameter is satisfied).
YEUNG does not explicitly disclose wherein the power manager is further configured to: in response to the priority parameter indicating a real-time priority and the QoS parameter specifying a latency or throughput for the workload, assign a hard-minimum power setting associated with the workload that ensures the QoS parameter is satisfied; or
in response to the priority parameter indicating a best-effort priority, the QoS parameter specifying a latency or throughput for the workload, and a power-mode setting being satisfied by the hardware compute unit, assign a soft-minimum power setting associated with the workload that ensures the QoS parameter is satisfied.
However, LI teaches wherein the power manager is further configured to: in response to the priority parameter indicating a real-time priority and the QoS parameter specifying a latency or throughput for the workload, assign a hard-minimum power setting associated with the workload that ensures the QoS parameter is satisfied ([0014] teaches real-time media streams or other latency sensitive applications have a higher priority class (i.e. a real-time priority); [0020] teaches a thread 265a (i.e. the workload) comprising a real-time video encoding thread; the real-time portion requires higher priority (i.e. priority parameter indicating a real-time priority) and has detailed completion deadline data (i.e. QoS parameter specifying a latency for the workload) represented by thread 265a; the voltage and frequency for core 245a may be adjusted upwards to meet a minimum performance threshold (i.e. assign a hard-minimum power setting) for encoding in real-time without buffer underruns (i.e. associated with the workload that ensures the QoS is satisfied)); or
in response to the priority parameter indicating a best-effort priority, the QoS parameter specifying a latency or throughput for the workload, assign a soft-minimum power setting associated with the workload that ensures the QoS parameter is satisfied ([0014] teaches normal data transfers have a lower priority class (i.e. a best-effort priority); [0020] teaches a thread 265b (i.e. the workload) comprising a communication thread to transfer the resulting encoded video over a network, which would have a lower priority class than encoding as the thread is for data transfer (i.e. priority parameter indicating best-effort priority); thread 265b also has a detailed completion data for the workload (i.e. QoS parameter specifying a latency for the workload) and only needs to transfer a small amount of network data; the corresponding core 245b of processor 250 (i.e. the hardware unit) may adjust the voltage and frequency downwards until just enough performance is provided to service the network connection (i.e. assign a soft-minimum power setting associated with the workload that ensures the QoS parameter is satisfied)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG and LI before him before the effective filing date of the claimed invention, to incorporate setting the voltage and frequency based on priority and latency as taught by LI into the device as disclosed by YEUNG, to best optimize performance and power consumption to meet application requirements (LI [0020]).
The combination of YEUNG and LI does not explicitly teach in response to the priority parameter indicating a best-effort priority, the QoS parameter specifying a latency or throughput for the workload, and a power-mode setting being satisfied by the hardware compute unit, assign a soft-minimum power setting associated with the workload that ensures the QoS parameter is satisfied.
However, ROTEM teaches in response to a power-mode setting being satisfied by the hardware compute unit, assign a power setting associated with the workload ([0024] teaches an operating system power manager software (OSPM) 202 can receive slider power/performance (PP) settings from a user or other entity and sends out energy power and performance preference (EPP) settings to other components; [0025] teaches the OS slider settings and the EPP are impacted based on if the processor system is running off of AC, battery, or both. As the device is operating, the power and performance would be based on the power-mode by default (i.e. a power-mode being satisfied by the hardware unit); [0041] teaches data and hints associated with the workload characterization can be received and the data may be used to control operating points (e.g., voltage and frequency); [0026] teaches that decisions made to power/performance, on the fly, can be made in cooperation with general or specific OS power/performance guidelines.
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, and ROTEM before him before the effective filing date of the claimed invention, to incorporate assigning a power setting in cooperation with power/performance guidelines as taught by ROTEM into adjusting voltage/frequency to meet requirements as disclosed by YEUNG and LI, to enhance, or optimize, performance/efficiency in view of the workload type (ROTEM [0045]).
Regarding Claim 3, YEUNG, LI, and ROTEM disclose the device of Claim 2. ROTEM further teaches wherein the power-mode setting is based on: whether the device is powered by alternating-current (AC) power or direct-current (DC) power ([0025] teaches the OS slider settings/EPP values (i.e. the power-mode setting) may depend on (i.e. is based on) whether the processor system is running off of AC, battery, or both (i.e. whether the device is powered by alternating-current (AC) power or direct-current (DC) power)).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, LI, AND ROTEM, and further in view of MOSHE et al., US 2023/0236652 A1.
Regarding Claim 4, YEUNG, LI, and ROTEM disclose the device of Claim 3. LI further teaches:
wherein the power manager is further configured to throttle other hardware compute units of the device ([0020] teaches power management block 230 (i.e. the power manager) to adjust voltage and frequency for cores 245a-245b; the voltage and frequency for core 245b of processor 240 can be adjusted downward until just enough performance is provided (i.e. throttle other hardware compute units of the device)),
the power setting selected to satisfy the QoS parameter under the hard-minimum setting ([0020] teaches the voltage and frequency for core 245a may be adjusted upwards to meet a minimum performance threshold (the power setting selected under the hard-minimum setting) for encoding in real-time without buffer underruns (i.e. to satisfy the QoS parameter)).
YEUNG, LI, AND ROTEM do not explicitly disclose wherein the power manager is further configured to throttle other hardware compute units of the device in response to the power setting selected consuming more power than a potential power setting selected based on the power-mode setting.
However, MOSHE teaches wherein the power manager is further configured to throttle other hardware compute units of the device in response to the power setting selected consuming more power than a potential power setting selected based on the power-mode setting ([0077] teaches the power arbitration logic 568.4 (i.e. the power manager) may trigger a reduction in power use (i.e. further configured to throttle) other storage devices (i.e. other hardware compute units of the device) to provide additional power for the scheduled power event; power arbitration logic 568.4 looks at current power use (i.e. the power setting selected) and the predicted power use from power estimator 558 (i.e. the potential power setting selected based on the power-mode setting) and lowers the power use of storage devices to support increased use in another storage device (i.e. throttling other hardware compute units in response to the power setting selected consuming more power than the potential power setting).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, ROTEM, and MOSHE before him before the effective filing date of the claimed invention, to incorporate providing power to prioritized components by throttling others as taught by MOSHE into the device as disclosed by YEUNG, LI, and ROTEM, to improve the management of device power states (MOSHE [0015]).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, LI, AND ROTEM, and further in view of ALLEN-WARE et al., US 2014/0149762 A1.
Regarding Claim 5, YEUNG, LI, AND ROTEM disclose the device in Claim 3. YEUNG, LI, AND ROTEM do not explicitly disclose:
wherein the power manager is further configured to throttle the hardware compute unit in response to the power setting selected to satisfy the QoS parameter under the soft-minimum power setting consuming more power than a potential power setting selected based on the power-mode setting.
However, ALLEN-WARE teaches wherein the power manager is further configured to throttle the hardware compute unit in response to the power setting selected to satisfy the QoS parameter under the soft-minimum power setting consuming more power than a potential power setting selected based on the power-mode setting ([0019-0020] teach the performance supervisor 110 (i.e. the power manager) sets a voltage-frequency (V/F) maximum and minimum (V/F max and V/f min) prior to receiving any processes; [0021] teaches a process can indicate a requested V/F pair, the requests can be increased for high workloads or decreased during light workloads; [0023] teaches selecting the greater output between the set V/F min and the requested V/F min (i.e. the power setting selected) to be evaluated against the V/F max (i.e. the potential power setting selected based on power-mode), the V/F request is effectively capped to conform to the V/F max (i.e. throttling the hardware unit) when the V/F request is greater than the V/F max (i.e. in response to the power setting selected consuming more power than a potential power setting selected based on the power-mode setting)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, ROTEM, and ALLEN-WARE before him before the effective filing date of the claimed invention, to incorporate the comparison between the request voltage/frequency with the set voltage/frequency as taught by ALLEN-WARE into the device as disclosed by YEUNG, LI, and ROTEM, to reduce power consumption while maintaining system performance (ALLEN-WARE [0003]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, LI, AND ROTEM, and further in view of METZ et al., US 2017/0061568 A1.
Regarding Claim 6, YEUNG, LI, AND ROTEM disclose the device in Claim 2. YEUNG, LI, AND ROTEM do not explicitly disclose:
wherein the power manager is further configured to, in response to the application not specifying the QoS parameter, assign no minimum power setting associated with the workload and determine the first power setting based on the power-mode setting.
However, METZ teaches wherein the power manager is further configured to, in response to the application not specifying the QoS parameter, assign no minimum power setting associated with the workload and determine the first power setting based on the power-mode setting ([0079] teaches a power management unit 70 (i.e. the power manager) may set a power state based on the workload size metric (if available), and the QoS metric (if available) (i.e. QoS parameter); [0066] teaches a power management unit 70 may set an adequate operating clock frequency and operating voltage to meet the minimum QoS of a workload, then use other stream command hints that identify other types of workloads (i.e. application not specifying the QoS parameter) to lower operating clock frequency and operating voltage (i.e. assign no minimum power setting associated with the workload) to meet any thermal mitigation requirements (i.e. determine the first power setting based on the power-mode setting)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, ROTEM, and METZ before him before the effective filing date of the claimed invention, to incorporate prioritization of device requirements for non-QoS workloads as taught by METZ into the device as disclosed by YEUNG, LI, and ROTEM, to maintain thermal mitigation for all workloads but those with a minimum QoS requirement (METZ [0066]).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, in view of DULUK et al., US 2021/0157651 A1.
Regarding Claim 7, YEUNG discloses the device of claim 1. YEUNG further discloses:
determine the first power setting based at least in part on the priority parameter and the QoS parameter ([0018] discloses the operating system layer 102 (i.e. the power manager) provides the processor performance adjustment (i.e. determines a power setting) to the GPU 121; [0019] discloses the processor performance adjustment is based at least in part on the execution metadata (i.e. priority) and completion deadline information (i.e. QoS parameter) for the graphics workload (i.e. for the workload)).
YEUNG does not explicitly disclose wherein the power manager is further configured to receive operation data that describes operation characteristics of the hardware compute unit and determine the first power setting based at least in part on the priority parameter, the QoS parameter, and the operation data.
However, DULUK teaches wherein the power manager is further configured to receive operation data that describes operation characteristics of the hardware compute unit and determine the first power setting based at least in part on the operation data ([0312] teaches circuit subsections 3810(0)-3810(N) may each have a parallel processing unit (PPU) partition 600; [0314] teaches the clock frequency controller 3830 monitors the power consumption of the circuit subsections 3810(0)-3810(N) (i.e. receiving operation data describing characteristics of the hardware unit); [0314] teaches if the clock frequency controller 3830 determines that a particular circuit subsection is consuming more power relative to other circuit subsections, then the clock frequency controller 3830 reduces the frequency of the circuit subsection that is consuming more power; on the other hand if the clock frequency controller 3830 is consuming less power relative to other circuit subsections, then the clock frequency controller 3830 increases the frequency of the circuit subsection that is consuming less power (i.e. selecting the first power setting is based at least in part on the operation data)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG and DULUK before him before the effective filing date of the claimed invention, to incorporate changing the frequency based on power consumption as taught by DULUK into the device as disclosed by YEUNG, to utilize GPU resources more efficiently (DULUK [0057]).
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, in view of LI.
Regarding Claim 8, YEUNG discloses:
A method comprising: (Fig. 7, method 700 for dynamic processor power adjustment),
receiving an input via an application programming interface (API) from an application, the input specifying a priority parameter for processing a workload associated with the application ([0050] discloses receiving operation 702 receives one or more graphics workloads (i.e. receiving an input from an application) from an application; [0014] discloses the workloads (i.e. inputs) can be received via application programming interface (API) from the applications (i.e. via application programming interface (API); each graphic workload received during receiving operation 702 is associated with execution metadata (i.e. input specifying a priority parameter); [0051] discloses the execution metadata may be execution time variability, priority metadata, or other metadata for executing the graphics workload (i.e. priority parameter for processing a workload associated with the application));
selecting, based at least in part on the priority parameter, a first power setting from among multiple power settings to process the workload, each power setting of the multiple power settings identifying a frequency at which to operate a hardware compute unit ([0052] discloses a generating operation 704 where an operating system power management module may generate a processor performance adjustment (i.e. selecting a first power setting) based on the execution metadata (i.e. based at least in part on the priority parameter) and completion deadline information; [0018] discloses the processor performance adjustment is an energy performance level (EPL) represented as an integer between 0 and 100 (i.e. among multiple power settings), where 0 indicates lowest frequency for energy savings and 100 indicates highest frequency for speed and performance (i.e. identifying a frequency at which to operate a hardware compute unit)); and
processing the workload from the application by the hardware compute unit at the first power setting ([0053] discloses the communicating operation 706 where the graphics workloads and their corresponding processor performance adjustment (i.e. the first power setting) is communicated to the processor subsystem (i.e. the hardware compute unit); the processor subsystem uses the processor performance adjustment to adjust to the operating frequency to execute the workload (i.e. processing the workload from the application by the hardware compute unit at the first power setting)).
While YEUNG discloses a change in frequency, YEUNG does not explicitly disclose selecting, based at least in part on the priority parameter, a first power setting from among multiple power settings to process the workload, each power setting of the multiple power settings identifying a voltage and a frequency at which to operate a hardware compute unit;
However, LI teaches selecting, based at least in part on the priority parameter, a first power setting from among multiple power settings to process the workload, each power setting of the multiple power settings identifying a voltage and a frequency at which to operate a hardware compute unit ([0020] teaches the method adjusting a voltage and frequency of a core in a processor (i.e. identifying a voltage and a frequency at which to operate the hardware unit) upward to meet a minimum performance threshold for encoding in real-time (i.e. based on the priority));
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG and LI before him before the effective filing date of the claimed invention, to incorporate changing voltage and frequency as taught by LI into the method as disclosed by YEUNG to best optimize performance and power consumption to meet application requirements (LI [0020]).
Regarding Claim 9, YEUNG and LI disclose the method of Claim 8. LI further teaches wherein the priority parameter indicates the workload has a real-time priority, priority-band, or best-effort priority (LI [0014] teaches real-time media streams or other latency sensitive applications have a higher priority class (i.e. priority parameter indicates a real-time priority); [0020] teaches a thread 265a (i.e. the workload) comprising a real-time video encoding thread which would require a minimum performance needed to encode in real-time without buffer underruns).
Regarding Claim 10, YEUNG and LI disclose the method of Claim 9. LI further teaches:
wherein the method further comprises: in response to the priority parameter indicating the real-time priority and the input also specifying a quality-of-service (QoS) parameter for the workload, selecting a second power setting from among the multiple power settings to process the workload that satisfies the QoS parameter ([0014] teaches real-time media streams or other latency sensitive applications have a higher priority class (i.e. a real-time priority); [0020] teaches a thread 265a (i.e. the workload) comprising a real-time video encoding thread. The real-time part of it requires higher priority (i.e. priority parameter indicating real-time priority) and has detailed completion deadline data (i.e. QoS parameter specifying a latency for the workload) represented by thread 265a; The voltage and frequency for core 245a in processor 240 (i.e. the hardware compute unit) may be adjusted upwards to meet a minimum performance threshold (i.e. selecting a second power setting) for encoding in real-time without buffer underruns (i.e. associated with the workload that ensures the QoS is satisfied));
in response to the priority parameter indicating the best-effort priority and the input also specifying the QoS parameter for the workload, selecting a third power setting to process the workload that satisfies the QoS parameter or a power mode of the hardware compute unit; or
in response to the input not specifying the QoS parameter for the workload, selecting a fourth power setting that satisfies the power mode.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG and LI, and further in view of ALLEN-WARE.
Regarding Claim 11, YEUNG and LI disclose the method of Claim 10. YEUNG and LI do not explicitly disclose:
in response to a power-mode based power setting consuming more power than a QoS-based power setting, the QoS-based power setting is selected as the third power setting; or
in response to the QoS-based power setting consuming more power than the power-mode-based power setting, the power-mode-based power setting is selected as the third power setting.
However, ALLEN-WARE teaches in response to the QoS-based power setting consuming more power than the power-mode-based power setting, the power-mode-based power setting is selected as the third power setting ([0019-0020] teach the performance supervisor 110 sets a voltage-frequency (V/F) maximum and minimum (V/F max and V/f min) prior to receiving any processes; [0021] teaches a process can indicate a requested V/F pair, the requests can be increased for high workloads or decreased during light workloads; [0023] teaches based on the evaluation between the set V/F max (i.e. the power-mode based power setting) and greater output between the set V/F min and requested V/F min (i.e. the QoS-based power setting), the V/F request is effectively capped to conform to the V/F max (i.e. the power-mode-based setting is selected as the third power setting) when the V/F request is greater than the V/F max (i.e. in response to the QoS-based power setting consuming more power than the power-mode-based power setting)); or
in response to a power-mode based power setting consuming more power than a QoS-based power setting, the QoS-based power setting is selected as the third power setting.
Accordingly, it would have been obvious to a person of ordinary art, having the teachings of YEUNG, LI, and ALLEN–WARE before him before the effective filing date of the claimed invention, to incorporate the comparison between the requested voltage/frequency with the set voltage/frequency as taught by ALLEN-WARE into the method as disclosed by YEUNG and LI to reduce power consumption while maintaining system performance (ALLEN-WARE [0003]).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG and LI, and further in view of ROTEM.
Regarding Claim 12, YEUNG and LI disclose the method of Claim 10. YEUNG further discloses:
wherein: the multiple power settings are arranged in a power-level table by descending amounts of power consumption per power setting ([0018] discloses an energy performance level (EPL) as integers that can range from 100 as the highest frequency for speed and performance to 0 as the lowest frequency for energy saving);
YEUNG and LI do not explicitly disclose potential power settings available in the power-level table are determined at least in part by the power-mode of the hardware compute unit.
However, ROTEM teaches potential power settings available in the power-level table are determined at least in part by the power-mode of the hardware compute unit ([0026] teaches an energy power and performance (EPP) setting or value that can be a unitless value from 0 to 100; [0027] teaches Table 1 that shows default EPP values for some Windows platforms; the table lists operating system power policies and the corresponding EPP value (i.e. potential power settings available in the power-level table) based on if the processor system is running of AC or battery (i.e. determined by the power-mode of the hardware compute unit). If the processor system is powered by AC, the EPP values move towards higher performance than if the processor system is powered by DC).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, and ROTEM before him before the effective filing date of the claimed invention, to incorporate OS slider settings and EPP values based on AC/DC as taught by ROTEM into the method as disclosed by YEUNG and LI to dynamically optimize system performance, battery life, thermals, and the like (ROTEM [0032]).
Claims 13 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over YEUNG and LI, further in view of RAJAPPA et al., US 2016/0054775 A1.
Regarding Claim 13, YEUNG and LI disclose the method of Claim 8. YEUNG further discloses:
selecting the first power setting is based at least in part on the priority parameter ([0019] discloses the processor performance adjustment of a graphics workload is generated (i.e. selecting the first power setting) based in part on execution metadata (i.e. based at least in part on the priority parameter)),
YEUNG and LI do not explicitly disclose wherein: the method further comprises receiving workload statistics describing the workload; and
selecting the first power setting is based at least in part on the priority parameter and workload statistics.
However, RAJAPPA teaches wherein: the method further comprises receiving workload statistics describing the workload ([0024] teach retrieving (i.e. receiving) the calibration data (i.e. workload statistics) that can be various parameters of the nodes used to process a job (e.g., power consumption) (i.e. describing a workload)); and
selecting the first power setting is based at least in part on the workload statistics ([0024] teach if the same job has to be processed again, the calibration data associated with the job during its previous run-time (i.e. workload statistic) can be used to estimate the power that should be allocated to operate a job (i.e. selecting the first power setting is based at least in part on the workload statistics)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, and RAJAPPA before him before the effective filing date of the claimed invention, to incorporate power allocation based on prior job data as taught by RAJAPPA into the method as disclosed by YEUNG and LI to efficiently schedule and monitor each job requested by one or more job owners (RAJAPPA [0045]).
Regarding Claim 15, YEUNG, LI, AND RAJAPPA disclose the method of Claim 13. RAJAPPA further teaches wherein the workload statistics are determined based on prior knowledge of processing the workload ([0024] teaches if the same job (i.e. the workload) has to be processed again, the calibration data associated with the job during its previous run-time (i.e. workload statistics are determined based on prior knowledge of processing the workload) can be used to estimate the power that should be allocated to operate a job).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG and LI, and further in view of NANJA et al., US 2005/0132238 A1.
Regarding Claim 14, YEUNG and LI disclose the method of Claim 8. YEUNG and LI do not explicitly disclose:
wherein the workload statistics specify a number of operations or amount of data movement.
However, NANJA teaches wherein the workload statistics specify a number of operations or amount of data movement ([0023] teaches the instruction counts (i.e. the workload statistics) are number of instructions (i.e. specify a number of operations) by the application at runtime).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, and NANJA before him before the effective filing date of the claimed invention, to incorporate monitoring instruction counts as taught by NANJA into the method as disclosed by YEUNG and LI to optimize a default power policy based on observation data (NANJA [0029]).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG and LI, and further in view of NIMMAGADDA et al., US 2021/0382754 A1.
Regarding Claim 16, YEUNG and LI disclose the method of Claim 8. YEUNG and LI do not explicitly disclose:
wherein the workload includes execution of a machine-learning model selected from a plurality of precompiled machine-learning models.
However, NIMMAGADDA teaches wherein the workload includes execution of a machine-learning model selected from a plurality of precompiled machine-learning models ([0016] teaches an AI workload (i.e. the workload) may include an input stream, an AI model (i.e. machine-learning model) and associated AI processes to process; characteristics of execution of the AI model (i.e. execution of a machine-learning model) and the input stream may be predicted; [0056] teaches the method 800 further includes selecting an AI model from a plurality of AI models (i.e. selected from a plurality of precompiled machine-learning models)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, and NIMMAGADDA before him before the effective filing date of the claimed invention, to incorporate the utilization of machine-learning models included in an AI workload as taught by NIMMAGADDA into the method as disclosed by YEUNG and LI to execute efficiently within the memory and computational constraints of hardware devices in the heterogeneous cluster (NIMMAGADDA [0018]).
Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over YEUNG and LI, and further in view of DULUK.
Regarding Claim 17, YEUNG and LI disclose the method of Claim 8. YEUNG further discloses:
selecting the first power setting is based at least in part on the priority parameter ([0052] discloses a generating operation 704 where an operating system power management module may generate a processor performance adjustment (i.e. selecting a first power setting) based on the execution metadata (i.e. based at least in part on the priority parameter)),
YEUNG and LI do not explicitly disclose wherein: the method further comprises receiving operation data that describes operating characteristics of the hardware compute unit; and
selecting the first power setting is based at least in part on the priority parameter and the operation data.
However, DULUK teaches wherein: the method further comprises receiving operation data that describes operating characteristics of the hardware compute unit ([0312] teaches circuit subsections 3810(0)-3810(N) may each have a parallel processing unit (PPU) partition 600; [0314] teaches the clock frequency controller 3830 monitors the power consumption of the circuit subsections 3810(0)-3810(N) (i.e. receiving operation data describing characteristics of the hardware unit)); and
selecting the first power setting is based at least in part on the operation data ([0314] teaches if the clock frequency controller 3830 determines that a particular circuit subsection is consuming more power relative to other circuit subsections, then the clock frequency controller 3830 reduces the frequency of the circuit subsection that is consuming more power; conversely, if the clock frequency controller 3830 is consuming less power relative to other circuit subsections, then the clock frequency controller 3830 increases the frequency of the circuit subsection that is consuming less power (i.e. selecting the first power setting is based at least in part on the operation data)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, LI, and DULUK before him before the effective filing date of the claimed invention, to incorporate changing the frequency based on power consumption as taught by DULUK into the method as disclosed by YEUNG and LI to utilize GPU resources more efficiently (DULUK [0057]).
Regarding Claim 18, YEUNG, LI, and DULUK disclose the method of Claim 17. DULUK further teaches herein the operation data comprises operation characteristics of another partition of the hardware unit ([0310] teaches the parallel processing unit (PPU) (i.e. the hardware compute unit) includes a power and clock frequency management that considers how power consumption (i.e. the operation data comprises operation characteristics) within one PPU partition 600 (i.e. another partition of the hardware compute unit) may negatively impact performance of other PPU partitions).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, in view of RAJAPPA and further in view of HSIEH et al., US 2016/0210174 A1.
Regarding Claim 19, YEUNG discloses:
A method comprising: (Fig. 7, method 700 for dynamic processor power management);
receiving an input from an application that specifies a priority parameter and a quality-of-service (QoS) parameter for processing a workload ([0050] discloses receiving operation 702 receives one or more graphics workloads from an application; [0014] discloses the workloads (i.e. inputs) can be received via application programming interface (API) from the applications; each graphic workload received during receiving operation 702 is associated with completion deadline information (i.e. a quality-of-service (QoS) parameter) and execution metadata (i.e. input specifying a priority parameter); [0051] discloses the execution metadata may be execution time variability, priority metadata, or other metadata for executing the graphics workload (i.e. for processing a workload));
selecting a power setting of a hardware compute unit to process the workload, the power setting in processing the workload and based at least in part on the priority parameter and the QoS parameter ([0052] discloses a generating operation 704 where an operating system power management module may generate a processor performance adjustment for the processor subsystem (i.e. selecting a first power setting of a hardware compute unit) is based on the execution metadata (i.e. based at least in part on the priority parameter) and completion deadline information (i.e. and the QoS parameter); [0018] discloses the processor performance adjustment is an energy performance level (EPL) represented as an integer between 0 and 100 (i.e. among multiple power settings), where 0 indicates lowest frequency for energy savings and 100 indicates highest frequency for speed and performance (i.e. identifying a frequency at which to operate a hardware compute unit));
YEUNG does not explicitly disclose receiving an input from an application that specifies a priority parameter, a quality-of-service (QoS) parameter, and workload statistics for processing a workload; and
selecting a power setting of a hardware compute unit to process the workload, the power setting determined to minimize power consumption in processing the workload and based at least in part on the workload statistics;
However, RAJAPPA teaches receiving an input from an application that specifies workload statistics for processing a workload (RAJAPPA [0024] teaches retrieving (i.e. receiving) the calibration data (i.e. workload statistics) that can be various parameters of the nodes used to process a job (e.g., power consumption) (i.e. specifies the workload statistics for processing a workload));
selecting a power setting of a hardware compute unit to process the workload, the power setting determined to minimize power consumption in processing the workload and based at least in part on the workload statistics ([0024] teaches if the same job has to be processed again, the calibration data associated with the job during its previous run-time (i.e. workload statistics) can be used to estimate the power that should be allocated to a operate a job (i.e. selecting the first power setting is based at least in part on the workload statistics); [0045] teaches the estimator 230 can create a power consumption estimate that includes, but are not limited or restricted to, whether the owner of the job permits the job to be subject to a power limit, the job power policy limiting the power supplied to the job (e.g., a predetermined fixed frequency at which the job will run, a minimum power required for the job, or varying frequencies and/or power supplied determined by the resource manager 210) (i.e. the power setting determined to minimize power consumption));
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG and RAJAPPA before him before the effective filing date of the claimed invention, to incorporate utilization of calibration data based on prior job runtimes to allocate power as taught by RAJAPPA into executing a workload based on priority and QoS as disclosed by YEUNG to efficiently schedule and monitor each job requested by one or more job owners (RAJAPPA [0045]).
YEUNG AND RAJAPPA do not explicitly disclose generating a partition in the hardware compute unit based on the power setting; and processing the workload from the application using the generated partition by the hardware compute unit.
However, HSIEH teaches generating a partition in the hardware compute unit based on the power setting; and processing the workload from the application using the generated partition by the hardware compute unit ([0031] teaches the power manager 340 may select an active processing core subset 314 (i.e. generating a partition) from a processing core set 310 of processing system 300 (i.e. in the hardware compute unit) and set processing frequencies for each processing core of the active processing core subset 314 (i.e. based on the power setting); The power manager 340 may activate the active processing core subset 314 containing the processing core executing a processing thread (i.e. processing the workload using the generated partition by the hardware compute unit)).
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, RAJAPPA, and HSIEH before him before the effective filing date of the claimed invention, to incorporate the execution of threads on a core subset at a frequency as taught by HSIEH into the method as disclosed by YEUNG and RAJAPPA to conserve power consumption (HSIEH [0031]).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over YEUNG, RAJAPPA, and HSIEH, further in view of LI.
Regarding Claim 20, YEUNG, RAJAPPA, and HSIEH disclose the method of Claim 19. YEUNG further discloses:
wherein the method further comprises: in response to the priority parameter and the QoS parameter being specified, selecting the power setting to ensure satisfaction of the QoS parameter (YEUNG [0018] disclose the operating system layer 102 (i.e. the power manager) provides the processor performance adjustment (i.e. assigns a power setting) to the GPU 121 in response to the execution metadata (i.e. priority) and completion deadline information (i.e. QoS parameter specifying a latency) for the graphics workload (i.e. for the workload); [0019] discloses the processor performance adjustment (i.e. the power setting) is generated according to the workload to ensure that the GPU completes the graphics workload by the deadline (i.e. associated with the workload that ensures the QoS parameter is satisfied));
YEUNG, RAJAPPA, and HSIEH do not explicitly disclose wherein the method further comprises: in response to the priority parameter indicating a real-time priority and the QoS parameter being specified, selecting the power setting to ensure satisfaction of the QoS parameter;
In response to the priority parameter indicating a best-effort priority and the QoS parameter being specified, selecting the power setting to ensure satisfaction of the QoS parameter or compliance with a power-mode setting associated with the hardware compute unit; or
In response to the QoS parameter not being specified, selecting the power setting to ensure compliance with the power-mode setting.
However, LI teaches wherein the method further comprises: in response to the priority parameter indicating a real-time priority and the QoS parameter being specified, selecting the power setting to ensure satisfaction of the QoS parameter ([0014] teaches real-time media streams or other latency sensitive applications have a higher priority class (i.e. a real-time priority); [0020] teaches a thread 265a comprising a real-time video encoding thread. The real-time portion requires higher priority (i.e. priority parameter indicating a real-time priority) and has detailed completion deadline data (i.e. QoS parameter specifying a latency for the workload) represented by thread 265a; The voltage and frequency for core 245a in processor 240 (i.e. the hardware compute unit) may be adjusted upwards to meet a minimum performance threshold (i.e. selecting a second power setting) for encoding in real-time without buffer underruns (i.e. to ensure satisfaction of the QoS));
in response to the priority parameter indicating a best-effort priority and the QoS parameter being specified, selecting the power setting too ensure satisfaction of the QoS parameter or compliance with a power-mode setting associated with the hardware compute unit; or
in response to the QoS parameter not being specified, selecting the power setting to ensure compliance with the power-mode setting.
Accordingly, it would have been obvious to a person having ordinary skill in the art, having the teachings of YEUNG, RAJAPPA, HSIEH, and LI before him before the effective filing date of the claimed invention, to incorporate increasing power to meet higher priority and latency sensitive threads as taught by HSIEH into the method as disclosed by YEUNG, RAJAPPA, and HSIEH to best optimize performance and power consumption to meet application requirements (LI [0020]).
Conclusion
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/L.A./Examiner, Art Unit 2175
/ANDREW J JUNG/Supervisory Patent Examiner, Art Unit 2175
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