Prosecution Insights
Last updated: August 17, 2026
Application No. 18/899,209

FLEXIBLE MOUNTING STRUCTURES FOR SURFACE MOUNT COMPONENTS

Final Rejection §103
Filed
Sep 27, 2024
Examiner
MISHLER, ROBIN J
Art Unit
2628
Tech Center
2600 — Communications
Assignee
Intel Corporation
OA Round
2 (Final)
70%
Grant Probability
Favorable
3-4
OA Rounds
8m
Est. Remaining
76%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
508 granted / 730 resolved
+7.6% vs TC avg
Moderate +6% lift
Without
With
+5.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
18 currently pending
Career history
745
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
59.2%
+19.2% vs TC avg
§102
32.4%
-7.6% vs TC avg
§112
5.0%
-35.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 730 resolved cases

Office Action

§103
CTFR 18/899,209 CTFR 86101 DETAILED ACTION Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 1-7 and 10-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watanabe (US 2024/0014737), hereinafter referred to as “Wat”, in view of Akiyoshi (US 2018/0374640) . Regarding claim 1, Wat discloses an apparatus comprising: a circuit board (20, fig. 1 and para. 41) comprising: a first metal layer adjacent an upper surface of the circuit board (see top layer of 20 in fig. 1 and para. 42); and conductive contact (21, fig. 4 and para. 43, 53) integral with and extending away from the first metal layer (see fig. 4 and fig. 1) ; and a multilayer ceramic capacitor (20, fig. 1 and para. 30, 53) coupled to ends the conductive contact positioned away from the circuit board (see fig. 4 and para. 53; wherein a spring terminal 21 is used to space the capacitor unit 10 away from the circuit board 20, further wherein the unit and board are elastically connected). Wat fails to disclose multiple conductive contacts. Akiyoshi discloses conductive contacts (40a and 40b in fig. 1 and in fig. 3, and see para. 44). When the invention was made (pre-AIA) or before the effective filing date of the claimed invention (AIA), it would have been obvious to one of ordinary skill in the art to include the teachings of Akiyoshi in the device of Wat. The motivation for doing so would have been to better absorb mechanical strain through providing multiple support contacts (Akiyoshi; para. 79 and fig. 3; wherein the circuit component is supported better with two conductive contacts, resulting in less breaks/failures). The same rationale to combine is applied to claims 2-15. Regarding claim 2, Wat discloses wherein the conductive contacts extend away from the first metal layer at an angle less than approximately 90 degrees (see 21 in fig. 4). Regarding claim 3, Wat discloses wherein the conductive contacts each comprise a first portion (24, fig. 4) that is at an angle relative to the upper surface of the circuit board (see fig. 4) and a second portion (23, fig. 4) that is substantially parallel with the upper surface of the circuit board (see fig. 4). Regarding claim 4, Wat discloses wherein the first portion is at an angle of less than approximately 45 degrees with respect to the upper surface of the circuit board (see 24 in fig. 4 and para. 53, wherein spring terminal 21 is elastic). Regarding claim 5, Wat discloses wherein the second portion is at a vertical distance from the upper surface of the circuit board (see 23 in fig. 4). Regarding claim 6, Akiyoshi discloses wherein a first conductive contact (40b in fig. 3) of the conductive contacts extends away from the first metal layer at a first angle (see angle of 54e in fig. 3) and a second conductive contact (40a in fig. 3) of the conductive contacts extends away from the first metal layer at a second angle (see 44e in fig. 3) different from the first angle (see fig. 3). Regarding claim 7, Akiyoshi discloses wherein a first conductive contact (40a, fig. 3) defines an opening (see opening created between section 42 and section 46 of contact 40a in fig. 3, wherein an opening is defined by the shape of 40a) and a second conductive contact (40b in fig. 3) is disposed within the opening of the first conductive contact (see fig. 3, wherein 40b is located in opening between section 42 and section 46). Claim 10 is rejected for the same reasons stated for claims 1 and 3. See above rejections. Claims 11-13 are rejected for the same reasons as claims 2-4, respectively. See above rejections. Claims 14-15 are rejected for the same reasons as claims 6-7, respectively. See above rejections. Regarding claim 16, Wat discloses computing device comprising: a motherboard (20, fig. 1 and para. 41); a processor (see electronic components in para. 45, further wherein a processor is a conventional electronic component) coupled to the motherboard; memory (see electronic components in para. 45, further wherein memory is a conventional electronic component) coupled to the motherboard; and circuit components (11, fig. 1 and para. 41) coupled to the motherboard, wherein at least one circuit component is coupled to the motherboard via conductive contact (21, fig. 4 and para. 43, 53) that are integral with and extend away from a first metal layer of the motherboard (see fig. 4 and fig. 1)¸ the circuit component positioned away from the mother board (see fig. 4 and para. 53; wherein a spring terminal 21 is used to space the capacitor unit 10 away from the circuit board 20, further wherein the unit and board are elastically connected). Wat fails to disclose multiple conductive contacts. Akiyoshi discloses conductive contacts (40a and 40b in fig. 1 and in fig. 3). When the invention was made (pre-AIA) or before the effective filing date of the claimed invention (AIA), it would have been obvious to one of ordinary skill in the art to include the teachings of Akiyoshi in the device of Wat. The motivation for doing so would have been to better absorb mechanical strain through providing multiple support contacts (Akiyoshi; para. 79 and fig. 3; wherein the circuit component is supported better with two conductive contacts, resulting in less breaks/failures). The same rationale to combine is applied to claims 17-20. Claims 17-19 are rejected for the same reasons stated for claims 2-4, respectively. See above rejections. Claims 20 is rejected for the same reasons stated as claim 1. See above rejection . Response to Arguments Applicant’s arguments with respect to claims have been considered but are moot in view of new grounds of rejection. See new citations above. Conclusion 07-39 AIA THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBIN J MISHLER whose telephone number is (571)270-7251. The examiner can normally be reached on 8:00-5:00 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, NITIN PATEL can be reached on (571)272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBIN J MISHLER/Primary Examiner, Art Unit 2628 Application/Control Number: 18/899,209 Page 2 Art Unit: 2628 Application/Control Number: 18/899,209 Page 3 Art Unit: 2628 Application/Control Number: 18/899,209 Page 4 Art Unit: 2628 Application/Control Number: 18/899,209 Page 5 Art Unit: 2628 Application/Control Number: 18/899,209 Page 6 Art Unit: 2628 Application/Control Number: 18/899,209 Page 7 Art Unit: 2628
Read full office action

Prosecution Timeline

Sep 27, 2024
Application Filed
Feb 13, 2026
Non-Final Rejection mailed — §103
May 11, 2026
Response Filed
Jun 09, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
70%
Grant Probability
76%
With Interview (+5.9%)
2y 7m (~8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 730 resolved cases by this examiner. Grant probability derived from career allowance rate.

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