Prosecution Insights
Last updated: July 17, 2026
Application No. 18/899,294

IMAGING ELEMENT, IMAGING APPARATUS, OPERATION METHOD OF IMAGING ELEMENT, AND PROGRAM

Non-Final OA §103
Filed
Sep 27, 2024
Priority
Jul 26, 2019 — JP 2019-138238 +2 more
Examiner
LAEKEMARIAM, YOSEF K
Art Unit
2691
Tech Center
2600 — Communications
Assignee
Fujifilm Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
806 granted / 977 resolved
+20.5% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
28 currently pending
Career history
1004
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
89.0%
+49.0% vs TC avg
§102
3.7%
-36.3% vs TC avg
§112
1.6%
-38.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 977 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting 1. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). Claims 1-21 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1-20 of U.S. Patent application No. (17577346). Although the conflicting claims are not identical, they are not patentably distinct from each other because they both claims similar methods and comprise almost identical steps (See claim below for comparison). Both the current application and the co-pending patent application claims similar of: An image sensor including a memory that is incorporated in the imaging element and stores image data obtained by imaging; a control circuit that is incorporated in the imaging element, controls storage of the image data in the memory and stores attribute information of the image data in the memory; an output interface that is incorporated in the imaging element and outputs the image data stored in the memory; and a reception interface that receives an instruction related to the attribute information. The current application is distinct and broader than the co-pending application, since the current application not specifically disclose “wherein at least a photoelectric conversion element and the memory are formed in one chip” (See claims below for comparison). Application No. 18899294 1. An image sensor including a memory that is incorporated in the imaging element and stores image data obtained by imaging; a control circuit that is incorporated in the imaging element, controls storage of the image data in the memory and stores attribute information of the image data in the memory; an output interface that is incorporated in the imaging element and outputs the image data stored in the memory; and a reception interface that receives an instruction related to the attribute information, wherein the output interface outputs the attribute information corresponding to the instruction received by the reception interface before storing the image data corresponding to the attribute information in the memory is completed. US patent application No. 17577346 1. An image sensor including: a memory that is incorporated in the image sensor and stores image data obtained by imaging; a control circuit that is incorporated in the image sensor, that controls storage of the image data in the memory, and that generates and stores attribute information of the image data in the memory; an output interface that is incorporated in the image sensor and outputs the image data stored in the memory; and a reception interface that receives an instruction related to the attribute information, wherein the output interface outputs the attribute information corresponding to the instruction received by the reception interface, and wherein at least a photoelectric conversion element and the memory are formed in one chip. Application No. 18899294 20. An operation method of an image sensor incorporating a memory that stores image data obtained by imaging, the operation method comprising: controlling storage of the image data in the memory; storing attribute information of the image data in the memory; outputting the image data stored in the memory; receiving an instruction related to the attribute information; and outputting the attribute information corresponding to the received instruction before storing the image data corresponding to the attribute information in the memory is completed. US patent application No. 17577346 20. An operation method of an image sensor incorporating a memory that stores image data obtained by imaging, the operation method comprising: controlling storage of the image data in the memory via a control circuit that is incorporated in the image sensor; generating and storing attribute information of the image data in the memory, via the control circuit; outputting the image data stored in the memory, via an output interface that is incorporated in the image sensor; receiving an instruction related to the attribute information; and outputting the attribute information corresponding to the received instruction, wherein at least a photoelectric conversion element and the memory are formed in one chip. Application No. 18899294 21. A non-transitory computer-readable storage medium storing a program for a computer applied to an image sensor incorporating a memory that stores image data obtained by imaging, the program causing the computer to execute a process comprising: controlling storage of the image data in the memory; storing attribute information of the image data in the memory; outputting the image data stored in the memory; receiving an instruction related to the attribute information; and outputting the attribute information corresponding to the received instruction before storing the image data corresponding to the attribute information in the memory is completed. US patent application No. 17577346 21. A non-transitory computer-readable storage medium storing a program for a computer applied to an image sensor incorporating a memory that stores image data obtained by imaging, the program causing the computer to execute a process comprising: controlling storage of the image data in the memory via a control circuit that is incorporated in the image sensor; generating and storing attribute information of the image data in the memory, via the control circuit; outputting the image data stored in the memory, via an output interface that is incorporated in the image sensor; receiving an instruction related to the attribute information; and outputting the attribute information corresponding to the received instruction, wherein at least a photoelectric conversion element and the memory are formed in one chip. Application No. 18899294 2. The image sensor according to claim 1, wherein the output interface outputs the attribute information at a timing of reception of the instruction by the reception interface. US patent application No. 17577346 2. The image sensor according to claim 1, wherein the output interface outputs the attribute information at a timing of reception of the instruction by the reception interface. The subject matter claimed in the instant application is fully disclosed in the US patent application17577346 since the instant application and the co-pending application are claiming common subject matter, as follows: The claimed invention in the instant application is fully disclosed in the co-pending patent application and it is broader than the claimed invention in the application (17577346). No new invention or new improvement is being claimed in the instant application. Applicant is now attempting to claim broadly that which had been previously described in more detail in the claims of the patent (In re Van Ornum, 214 USPQ 761 CCPA 1982). Furthermore, there is no apparent reason why Applicant was prevented from presenting claims corresponding to those of the instant application during prosecution of the application which matured into a patent. Allowable Subject Matter 2.Claims 10-12, 15 and 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 3.The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 4. Claim(s) 1-3, 7-9, 13, 16 and 19-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shintani et al. (US 20110060774) in view of Tsunai et al. (US 20150015760). Regarding claims 1, 20 and 21, Shintani discloses an image sensor including a memory that is incorporated in the imaging element and stores image data obtained by imaging (Paragraph: 0077 and fig.1, 14, 30, 52, 101: Shintani discusses how an image data file stored in the storage medium; and how system incorporated an image sensor and memory and processor or controller); a control circuit that is incorporated in the imaging element (Paragraph: 0052 and fig.1, 14), controls storage of the image data in the memory and stores attribute information of the image data in the memory (Paragraphs: 0077, 0188 and fig.1, 20, 22: Shintani discusses an image processor and memory controller (i.e. controls storage of the image data); and also discusses the file attribute of the image data file (i.e. attribute information of the image data) to manage on a table assured on a management area of the storage medium); an output interface that is incorporated in the imaging element and outputs the image data stored in the memory (Paragraphs: 0074, 0138, 0223 and fig.1, 104: Shintani discusses how an interface and connector I/F such as USB card (i.e. an output interface) used to manage image data and the associated management information to exchange with another computer other than the image processing apparatus); Shintani discloses the invention set forth above but does not specifically point out “a reception interface that receives an instruction related to the attribute information, wherein the output interface outputs the attribute information corresponding to the instruction received by the reception interface before storing the image data corresponding to the attribute information in the memory is completed” Tsunai however discloses a reception interface that receives an instruction related to the attribute information, wherein the output interface outputs the attribute information corresponding to the instruction received by the reception interface before storing the image data corresponding to the attribute information in the memory is completed (Paragraphs: 0053, 0059 and 0090: Tsunai discusses upon receiving image capturing preparation instructions from the user, the system determines the shutter speed (exposure time); and how the system performing single image acquisition control, upon receiving instruction signal (i.e. before storing the image data), and stores information in the timing memory as a pair with the corresponding block classification information). It would have been obvious to one of ordinary skill in the art at the time the invention was filed before the effective filing date of the invention to modify the invention of Shintani, and modify a system wherein a reception interface that receives an instruction related to the attribute information, wherein the output interface outputs the attribute information corresponding to the instruction received by the reception interface before storing the image data corresponding to the attribute information in the memory is completed, as taught by Tsunai, thus allowing to reduce defect pixel signals by connection unit redundancy, as discussed by Tsunai. Considering claim 2, Shintani discloses the image sensor according to claim 1, wherein the output interface outputs the attribute information at a timing of reception of the instruction by the reception interface (Paragraphs: 0053, 0055 and fig.1, 18: Shintani discusses how a timing generator supplying clocks and control signals to the image sensor; and how the timing generator controlled by a memory controller and system controller). Considering claim 3, Shintani discloses the image sensor according to claim 1, wherein the instruction is a frame synchronization signal from an outside (Paragraphs: 0083, 0086, 0091 and Claim.18: Tsunai discusses how the system updated in synchronization with imaging preparation instructions from a user). Considering claim 7, Shintani discloses the image sensor according to claim 1, wherein the attribute information is information including at least one of an address, an image size, an imaging time point, or an imaging condition (Paragraphs: 0058, 0067 and 0083: image size and image conditions). Considering claim 8, Shintani discloses the image sensor according to claim 1, wherein in a case where the image data is deleted from the memory along with subsequent imaging, the attribute information output from the output interface is information including deletion information indicating that the image data is deleted from the memory along with the subsequent imaging (Paragraphs: 0093, 0119 and fig.11: Shintani discusses processing for deleting the image data file read out from the storage medium). Considering claim 9, Shintani discloses the image sensor according to claim 8, wherein in a case where the image data is deleted from the memory, the control circuit deletes, from the memory, the attribute information related to deletion target image data that is the image data of a deletion target in the memory, and deletes the deletion target image data from the memory (Paragraphs: 0093, 0119 and fig.11: Shintani discusses processing for deleting the image data file read out from the storage medium). Considering claim 13, Shintani discloses the image sensor according to claim 1, wherein the instruction includes an output amount of the attribute information by the output interface, and the output interface outputs the attribute information in the output amount (Paragraphs: 0077, 0188 and fig.1, 20, 22: Shintani discusses an image processor and memory controller (i.e. controls storage of the image data); and also discusses the file attribute of the image data file (i.e. attribute information of the image data) to managed on a table assured on a management area of the storage medium). Considering claim 16, Shintani discloses the image sensor according to claim 1, wherein the output interface includes a first output interface and a second output interface, the first output interface outputs the image data, and the second output interface outputs the attribute information (Paragraphs: 0009, 0055 and fig.1, 24, 28, 32). Considering claim 19, Shintani discloses an imaging apparatus comprising: the image sensor according to claim 1; and a control device that performs at least one of a control for displaying an image based on the image data output by the output interface on a display or a control for storing the image data output by the output interface in a storage device (Paragraphs: 0056, 0058 and fig.1, 24, 26, 28: Shintani discusses an image display memory displayed on the image display unit via the image controller). 5.Claim(s) 4-6 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shintani et al. (US 20110060774) in view of Tsunai et al. (US 20150015760) and further in view of Tyomkin et al. (US 20120314900) Considering claim 4, Shintani in view of Tsunai discloses the invention set forth above but fail to disclose claim 4. Tyomkin however discloses the image sensor according to claim 4, wherein the output interface outputs the attribute information related to most recent image data among pieces of the image data stored in the memory (Paragraphs: 0074 and 0097: Tyomkin discusses how the system output the most recent image to the output interface). It would have been obvious to one of ordinary skill in the art at the time the invention was filed before the effective filing date of the invention to modify the invention of Shintani and Tsunai, and modify a system wherein the output interface outputs the attribute information related to most recent image data among pieces of the image data stored in the memory, as taught by Tyomkin, thus allowing to acquiring the subsequent image, at least partly based on the received instruction, as discussed by Tyomkin. Considering claim 5, Tyomkin discloses the imaging element according to claim 4, wherein the output interface outputs the attribute information related to the most recent image data at a timing of reception of the instruction by the reception interface (Paragraphs: 0005, 0074 and 0097: Tyomkin discusses how the system output the most recent image to the output interface; and how the system issue an instruction based on a result of the seeking for acquiring a subsequent real time image). Considering claim 6, Tyomkin discloses the imaging element according to claim 1, wherein the output interface is capable of outputting the attribute information of each of a plurality of pieces of the image data, and the attribute information is output in an imaging order by the output interface (Paragraphs: 0053, 0074 and 0097). Considering claim 14, Tyomkin discloses the imaging element according to claim 13, wherein the output amount is defined as the number of frames of the image data (Paragraphs: 0059 and 0107: Tyomkin discusses tracking a predetermined number of real time images). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YOSEF K LAEKEMARIAM whose telephone number is (571)270-5149. The examiner can normally be reached 9:30-6:30 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Duc Nguyen can be reached at (571) 272-7503. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. YOSEF K. LAEKEMARIAM Primary Examiner Art Unit 2651 /YOSEF K LAEKEMARIAM/Primary Examiner, Art Unit 2691
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Prosecution Timeline

Sep 27, 2024
Application Filed
Jul 02, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
96%
With Interview (+14.0%)
2y 8m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 977 resolved cases by this examiner. Grant probability derived from career allowance rate.

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