DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Rajagopalan et al. (US 2020/0080185).
Considering claims 1 and 11, Rajagopalan teaches metallic materials (abstract) used in microelectromechanical systems (MEMS) (Paragraph 28). The composite material comprises a substrate, a first material, a second material, and a metallic material in that order (Paragraph 31). The substrate may comprise a single crystal silicon wafer, etc. (Paragraph 30), and the first material may be a buffer material epitaxially grown thereon (Paragraph 32) and may be patterned (Paragraph 9) or a plurality of islands (Paragraph 47) (e.g. a seed layer), and the metallic material may be alloys of Ni, Ti, etc. (Paragraph 34) and may be single crystal (Paragraph 46).
While not expressly teaching a singular example of the claimed multilayer stack/MEMS device this would have been obvious to one of ordinary skill in the art before the effective filing date in view of the teachings of Rajagopalan as this is considered a combination of conventionally known layers of materials conventionally known to form MEMS devices and one would have had a reasonable expectation of success.
Considering claim 2, Rajagopalan teaches where the native oxide layer of the silicon substrate may be removed (Paragraph 38) and this is considered to teach where it is absent between the substrate and first material layer.
Considering claim 3, Rajagopalan teaches where the first material may be a buffer material epitaxially grown thereon (Paragraph 32) and where the metallic material may be epitaxially grown (Paragraph 46).
Considering claim 4, Rajagopalan does not specifically teach the claimed thickness. However, the courts have held that where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. See MPEP 2144.04(IV)(A) and Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984). It is the examiner’s position that there is no patentable distinction between the layered structure of Rajagopalan and that which is claimed.
Considering claims 5-7, Rajagopalan is silent regarding the claimed lattice mismatch. However, Rajagopalan teaches where the first material layer may be Fe, etc. (Paragraph 32) and where the metallic material may be an alloy of Ni, Ti, etc. (Paragraph 34) and where both materials are optionally epitaxial (Paragraphs 32 and 46). These materials are substantially identical to those which are claimed and disclosed by applicant as affording the claimed lattice mismatch and therefore the lattice mismatch features are expected to be present in Rajagopalan as a material and its properties are inseparable, absent an objective showing. See MPEP 2112.01.
Considering claim 8, Rajagopalan teaches first and second materials between the substrate and metallic material layer (Paragraph 31) which may be patterned (Paragraph 47) or a plurality of islands (Paragraph 47) (e.g. seed layers).
Considering claim 9, Rajagopalan teaches where the first material may be iron (Paragraph 32) and where the second material may be Cr (Paragraph 39).
Considering claim 10, Rajagopalan is silent regarding the claimed lattice mismatch. However, Rajagopalan teaches where the first material layer may be Fe, etc. (Paragraph 32), where the second material may be Cr (Paragraph 39), and where the metallic material may be an alloy of Ni, Ti, etc. (Paragraph 34) and where the materials are optionally epitaxial (Paragraphs 32 and 46). These materials are substantially identical to those which are claimed and disclosed by applicant as affording the claimed lattice mismatch and therefore the lattice mismatch features are expected to be present in Rajagopalan as a material and its properties are inseparable, absent an objective showing. See MPEP 2112.01.
Considering claim 12, Rajagopalan teaches where the first material may be a buffer material epitaxially grown thereon (Paragraph 32).
Considering claim 13, Rajagopalan teaches first and second materials between the substrate and metallic material layer (Paragraph 31) which may be patterned (Paragraph 47) (e.g. seed layers).
Considering claim 14, Rajagopalan teaches where the first material may be iron (Paragraph 32) and where the second material may be Cr (Paragraph 39).
Considering claim 15, Rajagopalan is silent regarding the claimed lattice mismatch. However, Rajagopalan teaches where the first material layer may be Fe, etc. (Paragraph 32), where the second material may be Cr (Paragraph 39), and where the metallic material may be an alloy of Ni, Ti, etc. (Paragraph 34) and where the materials are optionally epitaxial (Paragraphs 32 and 46). These materials are substantially identical to those which are claimed and disclosed by applicant as affording the claimed lattice mismatch and therefore the lattice mismatch features are expected to be present in Rajagopalan as a material and its properties are inseparable, absent an objective showing. See MPEP 2112.01.
Considering claim 16, Rajagopalan teaches where the native oxide layer of the silicon substrate may be removed (Paragraph 38) and this is considered to teach where it is absent between the substrate and first material layer.
Considering claim 17, Rajagopalan does not specifically teach the claimed thickness. However, the courts have held that where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. See MPEP 2144.04(IV)(A) and Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984). It is the examiner’s position that there is no patentable distinction between the layered structure of Rajagopalan and that which is claimed.
Considering claims 18-20, Rajagopalan is silent regarding the claimed lattice mismatch. However, Rajagopalan teaches where the first material layer may be Fe, etc. (Paragraph 32) and where the metallic material may be an alloy of Ni, Ti, etc. (Paragraph 34) and where both materials are optionally epitaxial (Paragraphs 32 and 46). These materials are substantially identical to those which are claimed and disclosed by applicant as affording the claimed lattice mismatch and therefore the lattice mismatch features are expected to be present in Rajagopalan as a material and its properties are inseparable, absent an objective showing. See MPEP 2112.01.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Johnson (US 7,540,899), Kim et al. (US 2015/0004432), and Brockmeier et al. (US 2018/0086630) teach NiTi alloys demonstrating the level of ordinary skill in the art.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SETH DUMBRIS whose telephone number is (571)272-5105. The examiner can normally be reached M-F 6:00 AM - 3:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Humera Sheikh can be reached at 571-272-0604. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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SETH DUMBRIS
Primary Examiner
Art Unit 1784
/SETH DUMBRIS/Primary Examiner, Art Unit 1784
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