DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Information Disclosure Statement
The information disclosure statements submitted on 09/30/2024 and 03/21/2025 have been considered and made of record by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Johnson et al. (hereinafter, referred to as Johnson) (US 2023/0063891).
As to claim 1, Johnson discloses a device comprising: a transmission circuit (see Fig. 2, block 60 and paragraph 0042) configured to transmit first data in at least one slice, among a plurality of slices in the transmission circuit (see paragraphs 0004, 0015, 0016, and 0042), in a first bandwidth (see the abstract and paragraphs 0001, 0021, and 0045); a reception circuit (see Fig. 2, block 66) configured to receive second data corresponding to the first data (e.g. the “slice configuration” information, see paragraphs 0021 and 0050-0051); and a controller (see Fig. 2, block 66) configured to determine a first number of slices, among the plurality of slices (see paragraphs 0016-0017, 0020-0021, 0045, 0048, 0050, and 0060), for the first bandwidth (see the abstract and paragraphs 0001, 0021, and 0045) based on the first data (see paragraphs 0004, 0015-0017, 0052, and 0060) and the second data (see paragraphs 0016, 0048, 0050, 0060, and claim 10). In the rejection of claim 1 no patentable weight is given to the limitations cited in the preamble of claim 1.
As to claim 2, Johnson discloses that the controller is further configured to determine a second number of slices, among the plurality of slices, for a second bandwidth greater than the first bandwidth, the second number of slices being equal to or greater than the first number of slices (see paragraphs 0020-0021 and 0060).
As to claim 3, Johnson discloses that the controller is further configured to determine a second number of slices, among the plurality of slices, for a second bandwidth smaller than the first bandwidth, the second number of slices being equal to or lesser than the first number of slices (see paragraphs 0020-0021 and 0060).
Allowable Subject Matter
Claims 13-18 are allowed. The following is a statement of reasons for the indication of allowable subject matter: As to claim 13, a comprehensive search of prior art of record failed to show either alone or in combination a transmitting device comprising: a first transmission gate configured to: receive a first signal, and output the first signal to a first node based on a selection signal of a first level; a first N-channel MOSFET (NMOS) transistor comprising: a drain connected to the first node, a gate through which an inversion signal of the selection signal is input, and a source that is grounded; a first inverter configured to output a second signal by inverting a signal input through the first node; a first P-channel MOSFET (PMOS) transistor comprising: a source through which a first driving voltage is input, and a gate through which the second signal is input, the first PMOS transistor configured to be turned on based on the second signal of a second level to transmit data to a receiving device; a second transmission gate configured to: receive the first signal, and output the first signal to a second node based on a selection signal of the first level; a second PMOS transistor comprising: a drain connected to the second node, a gate through which the selection signal is input, and a source through which a second driving voltage is input; a second inverter configured to output a third signal by inverting a signal input through the second node; and a second NMOS transistor comprising: a source that is ground, and a gate through which the third signal is input, the second NMOS transistor configured to be turned on based on the third signal of the first level to transmit the data to the receiving device.
Claims 19-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: As to claim 19, a comprehensive search of prior art of record failed to show either alone or in combination a transmission training method comprising: transmitting first data to a receiver by using at least one slice, among a plurality of slices, in a first bandwidth; receiving second data corresponding to the first data from the receiver; storing the first bandwidth and a number of slices used for transmission of the first data, based on a verification of the second data being successful; and increasing the number of slices used for transmission of the first data, based on the verification of the second data being unsuccessful.
Claims 4-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEILA MALEK whose telephone number is (571)272-8731. The examiner can normally be reached Monday-Friday 8:30am-4:30pm.
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LEILA . MALEK
Examiner
Art Unit 2632
/LEILA MALEK/Primary Examiner, Art Unit 2632
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