DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action is in response to applicant’s communication filed August 19, 2026. The applicant’s remarks and amendment to the specification and/or claims were considered with the results that follow.
Claims 1, 2, and 4-21 have been presented for examination in this application. In response to the Examiner’s action of December 23, 2025, claims 1, 5, 11, 15, and 21 are amended.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 4-8, 10-18, and 20-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koszewnik (US# 2018/0143786) in view of Mariappan et al. (US# 2021/0409413).
Regarding claim 1, Koszewnik teaches obtaining processing request data; obtaining processing request data… [0070, line 3: value]; obtaining a memory operation instruction [0070, lines 1-3]; forming a global memory pool between a second storage medium (130) of the computing node (140+120+130) and a first storage medium (170 or 160) of a storage node (150 + external storage) that is external to the computing node and that is communicatively coupled to the computing node via a network [Poolable Arrays (130) and Slabs (170) (Fig. 1) and external memory (0022, lines 1-8)]; and performing, independently of data conversion between the first storage medium and the second storage medium [although not explicitly recited, one of ordinary skill in the art would recognize that moving data from an external storage space such as disk or flash drive to an internal RAM storage space requires both address and data storage conversion due to the qualities of the different types of storage media], a memory operation of the processing request data on the global memory pool based on a memory the memory operation instruction [0070, application->request->RMW; see also 0042 & 0045].
What Koszewnik fails to clearly teach is that the request data comprises, or further comprises, data comprising a user requirement related to a storage medium characteristic. Mariappan et al. teaches using user authentication to access specific partitions in a storage device [0023; see also 0047 and 0048 for further teachings on shared and private access to the storage device as well as storage are restriction and encryption]. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Koszewnik to include the user authentication for private and shared access to a data storage device as taught by Mariappan al., because then data security in the form of required authentication could be implemented [0021, lines 6-17].
Regarding claim 2, Koszewnik teaches wherein the memory operation instruction comprises at least one of memory allocation, memory setting, memory copying [read-modify-write, 0042], memory movement, memory release, or memory comparison.
Regarding claim 4, Koszewnik teaches reading to-be-processed data from the global memory pool; and pool; processing the to-be-processed data based on the processing request data by executing the memory operation instruction to obtain processed data, and writing the processed data into storage space indicated by a first address in the global memory pool [0042, read-modify-write operation; 0045, 0070].
Regarding claim 5, Koszewnik teaches determining, based on the user requirement (operation
and authentication) and the storage medium characteristic (storage space), to write the processed data into the storage space and wherein the storage medium characteristic comprises a writing latency, a read latency, an available storage capacity [address & offset for storage also based on available addresses associated with storage device, 0079, lines 7-9; see also 0034, lines 4-8], an access speed, central processing unit (CPU) consumption, an energy consumption ratio, or a reliability.
Regarding claim 6, Koszewnik teaches wherein the storage space is in the first storage medium or the second storage medium [0034, lines 1-4; Fig. 1; 0022].
Regarding claim 7, Koszewnik teaches wherein after the writing the processed data into the storage space, the method further comprises reading the processed data from the global memory pool based on the first address [another RMW operation performed again on same address as previously for claim 1; 0070, 0042, 0045].
Regarding claim 8, Koszewnik teaches writing the processed data into the storage node [writing as part of RMW operation of claim 1].
Regarding claim 10, Koszewnik teaches performing a memory operation on data between the global memory pool and the storage node based on a characteristic of cold/hot data and the memory operation instruction [0096; changing referencing of slab and memory pool].
Claim 11 recites similar claim language to that of claim 1, and is rejected for the same reasons as claim 1.
Claim 12 recites similar claim language to that of claim 2, and is rejected for the same reasons as claim 2.
Regarding claim 13, Koszewnik teaches wherein the first storage medium of the second storage medium comprises a memory [0030], a memory server or a storge-class memory (SCM).
Claim 14 recites similar claim language to that of claim 4, and is rejected for the same reasons as claim 4.
Claim 15 recites similar claim language to that of claim 5, and is rejected for the same reasons as claim 5.
Regarding claim 16, Koszewnik teaches wherein the storage space is in the first storage medium or the second storage medium [0034, lines 1-4; Fig. ].
Claim 17 recites similar claim language to that of claim 7, and is rejected for the same reasons as claim 7.
Claim 18 recites similar claim language to that of claim 8, and is rejected for the same reasons as claim 8.
Claim 20 recites similar claim language to that of claim 10, and is rejected for the same reasons as claim 10.
Claim 21 recites similar claim language to that of claim 1, and is rejected for the same reasons as claim 1.
Regarding claim 22, Koszewnik teaches wherein the storage medium characteristic further comprises a total storage capacity [address & offset for storage based on total capacity, 0079, lines 7-9]
Regarding claim 23, Koszewnik teaches further comprising further forming the global memory pool through unified addressing [data stored in RAMs and external memories must be accessible to be used, and are thus part of a “unified” totality of addressable areas (0022), like that of Applicant’s example of unified addressing in paragraph 0057, lines 7-8].
Claim(s) 9 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koszewnik (US# 2018/0143786) and Mariappan et al. (US# 2021/0409413) In view of OFFICIAL NOTICE.
Regarding claims 9 and 19, Koszewnik (and Mariappan et al.) teach data operations and moving data in memory [0023] but fails to teach prefetching data from the storage node based on the memory operation instruction, and storing the data in the global memory pool. One of ordinary skill in the art would recognize that prefetching is incorporating when data potentially relativistic data is loaded into memory before being specifically called upon, which leads to quicker access to said data when a corresponding operation calling for said data occurs. The Examiner takes OFFICIAL NOTICE of this teaching. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Koszewnik and Mariappan et al. to include data prefetching because of the benefit disclosed supra.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 2, and 4-23 have been considered but are moot in view of the new grounds of rejection.
Regarding Applicant’s argument that the Koszewnik reference fails to clearly teach the “user requirement related to a storage medium characteristic”, the Examiner agrees. A secondary reference, Mariappan et al., has been included to teach the newly amended language.
Regarding Applicant’s argument on pages 10-11 of the response that Koszewnik fails to teach the performing step of at least claim 1, the Examiner respectfully disagrees. As noted above, the prior art of Koszewnik teaches all claim elements as recited. Koszewnik teaches in at least paragraphs 0022 and 0104 that external memories may be added to supplement the RAM 116. Furthermore, the claim language does not recite what may or may not be comprised in the compute node or storage node other than the second storage medium and first storage medium in their respective nodes. The Examiner has indicated above the components that at least are comprised within a broad and reasonable interpretation of the compute node and storage node, where the storage node also includes the external memory of paragraph 0022. Furthermore, the language of claim 1 also fails to recite what “data conversion” between the first and second storage medium actually comprises, such as what types of data, which data (address, read data, data to be written, etc.), and what type or types of conversion (LBA->PBA, PBA->LBA, logical/physical, data block splitting for storage device storage, etc.). Thus performing a “memory operation” independent of a broadly recited “data conversion” allows for at least the teaching disclosed supra. As noted above, in light of a broad and reasonable interpretation of the claim language as written but not detailed, the combination of Koszewnik and Mariappan et al. teach the claim language as recited.
Regarding the argument of pages 11-12, regarding claim 23, the Examiner respectfully disagrees. As taught by Koszewnik, the storage may include any number of memories and types of memories, each of which require their own addressing system, as part of the memory pool system.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chng teaches storage partitioning support for multiple host devices to a storage device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Brian R. Peugh whose telephone number is (571) 272-4199. The examiner can normally be reached on Monday-Friday from 7:30am to 3:30pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Rocio Del Mar Perez-Velez, phone number 571-270-5935, can be reached. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306.
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/BRIAN R PEUGH/ Primary Examiner, Art Unit 2133
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