DETAILED ACTION
This Office Action is in response to the application 18/902,122 filed on September 30th, 2024.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1-20 are pending and herein considered.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS), submitted on 09/30/2024, is in compliance with the provisions of 37 CRR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 14 and 20 are rejected on the ground of nonstatutory double patenting over claims 1, 10 and 18 of Patented Number 12,095,788 since the claim, if allowed, would improperly extend the “right to exclude” already granted in the patent.
The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter.
Instant Application 18/902,122
U.S. Patent No. 12,095,788
Claim 1:
A memory system comprising:
a plurality of memory components;
an encryption key generator comprising:
a random number generator configured to generate a first random number as a salt, and to generate a second random number as a data encryption key
(DEK) to encrypt data in the plurality of memory components;
an encryption block configured to generate a key encryption key (KEK) by using a first encryption algorithm, the salt, and a password received from a host device, wherein generating the KEK comprises concatenating the salt onto the password; and
a wrapping block configured to generate a wrapped DEK by wrapping the DEK using a second encryption algorithm and the KEK; and
a memory controller configured to transition the memory system to and from a secure state using the wrapped DEK, the secure state determining access to the data in the plurality of memory components by the host device, wherein the secure state is selected from a plurality of states, wherein the plurality of states comprises a secure locked state that makes the data in the plurality of memory components inaccessible, and wherein transitioning the memory system to and from the secure state using the wrapped DEK comprises:
unwrapping the wrapped DEK using the second encryption algorithm as an unwrapped version of the wrapped DEK; and
transitioning from the secure locked state to a secure unlocked state using the unwrapped version of the wrapped DEK.
Claim 14:
A method comprising:
receiving, from a host device, a password;
causing, by a memory controller of a memory system, a random number generator to generate a first random number as a salt;
causing, by the memory controller, the random number generator to generate a second random number as a data encryption key (DEK) to encrypt data in a plurality of memory components of the memory system;
causing, by the memory controller, an encryption block to generate a key encryption key (KEK) by using a first encryption algorithm, the salt, and the password from the host device, wherein generating the KEK comprises concatenating the salt onto the password;
causing, by the memory controller, a wrapping block to generate a wrapped DEK by wrapping the DEK using a second encryption algorithm and the KEK; and
causing, by the memory controller, the memory system to transition to and from a secure state using the wrapped DEK, the secure state determining access to the data in the plurality of memory components by the host device, wherein the secure state is selected from a plurality of states, wherein the plurality of states comprises a secure locked state that makes the data in the plurality of memory components inaccessible, and wherein transitioning the memory system to and from the secure state using the wrapped DEK comprises:
unwrapping the wrapped DEK using the second encryption algorithm as an unwrapped version of the wrapped DEK; and
transitioning from the secure locked state to a secure unlocked state using the unwrapped version of the wrapped DEK.
Claim 20:
A non-volatile dual in-line memory module comprising:
a plurality of memory components comprising volatile and non-volatile memory components;
an encryption key generator comprising:
a random number generator configured to generate a first random number as a salt, and to generate a second random number as a data encryption key (DEK) to encrypt data in the plurality of memory components;
an encryption block configured to generate a key encryption key (KEK) by using a first encryption algorithm, the salt, and a password received from a host device, wherein generating the KEK comprises concatenating the salt onto the password; and
a wrapping block configured to generate a wrapped DEK by wrapping the DEK using a second encryption algorithm and the KEK; and
a memory controller configured to transition the non-volatile dual in-line memory module to and from a secure state using the wrapped DEK, the secure state determining access to the data in the plurality of memory components by the host device, wherein the secure state is selected from a plurality of states, wherein the plurality of states comprises a secure locked state that makes the data in the plurality of memory components inaccessible, and wherein transitioning the non-volatile dual in-line memory module to and from the secure state using the wrapped DEK comprises:
unwrapping the wrapped DEK using the second encryption algorithm as an unwrapped version of the wrapped DEK; and
transitioning from the secure locked state to a secure unlocked state using the unwrapped version of the wrapped DEK.
Claim 1:
A memory system comprising:
a plurality of memory components;
an encryption key generator comprising:
a random number generator configured to generate a first random number as a salt, and to generate a second random number as a media encryption key to encrypt data in the plurality of memory components;
an encryption block configured to generate a media key encrypted key by using a first encryption algorithm, the salt, and an access key received from a host device, wherein generating the media key encrypted key comprises concatenating the salt onto the access key; and
a wrapping block configured to generate an encrypted media encryption key by wrapping the media encryption key using a second encryption algorithm and the media key encrypted key; and
a processing device configured to transition the memory system to and from a secure state using the encrypted media encryption key, the secure state determining access to the data in the plurality of memory components by the host device, wherein the secure state is selected from a plurality of states, wherein the plurality of states comprises a secure locked state that makes the data in the plurality of memory components inaccessible, and wherein transitioning the memory system to and from the secure state using the encrypted media encryption key comprises:
unwrapping the encrypted media encryption key using the second encryption algorithm; and
transitioning from the secure locked state to a secure unlocked state using the unwrapped encrypted media encryption key.
Claim 10:
A method comprising:
receiving, from a host device, an access key;
causing, by a processing device of a memory system, a random number generator to generate a first random number as a salt;
causing, by the processing device, the random number generator to generate a second random number as a media encryption key to encrypt data in a plurality of memory components of the memory system;
causing, by the processing device, an encryption block to generate a media key encrypted key by using a first encryption algorithm, the salt, and the access key from the host device, wherein generating the media key encrypted key comprises concatenating the salt onto the access key;
causing, by the processing device, a wrapping block to generate an encrypted media encryption key by wrapping the media encryption key using a second encryption algorithm and the media key encrypted key; and
causing, by the processing device, the memory system to transition to and from a secure state using the encrypted media encryption key, the secure state determining access to the data in the plurality of memory components by the host device, wherein the secure state is selected from a plurality of states, wherein the plurality of states comprises a secure locked state that makes the data in the plurality of memory components inaccessible, and wherein transitioning the memory system to and from the secure state using the encrypted media encryption key comprises:
unwrapping the wrapped erase key using the second encryption algorithm; and
transitioning from the secure locked state to a secure unlocked state using the erase key from the unwrapping of the wrapped erase key.
Claim 18:
A non-volatile dual in-line memory module comprising:
a plurality of volatile memory components;
a first non-volatile memory in which to dump contents of the plurality of volatile memory components upon detection of a power failure;
an encryption key generator comprising:
a random number generator configured to generate a first random number as a salt, and to generate a second random number as a media encryption key to encrypt data in a plurality of memory components;
an encryption block configured to generate a media key encrypted key by using a first encryption algorithm, the salt, and an access key received from a host device, wherein generating the media key encrypted key comprises concatenating the salt onto the access key; and
a wrapping block configured to generate an encrypted media encryption key by wrapping the media encryption key using a second encryption algorithm and the media key encrypted key;
a second non-volatile memory configured to store the encrypted media encryption key; and
a processing device configured to transition the non-volatile dual in-line memory module to and from a secure state using the encrypted media encryption key, the secure state determining access to the data in the plurality of memory components by the host device, wherein the secure state is selected from a plurality of states, wherein the plurality of states comprises a secure locked state that makes the data in the plurality of volatile memory components inaccessible, and wherein transitioning the memory system to and from the secure state using the encrypted media encryption key comprises:
unwrapping the wrapped erase key using the second encryption algorithm; and
transitioning from the secure locked state to a secure unlocked state using the erase key from the unwrapping of the wrapped erase key.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHOI V LE whose telephone number is (571)270-5087. The examiner can normally be reached 9:00 AM - 5:00 PM EST.
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/KHOI V LE/
Primary Examiner, Art Unit 2436