Prosecution Insights
Last updated: October 02, 2026
Application No. 18/904,494

Contact Hole Assembly and Electronic Device

Non-Final OA §103
Filed
Oct 02, 2024
Priority
Oct 04, 2023 — RE 10-2023-0131384
Examiner
NG, SHERMAN
Art Unit
Tech Center
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
410 granted / 541 resolved
+15.8% vs TC avg
Strong +17% interview lift
Without
With
+16.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
4 currently pending
Career history
543
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
60.9%
+20.9% vs TC avg
§102
31.3%
-8.7% vs TC avg
§112
4.1%
-35.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 541 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). The certified copy has been filed in present Application No. 18/904,494 filed on 10/02/2024. Claim Objections Claim 16 is objected to because of the following informalities: Claim 16 recites “…a third insulation layer on the second insulation layer such that the second insulation layer is between the first metal layer and the second insulation layer”. It should be the second insulation layer that is between the first metal layer and the third insulation layer. Therefore, the examiner will amend and examine claim 16 as follows: Claim 16 (Currently Amended) The electronic device of claim 11, further comprising: a second insulation layer; and a third insulation layer on the second insulation layer such that the second insulation layer is between the first metal layer and the third insulation layer. Appropriate correction is required. Allowable Subject Matter Claims 4-7, 10, 15-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 8, 9, 11, 13, 14 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2023/0319999). Regarding claim 1, Matsumoto discloses a contact hole assembly (in Fig. 2A), comprising: a first metal layer [lower 11]; an insulation layer [21] on the first metal layer [lower 11]; a second metal layer [upper 11] on the insulation layer [21] such that the insulation layer [21] is between the first metal layer [lower 11] and the second metal layer [upper 11]; and a contact hole [12 and 23] that electrically connects the first metal layer [lower 11] and the second metal layer [upper 11], the contact hole [12 and 23; collectively] including: a via area [23] that penetrates through a thickness of the insulation layer [21]; a conductor [12] in the via area [23]; and a recess area [The concave portions of the conductor portions 122a] in the conductor [12], where a portion [122a] of a surface of the conductor [12] is indented in a direction away from the via area [23]. Matsumoto does not disclose the first metal layer receiving an electrical signal and the second metal layer outputting the electrical signal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the contact hole assembly of Matsumoto to have the first metal layer receiving an electrical signal and the second metal layer outputting the electrical signal, in order to transmit the electrical signal between the first metal layer and the second metal layer in the contact hole assembly. Regarding claim 2, Matsumoto, as applied to claim 1, further discloses (in Fig. 2A) wherein the conductor [12] includes an inner surface [122] and outer surface [121] that has a diameter that is greater than a diameter of the inner surface [122], and the recess area [The concave portions of the conductor portions 122a] is disposed along the inner surface [122] of the conductor [12]. Regarding claim 3, Matsumoto, as applied to claim 2, further discloses (in Fig. 2A) wherein a diameter of the recess area [The concave portions of the conductor portions 122a] is greater than the diameter of the inner surface [122] of the conductor [12] and less than the diameter of the outer surface [121] of the conductor [12]. Regarding claim 8, Matsumoto discloses a contact hole assembly (in Fig. 2A), comprising: a first metal layer [lower 11]; an insulation layer [21] on the first metal layer [lower 11]; a second metal layer [upper 11] on the insulation layer [21] such that the insulation layer [21] is between the first metal layer [lower 11] and the second metal layer [upper 11]; and a contact hole [12 and 23; collectively] through the insulation layer [21], the contact hole [12 and 23; collectively] electrically connecting the first metal layer [lower 11] and the second metal layer [upper 11], wherein the contact hole [12 and 23; collectively] includes a conductor [12] that is connected to the first metal layer [lower 11] and the second metal layer [upper 11] and extends from the second metal layer [upper 11] to the first metal layer [lower 11] (Note that the conductor 12 does extend from the second metal layer [upper 11] to at least the first metal layer [lower 11] and beyond) whereas the contact hole [12 and 23; collectively] extends from the second metal layer [upper 11] past the first metal layer [lower 11]. Matsumoto does not disclose the first metal layer receiving an electrical signal and the second metal layer outputting the electrical signal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the contact hole assembly of Matsumoto to have the first metal layer receiving an electrical signal and the second metal layer outputting the electrical signal, in order to transmit the electrical signal between the first metal layer and the second metal layer in the contact hole assembly. Regarding claim 9, Matsumoto, as applied to claim 8, further discloses (in Fig. 2A) wherein the contact hole [12 and 23; collectively] includes: a via area [23] through an entire thickness of the insulation layer [21], the conductor [12] in the via area [23]; and a recess area [The concave portions of the conductor portions 122a] in the conductor [12], where a portion [122a] of a surface of the conductor [12] is indented in a direction away from the via area [23]. Regarding claim 11, Matsumoto discloses an electronic device (in Fig. 2A), comprising: a first metal layer [lower 11]; a first insulation layer [21] on the first metal layer [lower 11]; a second metal layer [upper 11] on the first insulation layer [21] such that the first insulation layer [21] is between the first metal layer [lower 11] and the second metal layer [upper 11]; and a contact hole [12 and 23; collectively] that electrically connects the first metal layer [lower 11] and the second metal layer [upper 11], the contact hole [12 and 23; collectively] including: a via area [23] that penetrates through a thickness of the first insulation layer [21]; a conductor [12] in the via area [23]; and a recess area [The concave portions of the conductor portions 122a] that extends from an inner surface [122] of the conductor [12] toward an outer surface [121] of the conductor [12], wherein a width of a portion [122a] of the conductor [12] having the recess area [The concave portions of the conductor portions 122a] is less than a width of a portion [122a] of the conductor [122] that lacks the recess area [The concave portions of the conductor portions 122a] (Note that the width of the conductor portion 122a having the recess area (concave portion) is smaller than the width of the conductor portion 122a having the protrusion area (convex portion)). Matsumoto does not disclose the first metal layer receiving an electrical signal and the second metal layer outputting the electrical signal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the contact hole assembly of Matsumoto to have the first metal layer receiving an electrical signal and the second metal layer outputting the electrical signal, in order to transmit the electrical signal between the first metal layer and the second metal layer in the electronic device. Regarding claim 13, Matsumoto, as applied to claim 11, further discloses (in Fig. 2A) wherein the conductor [12] includes an inner surface [122] and outer surface [121] that has a diameter that is greater than a diameter of the inner surface [122], and the recess area [The concave portions of the conductor portions 122a] is disposed along the inner surface [122] of the conductor [12]. Regarding claim 14, Matsumoto, as applied to claim 13, further discloses (in Fig. 2A) wherein a diameter of the recess area [The concave portions of the conductor portions 122a] is greater than the diameter of the inner surface [122] of the conductor [12] and less than the diameter of the outer surface [121] of the conductor [12]. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2023/0319999) in view of Park et al. (US 2020/0160781). Regarding claim 12, Matsumoto, as applied to claim 11, further discloses (in Fig. 1) a printed circuit board [1] (See paragraph 0018) that includes the first metal layer [lower 11], the first insulation layer [21], the second metal layer [lower 11], and the contact hole [12 and 23; collectively]. Matsumoto does not disclose a display panel including a plurality of subpixels that display an image, the display panel connected to the printed circuit board. Park teaches (in Fig. 2 and paragraph 0111) a display panel [110] including a plurality of subpixels [SP] that display an image, the display panel [110] connected to the printed circuit board [SPCB]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electronic device of Matsumoto to have a display panel including a plurality of subpixels that display an image, the display panel connected to the printed circuit board, as taught by Park, in order to provide a display panel that communicates with the printed circuit board. Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHERMAN NG whose telephone number is (571)270-3131. The examiner can normally be reached Mon-Fri 10AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at 5712722342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHERMAN NG/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Oct 02, 2024
Application Filed
Aug 06, 2026
Examiner Interview (Telephonic)
Aug 11, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12749879
Utility Pole with Internal Electromagnetic Shielding
2y 4m to grant Granted Sep 29, 2026
Patent 12749595
WIRE HARNESS
2y 0m to grant Granted Sep 29, 2026
Patent 12739966
SHIELDING STRUCTURE AND CIRCUIT BOARD
2y 9m to grant Granted Sep 15, 2026
Patent 12723150
RESIN COMPOSITION AND POWER CABLE
3y 3m to grant Granted Sep 01, 2026
Patent 12727106
SUPPORT SPLINE FOR TRAY AND METHODS FOR MAKING AND INSTALLING SAME
2y 6m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
92%
With Interview (+16.6%)
2y 4m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 541 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month