DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-5, 7, 9, 11, 12, and 14-18 are rejected under 35 U.S.C. 103 as being unpatentable over Yamamoto (US Pat. App. Pub. No. 2003/0011962) in view of Lee et al. (US Pat. App. Pub. No. 20220208470).
With respect to claim 1, Yamamoto teaches a multilayer ceramic capacitor (see abstract) comprising: a multilayer body including a plurality of dielectric layers laminated in a lamination direction and each having an internal electrode disposed thereon (see FIG. 1, elements 1 and 2/3, and paragraph [0047]), the multilayer body including two main surfaces respectively provided on both sides in the lamination direction, two lateral surfaces respectively provided on both sides in a width direction intersecting with the lamination direction, and two end surfaces respectively provided on both sides in a length direction intersecting with the lamination direction and the width direction (see FIGS. 1A-3); end-surface external electrodes respectively provided on the end surfaces of the multilayer body (see FIGS. 1A/1B, elements 5a/5b and paragraph [0047]); and lateral-surface external electrodes respectively provided on the lateral surfaces of the multilayer body (see FIGS. 1A and 1B, elements 6 and paragraph [0047]); the internal electrode including end-surface-exposure internal electrodes exposed at the end surfaces (see FIG. 2A, element 2 and paragraph [0047]), and lateral-surfaces-exposure internal electrodes exposed at the lateral surfaces (see FIG. 1B, element 3 and paragraph [0047]), each of the end-surface-exposure internal electrodes including a counter portion and a lead-out portion that extends from the counter portion (see FIG. 1A, elements 2 and 2a/2b, with 2a/2b being the lead-out portions and the remainder of elements 2 being the counter portions; see paragraph [0047]), each of the lateral-surface-exposure internal electrodes including a counter portion and a lead-out portion that extends from the counter portion (see FIG. 1B, elements 3 and 3a/3b, with 3a/3b being the lead-out portions and the remainder of elements 3 being the counter portions; see paragraph [0047]), the counter portion of the end-surface-exposure internal electrode and the counter portion of the lateral-surface-exposure internal electrode being opposed to each other (see FIGS. 1A and 1B; see also paragraph [0047]); the dielectric layers including first dielectric layers each including the end-surface-exposure internal electrode thereon, and second dielectric layers each including the lateral-surface-exposure internal electrode thereon, the first dielectric layers and the second dielectric layers being alternately laminated with each other (see FIGS. 1A and 1B); wherein at least one of each first dielectric layer or each second dielectric layer includes an auxiliary internal electrode on a portion adjacent to at least one of the lateral surface or the end surface at which the internal electrode on the at least one of each first dielectric layer or each second dielectric layer is not exposed (see FIGS. 2A/2B, elements 12a/12b, and 13a/13b and paragraph [0048]); the auxiliary internal electrode is spaced apart from the internal electrode on the at least one of each first dielectric layer or each second dielectric layer, is exposed at the at least one of the lateral surface or the end surface, and is opposed to the lead-out portion of the internal electrode that is different from and adjacent in the lamination direction to the internal electrode on the at least one of each first dielectric layer or each second dielectric layer (see FIGS. 2A/2B, elements 12a/12b, and 13a/13b and paragraph [0048]; see also, FIGS. 1A and 1B).
Yamamoto fails to teach that the auxiliary internal electrode includes a through hole which penetrates through the auxiliary internal electrode in the lamination direction and in which a same dielectric as that of the dielectric layers is provided, and the dielectric in the through hole establishes connection between the dielectric layers that are in contact with the auxiliary internal electrode and that are respectively located toward the two main surfaces.
Lee, on the other hand, teaches that it is well-known for internal electrodes in an area outside the counter portions to include through holes with dielectric filling the same holes for the purposes of connecting the dielectric layers. See FIGS. 3A/3B, elements 123a/123b/124a/124b, and paragraphs [0055], [0058], and [0060]. Such an arrangement results in crack suppression. See paragraphs [0007] and [0079].
Accordingly, it would have been obvious to one of ordinary skill in the art, at the time of the effective filing date of the invention, to modify Yamamoto, as taught by Lee, to provide dielectric-filled through holes in the auxiliary electrodes to suppress cracking in the multilayer ceramic capacitor.
With respect to claim 2, the combined teachings of Yamamoto and Lee teach that the auxiliary internal electrode is provided on each first dielectric layer. See Yamamoto, FIG. 2A.
With respect to claim 3, the combined teachings of Yamamoto and Lee teach that the auxiliary internal electrode is provided on each second dielectric layer. See Yamamoto, FIG. 2B.
With respect to claim 4, the combined teachings of Yamamoto and Lee teach that, in a case where the auxiliary internal electrode is divided, with respect to a center in a direction from the at least one of the lateral surface or the end surface at which the auxiliary internal electrode is exposed to the internal electrode, into a near-lateral-surface region that is at or adjacent to the lateral surface and a near-center region that is at or adjacent to the internal electrode, the through hole is in the near-center region. See Lee, FIGS. 3A/3B, noting that the through holes are provided throughout the area where the through holes are disposed, including at the near-center region.
With respect to claim 5, the combined teachings of Yamamoto and Lee teach that a dimension in a direction parallel to the width direction or the length direction and from the at least one of the lateral surface or the end surface at which the auxiliary internal electrode is exposed to an edge of the internal electrode at or adjacent to the at least one of the lateral surface or the end surface is defined as D, a dimension of the auxiliary internal electrode in the direction parallel to the width direction or the length direction and from the at least one of the lateral surface or the end surface toward the internal electrode is defined as d; and a relationship expressed as D/5 < d < 4D/5 is satisfied. See Yamamoto, FIG. 2A and paragraphs [0060]-[0062], where D=C+G1=.2mm+.1mm=.3mm and d=C=.2mm, such that .3/5<.2<4(.3)/5 = .06<.2<.24.
With respect to claim 7, the combined teachings of Yamamoto and Lee teach that the multilayer ceramic capacitor has a three terminal structure. See Yamamoto, abstract.
With respect to claim 9, the combined teachings of Yamamoto and Lee teach that each of the end surface external electrodes and the lateral surface external electrodes includes a base electrode layer and a plated layer. See Lee, paragraph [0085], noting that the external electrodes having a base layer and plating layer.
With respect to claim 11, the combined teachings of Yamamoto and Lee teach that a plurality of the through hole is provided in each of the auxiliary internal electrodes. See Lee, FIGS. 3A/3B, elements 123a/123b/124a/124b, and paragraphs [0055], [0058], and [0060].
With respect to claim 12, the combined teachings of Yamamoto and Lee teach that the same dielectric as that of the dielectric layers is provided in each of the plurality of the through hole. See Lee, paragraph [0060].
With respect to claim 14, the combined teachings of Yamamoto and Lee teach that the auxiliary internal electrode is a lateral-surface-exposure auxiliary internal electrode. See Yamamoto, FIG. 2A.
With respect to claim 15, the combined teachings of Yamamoto and Lee teach that a dimension in a direction parallel to the width direction or the length direction and from the at least one of the lateral surface or the end surface at which the auxiliary internal electrode is exposed to an edge of the internal electrode at or adjacent to the at least one of the lateral surface or the end surface is defined as D, a dimension of the auxiliary internal electrode in the direction parallel to the width direction or the length direction and from the at least one of the lateral surface or the end surface toward the internal electrode is defined as d; and a relationship expressed as D/5 < d < 4D/5 is satisfied. See Yamamoto, FIG. 2A and paragraphs [0060]-[0062], where D=C+G1=.2mm+.1mm=.3mm and d=C=.2mm, such that .3/5<.2<4(.3)/5 = .06<.2<.24.
With respect to claim 16, the combined teachings of Yamamoto and Lee teach that the auxiliary internal electrode is an end-surface-exposure auxiliary internal electrode. See Yamamoto, FIG. 2B.
With respect to claim 17, the combined teachings of Yamamoto and Lee fail to explicitly teach that a dimension in a direction parallel to the width direction or the length direction and from the at least one of the lateral surface or the end surface at which the auxiliary internal electrode is exposed to an edge of the internal electrode at or adjacent to the at least one of the lateral surface or the end surface is defined as D, a dimension of the auxiliary internal electrode in the direction parallel to the width direction or the length direction and from the at least one of the lateral surface or the end surface toward the internal electrode is defined as d; and a relationship expressed as D/5 < d < 4D/5 is satisfied. Rather, Yamamoto, at FIG. 2B and paragraphs [0060]-[0062], recites an embodiment where D=F+G2=.6mm+.1mm=.7mm and d=C=.6mm, such that .7/5<.6<4(.7)/5 = .14<.6<.56. However, Yamamoto also notes that these dimensions are merely a preferred embodiment, and other dimensions are workable, so long as the gap between the internal electrode and the coplanar auxiliary electrode is sufficiently sized such that there are no effects of bleeding at the time of forming the internal electrodes. Accordingly, Yamamoto clearly identifies both the sizing of the auxiliary electrode and the spacing of the internal electrode from the end surface as result-oriented variables. Accordingly, it would have been obvious to one of ordinary skill in the art to determine the optimum or workable ranges for the sizing and spacing of these result-oriented variables. See MPEP 2144.05(II)(A and B), citing In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) and In re Stepan, 868 F.3d 1342, 1346, 123 USPQ2d 1838, 1841 (Fed. Cir. 2017).
With respect to claim 18, the combined teachings of Yamamoto and Lee teach that the auxiliary internal electrode includes an end-surface-exposure auxiliary internal electrode and a lateral-surface-exposure auxiliary internal electrode. See Yamamoto, FIGS. 1A-2B.
Claims 8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Yamamoto (US Pat. App. Pub. No. 2003/0011962) in view of Lee et al. (US Pat. App. Pub. No. 20220208470), and further, in view of KR 10-2015-0050421.
With respect to claim 8, the combined teachings of Yamamoto and Lee fail to explicitly teach that the multilayer body includes rounded corners and ridges.
KR ‘421, on the other hand, teaches that the multilayer body is barrel polished to produce rounded corners and ridges. See paragraph [0080]. Such a modification is well-known as part of a process for forming a ceramic capacitor body.
Accordingly, it would have been obvious to one of ordinary skill in the art, at the time of the effective filing date of the invention, to modify the combined teachings of Yamamoto and Lee, as taught by KR ‘421, as part of a process for forming a ceramic capacitor body.
With respect to claim 10, the combined teachings of Yamamoto and Lee fail explicitly teach that the base electrode layer includes nickel and the plated layer includes tin.
KR ‘421, on the other hand, teaches that it is well-known in the art to form an external electrode from a Ni base layer and a plating layer including tin. See paragraph [0028]. Such an arrangement is known for effective soldering connections to external wirings.
Accordingly, it would have been obvious to one of ordinary skill in the art, at the time of the effective filing date of the invention, to modify the combined teachings of Yamamoto and Lee, as taught by KR ‘421, in order to provide effective soldering connection to the external wirings.
Allowable Subject Matter
Claims 6 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: with respect to claims 6 and 13, the prior art fails to teach, or fairly suggest, the through hole size range recited therein, when taken in conjunction with the limitations set forth in the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Fukuda (US 2023/0368976) discloses a multilayer ceramic component having coplanar auxiliary electrodes, but fails to teach or fairly suggest the through holes in the auxiliary electrodes. Nishiura (US 2021/0166882), Cha et al. (US 2021/0035736), and Hirao et al. (US 2016/0093443) each disclose a ceramic component having holes in the internal electrode layers, but fails teach the use of auxiliary electrodes.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DION R FERGUSON whose telephone number is (571)270-7566. The examiner can normally be reached Monday-Friday, 5:30 a.m. - 4:00 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole, can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DION R. FERGUSON/Primary Examiner, Art Unit 2847
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