Prosecution Insights
Last updated: October 25, 2026
Application No. 18/905,364

SEMICONDUCTOR DEVICE

Non-Final OA §103
Filed
Oct 03, 2024
Priority
Nov 24, 2023 — JP 2023-198843
Examiner
SCHOENHOLTZ, JOSEPH
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kabushiki Kaisha Toshiba
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1213 granted / 1328 resolved
+23.3% vs TC avg
Minimal -5% lift
Without
With
+-4.7%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
20 currently pending
Career history
1349
Total Applications
across all art units

Statute-Specific Performance

§101
2.8%
-37.2% vs TC avg
§103
53.0%
+13.0% vs TC avg
§102
12.3%
-27.7% vs TC avg
§112
21.7%
-18.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1328 resolved cases

Office Action

§103
DETAILED ACTION This Office Action is in response to Applicant’s application 18/905,364 filed on October 3, 2024 in which claims 1 to 20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings submitted on October 3, 2024 have been reviewed and accepted by the Examiner. Information Disclosure Statement The Information Disclosure Statements (IDS), filed on October 3, 2024; May 5, 2025; February 2, 2026 and May 28, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner. Priority Receipt is acknowledged of paper submitted under 35 U.S.C. 119(a)-(d) or under 35 U.S.C. 120, 121, 365(c), or 386(c) which has been placed of record in the file. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Objections Claim 19 is objected to because of the following informalities: Claim 19 recited the first conductive film at lines 3-4 and Examiner suggests a first conductive film. Appropriate correction is required. Notation References to patents will be in the form of [C:L] where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of [xxxx]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. PNG media_image1.png 790 741 media_image1.png Greyscale Claims 1-2, 8-11, 14-17 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2021/0265243 (Kuraya) and U.S. 2023/0317670 (Seal). Regarding claim 1 and referring to annotated Figures 1A and 1C, Kuraya discloses a semiconductor device comprising: a first conductive member, 23 [0045]; a first solder material, 43 [0045], provided on the first conductive member; a semiconductor element, 10 [0045], provided on the first solder material; a second solder material, 42 [0042], provided on the semiconductor element; a second conductive member, 21/22 [0044], including a first region, e.g. p2 [0050], facing the semiconductor element, as shown, via the second solder material, as shown; a resin 30 [0051], sealing the first conductive member, the second conductive member, the first solder material, the second solder material, and the semiconductor element, as shown; and a first peripheral region of the first conductive member, as annotated, that is in contact with the resin, as shown in Figure 1C, and is located around a region where the semiconductor element overlaps, as shown in Figure 1C. Kuraya does not teach a first conductive film provided on a part of the first conductive member and including a metal element that is smaller in diffusion coefficient than the first conductive member; a first solder material provided on the first conductive film; a resin sealing the first conductive film. PNG media_image2.png 500 805 media_image2.png Greyscale Seal is directed to package and bonding improvements for power devices using transient liquid soldering processes (e.g., diffusion soldering). Regarding claim 1, Seal teaches at annotated Figure 2 a semiconductor device comprising: a first conductive member, e.g. 156-1 [0062]; a first conductive film, e.g. plated nickel as described at [0062], provided on a part of the first conductive member, as shown, and including a metal element that is smaller in diffusion coefficient than the first conductive member, e.g. nickel; a first solder material, 144 [0065], e.g. Sn, provided on the first conductive film; a semiconductor element, 110 [0059], provided on the first solder material, as shown; a second solder, 140 [0071] e.g. Sn, material provided on the semiconductor element, as shown; a second conductive member, 130 [0071], including a first region, as annotated, facing the semiconductor element via the second solder material, as shown; a resin, 160 [0078], sealing the first conductive member, the second conductive member, the first conductive film, the first solder material, the second solder material, and the semiconductor element, as shown; and a first peripheral region, as annotated, of the first conductive member that is in contact with the resin and is located around a region where the semiconductor element overlaps, as shown. Seal teaches a first conductive film provided on a part of the first conductive member and including a metal element that is smaller in diffusion coefficient than the first conductive member; a first solder material provided on the first conductive film; a resin sealing the first conductive film. At [0049] Seal teaches; [0049] Pursuant to embodiments of the present invention, packaged electronic devices are provided that include at least one transient liquid phase solder joint that is used to connect a terminal of a power semiconductor die of the device to a corresponding lead and/or to a power substrate. A transient liquid phase solder joint refers to a solder joint that is formed at a first, relatively lower temperature (e.g., 260-300° C.) yet, once formed, will not melt until exposed to a second, relatively higher temperature (e.g., 400° C. or higher). In other words, a low-melting-point metal is used as solder to create a multi-metal bond that has a significantly higher melting point. In example embodiments, the transient liquid phase solder joint may be formed using tin as the solder to bond two copper or nickel elements together. Seal teaches the use of a first conductive film of nickel under the solder joint is useful for forming a solder joint at low temperature that also has the property of a high melting temperature. An artisan would be familiar with the use of lead free solders, c.f. Mishra, Ajeet, et al. “Effect of Ni, Co, and Mn for the recent advancements and progress of Sn-X (X= Bi, Ag, Zn & Cu) solder alloys: A review.” Microelectronics Reliability, vol. 174, Nov. 2025, p. 115878, https://doi.org/10.1016/j.microrel.2025.115878 (Mishra) citing to Cheng, Fangjie, et al. “Microstructural and mechanical properties of Sn–Ag–Cu lead-free solders with minor addition of Ni and/or Co.” Journal of Materials Science, vol. 43, no. 10, May 2008, pp. 3643–3648, https://doi.org/10.1007/s10853-008-2580-7 (Cheng). Regarding the use of nickel with Sn solder, at page 1155878 Mishra reports; PNG media_image3.png 272 650 media_image3.png Greyscale Mishra, citing to Cheng, teaches that nickel is an essential component in the Cu-Sn interface to reduce void generation, promote void merging and improve solder reliability. Taken as a whole, the prior art is directed to the use of solder for IGBT semiconductor devices. Seal teaches a strike of nickel on a copper substrate is useful for transient liquid phase soldering to enable formation of the solder joint at a relatively low temperature while the resulting solder joint has a relatively high melting temperature. An artisan would be familiar with lead free solder literature, e.g., Mishra who notes that nickel is essential at Cu-Sn interface to improve solder reliability. An artisan would find it desirable to use a lead free solder produced at a low processing temperature and with a relatively high melting point. Accordingly it would have been obvious to a person or ordinary skill in the art at the time of Applicant’s invention to configure the device of claim 1 with a first conductive film provided on a part of the first conductive member and including a metal element that is smaller in diffusion coefficient than the first conductive member; a first solder material provided on the first conductive film; a resin sealing the first conductive film, as taught by Seal, to implement a solder joint formed at low temperature which has a high melting point, as taught by Seal, with improved solder joint reliability and the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Examiner also notes that nickel plated on a die paddle of a lead frame is well known in the art. Regarding claim 2 which depends upon claim 1, Kuraya teaches the first conductive member includes a first protrusion, as annotated, exposed from the resin, as shown, and the first peripheral region and the resin are in direct contact with each other in a vicinity of the first protrusion in the first peripheral region, as shown in Figure 1C. Regarding claim 8 which depends upon claim 1, Examiner takes the position that the device of claim 1 comprising a second conductive film formed in at least a part between the first region and the second solder material and including a metal element that is smaller in diffusion coefficient than a metal element forming the first region is merely a duplication of parts which has no patentable weight absent a showing of unexpected results, see MPEP 2144. Regarding claim 9 which depends upon claim 8, referring to annotated Figure 1 A, Kuraya discloses the second conductive member further includes: a second protrusion exposed from the resin; a second region provided between the second protrusion of the second conductive member and the first region and formed continuously with the first region, and a third region formed continuously with the second protrusion and separated from the second region. Regarding claim 10 which depends upon claim 9, Kuraya teaches a third solder material, 41 [0051], provided between the second region and the third region in Figure 1C. Further Examiner takes the position that a third conductive film provided in at least a part between the second region and the third solder material appears to be merely the duplication of parts, i.e., a nickel film on a conductive member, is a duplication of parts that has no patentable weight absent a showing of unexpected results, see MPEP 2144. Regarding claim 11 which depends upon claim 10, Examiner takes the position that a fourth conductive film provided in at least a part between the third region and the third solder material is merely a duplication of parts that has not patentable weight absent a showing of unexpected results, see MPEP 2144. Regarding claim 14 which depends upon claim 1, Seal teaches the first conductive member includes a metal containing Cu, the first conductive film is a metal containing Ni, and the first solder material includes a metal containing Sn. Regarding claim 15 which depends upon claim 1, Seal suggests the first solder material contains Sn at a mass percent concentration of 50% or more, i.e.,100 percent. Regarding claim 16 which depends upon claim 1, at [0073] Kuraya teaches the first solder material contains at least Pb, Sb, Ni, Ag, Bi, Cu, or Zn. Regarding claim 17 which depends upon claim 1, at [0027] Kuraya teaches and suggest a metal-oxide semiconductor field-effect transistor (MOSFET) , e.g. IGBT, is formed in the semiconductor element, the first conductive member is electrically coupled to a drain electrode of the MOSFET, and the second conductive member is electrically coupled to a source electrode of the MOSFET and Examiner takes official notice this configuration is well known in the power semiconductor packaging art. Regarding claim 19 and referring to the discussion at claim 1, Kuraya discloses semiconductor device comprising: a first conductive member; a first solder material provided on the first conductive member; a semiconductor element provided on the first solder material; a second solder material provided on the semiconductor element; a second conductive member including a first region facing the semiconductor element via the second solder material. Kuraya does not disclose a first solder material provided on (a?) first conductive film and a first (second?) conductive film provided between the second solder material and the second conductive member and including a metal element that is smaller in diffusion coefficient than the second conductive member. Seal teaches the use of conductive films, e.g. Ni which is a metal element that is smaller in diffusion coefficient than a conductive member, e.g. copper enables the use of transient liquid phase soldering with improved solder joint reliability. Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the device of claim 19 with a first solder material provided on (a?) first conductive film and a first (second?) conductive film provided between the second solder material and the second conductive member and including a metal element that is smaller in diffusion coefficient than the second conductive member to implement a solder joint with a low formation temperature and a relatively high melting point and because the duplication of solder joints using this structure is merely the duplication or parts which has no patentable weight absent a showing of unexpected results, see MPEP 2144. Allowable Subject Matter Claims 3-7, 12-13 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 3 the prior art does not teach the device o claim 1, wherein an area where the first solder material is provided is greater than an area where the first conductive film is provided. Regarding claim 4 the prior art does not teach the device o claim 1, wherein a part of the first solder material is in direct contact with the first conductive member. Regarding claim 5 the prior art does not teach the device of claim 1, wherein an area of where the first conductive film is provided is from 20 to 90% of an area where the first solder material is provided. Regarding claim 6 the prior art does not teach the device of claim 1, wherein an area where the first solder material is provided is smaller than an area where the first conductive film is provided. Regarding claim 7 the prior art does not teach the device of claim 1, wherein the first solder material and the first conductive member are not in direct contact with each other. Regarding claim 12 the prior art does not teach the device of claim 10, wherein the second conductive film is formed continuously with the third conductive film from an area between the first region and the first solder material to an area between the second region and the third solder material. Claim 13 depends upon claim 12 and is allowable on that basis. Regarding claim 20 the prior art does not teach the device of claim 19, wherein an area where the second solder material is provided is greater than an area where the first conductive film is provided. Allowable Subject Matter Claim 18 is allowed. The following is an examiner’s statement of reasons for allowance: Regarding claim 18 the prior art fails to disclose the device of claim 18 wherein an area where the first solder material is provided is greater than an area where the first conductive film is provided. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is listed on the notice of references cited. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joe Schoenholtz whose telephone number is (571)270-5475. The examiner can normally be reached M-Thur 7 AM to 7 PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ms. Yara Green can be reached at (571) 272-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.E. Schoenholtz/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Oct 03, 2024
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
87%
With Interview (-4.7%)
1y 9m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1328 resolved cases by this examiner. Grant probability derived from career allowance rate.

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