Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/11/2026 has been entered.
Response to Amendment
This Office action is in response to Applicant' s communication filed 5/11/2026 in response to the Office action dated 3/11/2026. Claims 1, 4, 9, 12, 15, and 18 have been amended. Claims 1-20 are pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Madabhushi (US 20190332298 A1) in view of Ulasen et al. (US 20180373722 A1), hereinafter Ulasen, and further in view of Kim et al. (US 20230126807 A1), hereinafter Kim.
Regarding claim 1, Madabhushi teaches a system comprising: a memory device (Paragraph 21; Fig. 1, nonvolatile memory (NVM) array 114); and
a processing device, operatively coupled to the memory device (Paragraph 23; Fig. 1, controller 107 includes a processing device), to perform operations comprising:
identifying a set of logical addresses associated with data stored on the memory device in one or more blocks of a first type (Paragraph 37; Fig. 4, first set of logical block addresses are associated with a first partition including SLC [first] type NAND blocks 314, 324, 334);
determining a temporal metric class associated with the set of logical addresses, wherein the temporal metric class is associated with a corresponding range of predicted update characteristic of the data (Paragraph 41, determining whether certain data should be considered hot or cold [temporal metric classes] based off of a statistical analysis indicating a frequency of read/write transactions associated with the data [predicted update characteristic]);
identifying, based on the temporal metric class, a set of blocks of a second type (Paragraph 36; Fig. 4, associating cold [temporal metric class] data with a third partition including TLC or QLC [second] type NAND blocks 320, 322, 330, 332, 340, 342),
wherein a first block of the first type comprises a first plurality of memory cells having a first number of bits per cell (Paragraph 29, SLCs (single-level cells) store one [first number] bit of data), and
wherein a second block of the second type comprises a second plurality of memory cells having a second number of bits per cell that exceeds the first number of bits per cell (Paragraph 29, QLCs (quad-level cells) store four [second number] bits of data).
Madabhushi does not explicitly teach wherein a workload type of the data is suitable for a type of the memory device, wherein the temporal metric class is determined using historical data, and wherein a workload type of the historical data is same as the workload type of data, and moving the data stored on the memory device in the one or more blocks of the first type to the identified set of blocks of the second type.
However, Ulasen teaches wherein a workload type of the data is suitable for a type of the memory device (Paragraphs 28, 33-34; Fig. 1, requests for files with small sizes [workload type] are preferably kept in cold storage 102, which includes disk type memory devices),
wherein the temporal metric class is determined using historical data (Paragraph 32; Fig. 1, ML module 106 classifies a group of files as hot or cold [temporal metric class] using historical statistics of similar data), and
wherein a workload type of the historical data is same as the workload type of data (Paragraphs 32, 34; Fig. 1, ML module 106 classifies a group of files as hot or cold using statistics from files having similar metadata attributes, such as files with similar file size [workload type]).
Madabhushi and Ulasen are analogous art because they are in the same field of endeavor, that being data classification. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Madabhushi to further include the determining of the temporal metric class using historical data of the same workload type according to the teachings of Ulasen. The motivation for doing so would have been to improve retrieval speeds for different types of files (Ulasen, Paragraph 34).
Madabhushi in view of Ulasen does not explicitly teach moving the data stored on the memory device in the one or more blocks of the first type to the identified set of blocks of the second type.
However, Kim teaches moving the data stored on the memory device in the one or more blocks of the first type to the identified set of blocks of the second type (Paragraph 69, based on the time elapsed since data has been written to a source block, migrating the coldest data stored in the source block within an SLC memory region [first type] to a destination block within an MLC memory region [second type]).
Madabhushi, Ulasen, and Kim are analogous art because they are in the same field of endeavor, that being data classification. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Madabhushi in view of Ulasen to further include the moving of data from a first block type to a second block type according to the teachings of Kim. The motivation for doing so would have been to utilize non-volatile memory space more efficiently (Kim, Paragraph 69).
Regarding claim 2, Madabhushi in view of Kim teaches the system of claim 1, the set of logical addresses (Madabhushi, Paragraph 37; Fig. 4, first set of logical block addresses are associated with a first partition including SLC [first] type NAND blocks 314, 324, 334), and
host data (Madabhushi, Paragraph 20; Fig. 1, receiving data for storage from host device 102).
Madabhushi in view of Kim does not explicitly teach wherein the identifying and determining the temporal metric class are performed by a machine learning model trained to group host data by expected update frequency.
However, Ulasen teaches wherein the identifying and determining the temporal metric class is performed by a machine learning model trained to group host data by expected update frequency (Paragraphs 28, 30-32; Fig. 1, machine learning ML module 106 classifies data 103 as hot or cold based on the predicted use/frequency of access [such as by updates] of the data 103 and migrates the data 103 to [identifies] either hot data area 101 or cold data area 102 for storage).
Madabhushi, Ulasen, and Kim are analogous art because they are in the same field of endeavor, that being data classification. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Madabhushi in view of Kim to further include the identification and classification using a trained machine learning model according to the teachings of Ulasen. The motivation for doing so would have been to enhance the efficiency of the storage system (Ulasen, Paragraph 29).
Regarding claim 3, Madabhushi in view of Ulasen, further in view of Kim teaches the system of claim 2, wherein the machine learning model is trained using data collected from a tiered storage stack comprising at least one of: a volatile memory device and a non-volatile memory device (Ulasen, Paragraphs 28, 32-33; Fig. 1, ML module 106 classifies data 103 using historical statistics of data stored in hot data area 101, which includes RAM [volatile memory], and cold data area 102, which includes disk [non-volatile] storage).
Regarding claim 4, Madabhushi in view of Ulasen, further in view of Kim teaches the system of claim 2, wherein the machine learning model is trained using the historical data of the workload type same as the workload type of the data (Ulasen, Paragraphs 32, 34; Fig. 1, ML module 106 is trained using statistics from files having similar metadata attributes, such as files with similar file size [workload type]).
Regarding claim 5, Madabhushi in view of Ulasen, further in view of Kim teaches the system of claim 4, wherein the historical data comprises input/output commands with a set of logical addresses (Madabhushi, Paragraphs 20, 26; Fig. 1, host device 102 issues read/write requests for data within logical block addresses of NVM 114),
a time difference between updates associated with the update characteristic (Ulasen, Paragraphs 32, 34; Fig. 1, ML module 106 classifies files using historical statistics of files with similar metadata, such as a time when the file(s) were last modified [updated]), and
a size of data associated with the set of logical addresses (Ulasen, Paragraphs 32, 34; Fig. 1, ML module 106 classifies files using historical statistics of files with similar metadata, such as file location and file size).
Regarding claim 6, Madabhushi in view of Ulasen, further in view of Kim teaches the system of claim 1, wherein the temporal metric class associated with the set of logical addresses is determined in view of a size of the data associated with the set of logical addresses (Ulasen, Paragraphs 32, 34, determining a hot/cold classification threshold based on parameters such as file location and file size).
Regarding claim 7, Madabhushi in view of Ulasen, further in view of Kim teaches the system of claim 1, wherein the temporal metric class associated with the set of logical addresses is determined in view of a time difference between updates associated with the update characteristic associated with the set of logical addresses (Ulasen, Paragraphs 32, 34, determining a hot/cold classification threshold based on parameters such as a time when the file(s) were last modified [updated]).
Regarding claim 8, Madabhushi in view of Ulasen, further in view of Kim teaches the system of claim 1, wherein the first number of bits per cell comprises a single bit per cell (Madabhushi, Paragraph 29, SLCs (single-level cells) store one [first number] bit of data), and
wherein the second number of bits per cell comprises four bits per cell (Madabhushi, Paragraph 29, QLCs (quad-level cells) store four [second number] bits of data).
Regarding claims 9-12 and 14, these are method versions of the claimed system discussed above (claims 1-4 and 8, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, these claims are also obvious over Madabhushi in view of Ulasen, further in view of Kim.
Regarding claim 13, Madabhushi in view of Ulasen, further in view of Kim teaches the method of claim 12, wherein the historical data comprises a set of logical addresses (Madabhushi, Paragraph 26; Fig. 1, data is stored within logical block addresses of NVM 114),
a time difference between updates associated with the update characteristic (Ulasen, Paragraphs 32, 34; Fig. 1, ML module 106 classifies files using historical statistics of files with similar metadata, such as a time when the file(s) were last modified [updated]), and
a size of data associated with the set of logical addresses (Ulasen, Paragraphs 32, 34; Fig. 1, ML module 106 classifies files using historical statistics of files with similar metadata, such as file location and file size).
Regarding claims 15-18 and 20, these are non-transitory computer-readable storage medium versions of the claimed system discussed above (claims 1-4 and 8, respectively), in which Madabhushi in view of Ulasen, further in view of Kim also teaches a non-transitory computer-readable storage medium comprising instructions (Madabhushi, Paragraph 53, computer or other data processing apparatus implements computer program instructions).
The remaining claim limitations have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, these claims are also obvious over Madabhushi in view of Ulasen, further in view of Kim.
Regarding claim 19, this is a non-transitory computer-readable storage medium version of the claimed method discussed above (claim 13, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, this claim is also obvious over Madabhushi in view of Ulasen, further in view of Kim.
Response to Arguments
Applicant’s arguments (see pages 6-8 of the remarks) filed 5/11/2026, with respect to the rejections of claims 1-20 under 35 U.S.C 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Madabhushi, Ulasen, and Kim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s
supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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