Detailed Action
Status of Claims
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-40 are presented for examination.
Claims 1-20 are cancelled by the applicant.
Claims 21-40 are newly added.
Claims 21-40 are rejected.
This Action is Non-Final.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/25/2024 and 08/08/2025,the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The non-statutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A non-statutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a non-statutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
8. Claim 21 is non-provisionally rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,229,048.
Application No:18/905,555
Patent No: 12,229,048
21. (New) A computer-implemented method, comprising:
receiving, by a network interface card (NIC), a packet comprising a request to access data in a host memory, the packet indicating a datatype descriptor associated with a layout of data in the host memory, and the packet being associated with a precomputed context which describes a multi-dimensional array and a start location of the packet within a block of the host memory;
Generating, for the packet, a datatype handle corresponding to the datatype descriptor and an offset indicating a position of the packet within a plurality of received packets;
obtaining, based on the datatype handle and the offset, the precomputed context for the packet; and
processing out-of-order packets by generating, based on the precomputed context, a plurality of read requests or write requests.
1. (Currently Amended) A computer-implemented method executed by one or more processing elements, comprising:
receiving, by a network interface card (NIC), a plurality of packets corresponding to a read request or a write request, wherein the packets are associated with a datatype descriptor stored in a datatype engine of the NIC, wherein each packet is associated with a precomputed context which indicates a value for each dimension of a multi-dimensional array and a start location of the respective packet within a block of a host memory, wherein the datatype descriptor comprises at least one of: a representation of the multi-dimensional array which includes a number of elements in each dimension, a size of a block to be transferred, and a stride ineach dimension, wherein the representation of the multi-dimensional array indicates a handle to a previous datatvpe and a name for a new datatype; or
a reference to an input/output vector (IOVEC) which indicates addresses and lengths of data to be read from or written to the host memory;
generating, for a respective packet, a datatype handle corresponding to the datatype descriptor and an offset indicating a position of the respective packet within the plurality of packets;
determining, based on the datatype handle and the offset, that a context for the respective packet is cached;
initializing the datatype engine based on the cached context;
generating, by the datatype engine based on the precomputed and cached context, a plurality of read requests or write requests comprising addresses and lengths, thereby allowing the NIC to process out-of-order packets based on the precomputed and cached context; and
caching a current context when processing for the respective packet is complete.
9. Claims 21- 40 are non-provisionally rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,229,048 (Please note that as both the Patent and co-pending application claimed similar subject matters, and in the interest of time, the examiner is selecting the independent claim 1 from the Patent and claim 21 from co-pending application for the instant double patenting rejection).
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
10. Claims 29-36 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Claim 29 defines a “ network device”. However, while the preamble defines a “network device, comprising: at least one processing resource; …the at least one processing resource comprise instructions…”, which would typically be indicative of an “apparatus”, the body of the claim lacks definite structure indicative of a physical apparatus. Therefore, the claim as a whole appears to be nothing more than a “system” of software elements, thus defining functional descriptive material per se.
Functional descriptive material may be statutory if it resides on a “computer-readable medium or computer-readable memory”. The claim(s) indicated above lack structure, and do not define a computer readable medium and are thus non-statutory for that reason .When functional descriptive material is recorded on some computer-readable medium it becomes structurally and functionally interrelated to the medium and will be statutory in most cases since use of technology permits the function of the descriptive material to be realized. The scope of the presently claimed invention encompasses products that are not necessarily computer readable, and thus NOT able to impart any functionality of the recited program. The examiner suggests:
1. Amending the claim(s) to embody the program on “computer-readable medium” or equivalent; assuming the specification does NOT define the computer readable medium as a “signal”, “carrier wave”, or “transmission medium” which are deemed non-statutory; or
2. Adding structure to the body of the claim that would clearly define a statutory apparatus.
Any amendment to the claim should be commensurate with its corresponding disclosure.
Note:
“A transitory, propagating signal … is not a “process, machine, manufacture, or composition of matter.” Those four categories define the explicit scope and reach of subject matter patentable under 35 U.S.C. § 101; thus, such a signal cannot be patentable subject matter.” (In re Nuijten, 84 USPQ2d 1495 (Fed. Cir. 2007)).
Should the full scope of the claim as properly read in light of the disclosure encompass non-statutory subject matter such as a “signal”, the claim as a whole would be non-statutory. Should the applicant’s specification define or exemplify the computer readable medium or memory (or whatever language applicant chooses to recite a computer readable medium equivalent) as statutory tangible products such as a hard drive, ROM, RAM, etc, as well as a non-statutory entity such as a “signal”, “carrier wave”, or “transmission medium”, the examiner suggests amending the claim to include the disclosed tangible computer readable storage media, while at the same time excluding the intangible transitory media such as signals, carrier waves, etc.
Dependent claims 30-36, when analyzed as a whole, are held to be patent ineligible under 35 U.S.C. 101 because the additional recited limitation(s) fail(s) to render the claims to be statutory.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11. Claims 21-40 are rejected under 35 U.S.C. 103 as being unpatentable over Chayat et al.(US Patent Application Pub. No: 20170353384 A1) in view of Pismenny et al. (US Patent Application Pub. No: 20190116127 A1).
As per claim 21,Chayat discloses a computer-implemented method, comprising:
receiving, by a network interface card (NIC), a packet comprising a request to access data in a host memory, the packet indicating a datatype descriptor associated with a layout of data in the host memory [Paragraph 0012, A NIC may receive a data packet from the network, process the data packet, generate a receive descriptor based on information within the data packet, and forward the data packet and the receive descriptor to one or more other components of the platform 102 (e.g., CPU 112 and/or memory 114).], and the packet being associated with a precomputed context which describes a multi-dimensional array and a start location of the packet within a block of the host memory [Abstract, Paragraphs 0037; 0042;0053, A receive descriptor profile 210 defines the format of a receive descriptor. Thus, a receive descriptor profile 210 may specify any packet context information (e.g., as described above) such as one or more packet context parameters or metadata generated by the processing logic 206 to include in receive descriptors generated based on that profile.];
generating, for the packet, a datatype handle corresponding to the datatype descriptor and an offset indicating a position of the packet within a plurality of received packets [Paragraph 0084, …the receive descriptor profile is selected from multiple receive descriptor profiles based on a priority of the receive descriptor profile, the receive descriptor comprises an offset from the beginning of the data packet to a particular header of the data packet, the receive descriptor comprises metadata obtained by processing information included within the data packet, and/or the data packet and the receive descriptor may be sent (e.g., by the network interface controller or other means) to a computing device across a wireless communication channel.];
obtaining, based on the datatype handle and the offset, the precomputed context for the packet [Paragraphs 0042;0050;0053,…., The receive descriptor may have any suitable data packet context information (and in some embodiments may even include data packet context information that was used to select the receive descriptor profile). At 320, the receive descriptor is provided to a host (e.g., a CPU 112 and/or memory 114) for use by the target of the packet.].
Chayat does not explicitly disclose processing out-of-order packets by generating, based on the precomputed context, a plurality of read requests or write requests.
Pismenny discloses processing out-of-order packets by generating, based on the precomputed context [Paragraphs 0007-0008, The acceleration logic is configured, upon receiving an instruction from the host processor to retransmit a data packet, to reconstruct the context information with respect to the data packet, to re-encode a payload of the data packet using the reconstructed context information, and to retransmit the data packet to the packet communication network.], a plurality of read requests or write requests [Paragraphs 0012-0013,The acceleration logic is configured, upon receiving, in a given flow, a data packet containing a serial number that is out of order with respect to a previous packet in the given flow, to reconstruct the context information and to apply the reconstructed context information in decoding the data records in subsequent data packets in the given flow.].
It would have been obvious one ordinary skill in the art before the effective filling date of the claimed invention, to include Pismenny 's apparatus for processing data packets received from a network into Chayat’s system for providing virtualized receive descriptors by a computing device for the benefit of allowing the accelerator to maintain and recover a flow state and computational context independently of a CPU (Pismenny,[0004]) to obtain the invention as specified in claim 1.
As per claim 22, Chayat and Pismenny teach the claimed limitations of claim 21, wherein Chayat and Pismenny teach, a method, wherein obtaining the precomputed context comprises: determining whether the precomputed context is cached [Chayat, Abstract, Paragraphs 0037; 0042;0053, A receive descriptor profile 210 defines the format of a receive descriptor. Thus, a receive descriptor profile 210 may specify any packet context information (e.g., as described above) such as one or more packet context parameters or metadata generated by the processing logic 206 to include in receive descriptors generated based on that profile.];
initializing a datatype engine of the NIC in response to determining that the precomputed context is cached [Pismenny, Abstract, Paragraphs 0004;0006, A memory holds context information with respect to one or more flows of the data packets conveyed between the host processor and the network in accordance with a reliable transport protocol and with respect to encoding, in accordance with a session-layer protocol, of data records that are conveyed in the payloads of the data packets in the one or more flows.]; and
in response to determining that the precomputed context for the respective packet is not cached: retrieving the precomputed context from the host memory [Chayat, Abstract, Paragraphs 0037; 0042;0053, A receive descriptor profile 210 defines the format of a receive descriptor. Thus, a receive descriptor profile 210 may specify any packet context information (e.g., as described above) such as one or more packet context parameters or metadata generated by the processing logic 206 to include in receive descriptors generated based on that profile.];
caching the precomputed context complete [Pismenny, Paragraphs 0012-0013,…,the processing circuitry is configured to write the data packets received in the given flow starting from the data packet containing the serial number that is out of order to the host memory without decoding the data records until the acceleration logic has completed reconstructing the context information, wherein the host processor decodes the data records that have not been decoded by the acceleration logic.]; and
initializing the datatype engine based on the retrieved precomputed context [Pismenny, Abstract, Paragraphs 0004;0006, A memory holds context information with respect to one or more flows of the data packets conveyed between the host processor and the network in accordance with a reliable transport protocol and with respect to encoding, in accordance with a session-layer protocol, of data records that are conveyed in the payloads of the data packets in the one or more flows.].
As per claim 23, Chayat and Pismenny teach the claimed limitations of claim 22, wherein Chayat and Pismenny teach, a method, integrating the datatype engine into a first engine of the NIC which handles outbound packets and a second engine of the NIC which handles inbound packets [Chayat, Paragraph 0012, A NIC may receive a data packet from the network, process the data packet, generate a receive descriptor based on information within the data packet, and forward the data packet and the receive descriptor to one or more other components of the platform 102 (e.g., CPU 112 and/or memory 114).];
generating, by the datatype engine of the first engine, direct memory access (DMA) read instructions based on the datatype descriptor, the offset, and corresponding lengths [Chayat, Paragraph 0084, …the receive descriptor profile is selected from multiple receive descriptor profiles based on a priority of the receive descriptor profile, the receive descriptor comprises an offset from the beginning of the data packet to a particular header of the data packet, the receive descriptor comprises metadata obtained by processing information included within the data packet, and/or the data packet and the receive descriptor may be sent (e.g., by the network interface controller or other means) to a computing device across a wireless communication channel.];
converting the DMA read instructions to one or more of the generated plurality of read requests [Pismenny, Paragraph 0056, When descriptor 48 reaches the head of queue 49, processing circuitry 40 reads the descriptor and determines whether TLS operations are to be applied to the corresponding packet, at a TLS evaluation step 82.]; and
retrieving the data indicated in the converted DMA read instructions based on translated addresses indicated in the converted DMA read instructions [Pismenny, Paragraph 0056, When descriptor 48 reaches the head of queue 49, processing circuitry 40 reads the descriptor and determines whether TLS operations are to be applied to the corresponding packet, at a TLS evaluation step 82.].
As per claim 24, Chayat and Pismenny teach the claimed limitations of claim 23, wherein Chayat and Pismenny teach, a method, generating, by the datatype engine of the second engine, DMA write instructions based on the datatype handle and the offset [Chayat, Paragraph 0084, …the receive descriptor profile is selected from multiple receive descriptor profiles based on a priority of the receive descriptor profile, the receive descriptor comprises an offset from the beginning of the data packet to a particular header of the data packet, the receive descriptor comprises metadata obtained by processing information included within the data packet, and/or the data packet and the receive descriptor may be sent (e.g., by the network interface controller or other means) to a computing device across a wireless communication channel.];
converting the DMA write instructions to one or more of the generated plurality of write requests [Pismenny, Paragraph 0056, When descriptor 48 reaches the head of queue 49, processing circuitry 40 reads the descriptor and determines whether TLS operations are to be applied to the corresponding packet, at a TLS evaluation step 82.]; and
writing the data to the host memory based on translated addresses associated with the generated plurality of write requests [Pismenny, Paragraph 0056, When descriptor 48 reaches the head of queue 49, processing circuitry 40 reads the descriptor and determines whether TLS operations are to be applied to the corresponding packet, at a TLS evaluation step 82.].
As per claim 25, Chayat and Pismenny teach the claimed limitations of claim 21, wherein Chayat teaches, a method, wherein generating the offset is based on at least one of: whether the packet is associated with a message which has already been received or is associated with a new message; or information indicated in the respective packet [Chayat, Paragraphs 0012-0013; 0084, …the receive descriptor profile is selected from multiple receive descriptor profiles based on a priority of the receive descriptor profile, the receive descriptor comprises an offset from the beginning of the data packet to a particular header of the data packet, the receive descriptor comprises metadata obtained by processing information included within the data packet, and/or the data packet and the receive descriptor may be sent (e.g., by the network interface controller or other means) to a computing device across a wireless communication channel.].
As per claim 26, Chayat and Pismenny teach the claimed limitations of claim 21, wherein Chayat teaches, a method, wherein the datatype descriptor associated with the layout of data in the host memory comprises a representation of the multi-dimensional array which indicates a number of elements in each dimension, a size of a block to be transferred, and a stride in each dimension, a handle to a previous datatype, and a name for a new datatype [Chayat, Paragraphs 0012-0013,…,the processing circuitry is configured to write the data packets received in the given flow starting from the data packet containing the serial number that is out of order to the host memory without decoding the data records until the acceleration logic has completed reconstructing the context information, wherein the host processor decodes the data records that have not been decoded by the acceleration logic.].
As per claim 27, Chayat and Pismenny teach the claimed limitations of claim 26, wherein Chayat and Pismenny teach, a method, further comprising:
replicating a datatype into locations with equally spaced blocks based on the representation of the multi-dimensional array [Chayat, Abstract, Paragraphs 0037; 0042;0053, A receive descriptor profile 210 defines the format of a receive descriptor. Thus, a receive descriptor profile 210 may specify any packet context information (e.g., as described above) such as one or more packet context parameters or metadata generated by the processing logic 206 to include in receive descriptors generated based on that profile.]; and
obtaining a respective block by concatenating a same number of copies of the previous datatype, wherein a space between the blocks is a multiple of a unit associated with the previous datatype [Pismenny, Paragraph 0050, Driver software 46 writes descriptors 48 to queue 49, specifying the addresses and lengths of data frames 58 that processing circuitry 40 is to read from memory 30, as well as packet parameters, such as the TCP payload size and packet serial numbers.].
As per claim 28, Chayat and Pismenny teach the claimed limitations of claim 21, wherein Chayat and Pismenny teach, a method, updating the precomputed context in response to processing the out-of-order packets [Pismenny, Paragraph 0050, Driver software 46 writes descriptors 48 to queue 49, specifying the addresses and lengths of data frames 58 that processing circuitry 40 is to read from memory 30, as well as packet parameters, such as the TCP payload size and packet serial numbers.]; and
caching a current context when processing for a packet of the out-of-order packets is complete [Chayat, Paragraphs 0012-0013,…,the processing circuitry is configured to write the data packets received in the given flow starting from the data packet containing the serial number that is out of order to the host memory without decoding the data records until the acceleration logic has completed reconstructing the context information, wherein the host processor decodes the data records that have not been decoded by the acceleration logic.].
As per claims 29-36, claims 29-36 are rejected in accordance to the same rational and reasoning as the above claims 21-28 above, wherein claims 29-36 are the device claims for the method of claims 21-28.
As per claims 37-40, claims 37-40 are rejected in accordance to the same rational and reasoning as the above claims 21-23 and 37 above, wherein claims 37-40 are the method claims for the method of claims 21-23 and 37.
Conclusion
RELEVANT ART CITED BY THE EXAMINER
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c).
References Considered Pertinent but not relied upon
CHUN et al. (US Patent Application Pub. No: 20190189224 A1) teaches a memory system includes: a memory device including a plurality of pages; and a controller suitable for generating a read descriptor in response to an entered command, reading and outputting read data stored in at least one page in response to the read descriptor, determining whether each per-page data of the read data includes an error, storing indicators for showing whether each per-page data includes the error, re-reading some of the read data on per-page basis, based on the indicators, without generating another read descriptor, and updating the indicators based on an error check result after the re-reading.
REGULA et al. (US Patent Application Pub. No: 20150281126 A1) teaches a method of transferring data over a switch fabric with at least one switch with an embedded network class endpoint device is provided. REGULA discloses at a device transmit driver a transfer command is received to transfer a message also, if the message length is less than a threshold the message is pushed. If the message length is greater than the threshold, the message is pulled.
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/GETENTE A YIMER/Primary Examiner, Art Unit 2181