Prosecution Insights
Last updated: October 27, 2026
Application No. 18/905,734

DISPLAY APPARATUS

Non-Final OA §102§103
Filed
Oct 03, 2024
Priority
Jan 23, 2024 — RE 10-2024-0010084
Examiner
ANDREWS, FELIX BRYAN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
53 granted / 67 resolved
+11.1% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
19 currently pending
Career history
99
Total Applications
across all art units

Statute-Specific Performance

§103
71.4%
+31.4% vs TC avg
§102
24.4%
-15.6% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 67 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3, 5-7, 11-12, 14-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rhe et al. (US 2018/0151662) [Hereinafter Rhe]. Regarding claim 1, Rhe teaches A display apparatus, comprising: a substrate [fig. 11A, substrate SUB, para 17] including an active area [fig. 11A, active area AA, para 10] and a non-active area [fig. 11A, bezel area ZA, para 9], the non-active area (fig. 11A, ZA) including a first area [fig. 11A, link area LA, para 9] adjacent to the active area (fig. 11A, AA), a second area [fig. 11A, bending area BA, para 9] adjacent to the first area (fig. 11A, LA), and a third area [fig. 11A, pad area PA, para 9] adjacent to the second area (fig. 11A, BA); and a first signal line [fig. 11A, metal layer M3, para 103; wherein para 126 disclose layers are considered signal lines] and a second signal line [fig. 11A, metal layer M1, para 102] disposed in the non-active area (fig. 11A, ZA), wherein at least one of the first signal line and the second signal line includes a first part and a second part [annotated fig. 11A], wherein the first part and the second part have different angles relative to the non-active area [annotated fig. 11A], respectively, and wherein an interface between the first part and the second part is located in the second area (annotated fig. 11A, BA). PNG media_image1.png 652 950 media_image1.png Greyscale ANNOTATED FIG. 11A Regarding claim 2, Rhe teaches The display apparatus according to claim 1, wherein the first part is perpendicular to a side of the active area [annotated fig. 11A]. Regarding claim 3, Rhe teaches The display apparatus according to claim 1, wherein the interface between the first part and the second part is spaced apart from the third area (annotated fig. 11A, PA). Regarding claim 5, Rhe teaches The display apparatus according to claim 1, further comprising: a power line [fig. 11A, metal layer M2, para 123; “all signal lines . . .receive various signals such as . . .a power supply signal”] disposed in the first area (fig. 11A, LA), the second area (fig. 11A, BA), and the third area (fig. 11A, PA), wherein the power line (fig. 11A, M2) is disposed on the first signal line (fig. 11A, M1) and the second signal line (fig. 11A, M2). Regarding claim 6, Rhe teaches The display apparatus according to claim 5, wherein a portion of the power line (fig. 11A, M2) disposed at a boundary between the third area (fig. 11A, PA) and the second area (fig. 11A, BA) does not have steps [fig. 11A; wherein the powerline M2 is a straight horizontal line at the boundary between the third area (PA) and the second area (BA)]. Regarding claim 7, Rhe teaches The display apparatus according to claim 5, further comprising: a dam [fig. 11A; wherein the insulating layer INS2 creates multiple dams on the power line] disposed on the power line (fig. 11A, M2) in the second area (fig. 11A, BA). Regarding claim 11, Rhe teaches The display apparatus according to claim 5, wherein the interface between the first part and the second part [annotated fig. 11A] overlaps the power line (fig. 11A, M2). Regarding claim 12, Rhe teaches The display apparatus according to claim 5, wherein the power line (fig. 11A, M2) includes a first power line (fig. 11A, M2), and wherein the first power line is disposed between the active area (fig. 11A, AA) and a bending area (fig. 11A, BA) of the substrate (fig. 11A, SUB). Regarding claim 14, Rhe teaches The display apparatus according to claim 6, wherein the first signal line (fig. 11A, M3) and the second signal line (fig. 11A, M1) are not disposed below the portion of the power line (fig. 11A, M2) at a boundary between the third area (fig. 11A, PA) and the second area (fig. 11A, BA) [fig. 11A; wherein the is no signal line below the power line (M2) and the border of the bending area (BA) and (PA)]. Regarding claim 15, Rhe teaches A display apparatus, comprising: a substrate [fig. 11A, substrate SUB, para 17] including an active area [fig. 11A, active area AA, para 9] and a non-active area [fig. 11A, bezel area ZA, para 9]; and a first signal line [fig. 11A, M3, para 103; wherein para 126 disclose layers are considered signal lines] and a second signal line [fig. 11A, M2, para 117] disposed in the non-active area (fig. 11, ZA), wherein each of the first signal line and the second signal line include a respective first portion and a respective second portion [annotated fig. 11-1], and wherein the first portion and the second portion of each of the first signal line and the second signal line are angled relative to each other [annotated fig. 11-1]. PNG media_image2.png 658 950 media_image2.png Greyscale ANNOTATED FIG. 11-1 Regarding claim 16, Rhe teaches The display apparatus of claim 15, wherein the first portion of each of the first signal line and the second signal line is straight [annotated fig. 11-1] and the second portion of each of the first signal line and the second signal line is angled with respect to the first portion [annotated fig. 11-1]. Regarding claim 17, Rhe teaches The display apparatus of claim 15, further comprising: a power line [fig. 11A, M1, para 123; “all signal lines . . .receive various signals such as . . .a power supply signal”] disposed in the non-active area (fig. 11A, ZA), wherein an interface between the first portion and the second portion of each of the first signal line and the second signal line overlaps the power line [annotated fig. 11-1]. Regarding claim 18, Rhe teaches A display apparatus, comprising: a substrate [fig. 11A, substrate SUB, para 17] including an active area [fig. 11A, active area AA, para 9] and a non-active area [fig. 11A, bezel area ZA, para 9]; and a signal line [fig. 11A, M3, wherein para 126 disclose layers are considered signal lines] disposed in the non-active area (fig. 11A, ZA), wherein the signal line includes a first portion and a second portion at an angle to the first portion [annotated fig. 11-2]. PNG media_image3.png 632 950 media_image3.png Greyscale ANNOTATED FIG. 11-2 Regarding claim 19, Rhe teaches The display apparatus of claim 18, wherein the first portion is straight [annotated fig. 11-2]. Regarding claim 20, The display apparatus of claim 18, further comprising: a power line [fig. 11A, M2; metal layer M2, para 123; “all signal lines . . .receive various signals such as . . .a power supply signal”] overlapping an interface between the first portion and the second portion of the signal line [annotated fig. 11-2]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Rhe as applied to claims 1-3, 5-7, 11-12, 14-20 and further in view of Choi et al. (US 2022/0069053). Regarding claim 4, Rhe teaches The display apparatus according to claim 1. Rhe fails to explicitly disclose a planarization layer disposed in the first area and the third area, wherein the planarization layer is absent from the second area. However, Choi teaches a planarization layer [fig. 5/6, planarization layer 170, para 179] disposed in the first area (fig. 6, non-display area IA2) and the third area (fig. 6, non-display areaIA3), wherein the planarization layer is absent from the second area (fig. 5, pad area 51a). Therefore it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention for the pads to cover the non-display area except the pad area to protect the device against damage while not creating an insulation barrier that would prevent the electrical signals from reaching the panel. Claim(s) 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Rhe as applied to claims 1-3, 5-7, 11-12, 14-20 and further in view of Mathea et al. (EP 1715374A1). Regarding claim 8, Rhe teaches The display apparatus according to claim 1, further comprising: a thin film transistor disposed in the active area [para 10, “thin film transistors . . . for displaying an input image are disposed in the area AA”] . the thin film transistor including a semiconductor pattern, a gate electrode, a source electrode, and a drain electrode [para 11, “The active area AA, in which the display elements are disposed, includes a gate insulation layer GI covering the gate lines and gate electrodes of thin film transistors, a passivation film PAS covering source and drain electrodes of the thin film transistors”]; and a storage capacitor [para 10, “storage capacitors . . .for displaying an input image are disposed in the area AA.” ]. While Rhe notes storage capacitors are disposed in the active area (AA). Rhe fails to explicitly disclose a storage capacitor including a first capacitor electrode and a second capacitor electrode. However Mathea teaches a storage capacitor including a first capacitor electrode and a second capacitor electrode [para 8, “the storage capacitor comprising a first electrode, a second electrode”]. Therefore it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention for the storage capacitor to comprise a first and second electrode to temporarily store electrical energy in an electric field and release when needed. Regarding claim 9, Rhe teaches The display apparatus according to claim 8. Rhe fails to explicitly disclose wherein the first signal line is disposed on a same layer as the gate electrode and the second signal line is disposed on a same layer as the second capacitor electrode. Mathea teaches wherein the first signal line [fig. 7b, select lines 6, para 24] is disposed on a same layer as the gate electrode [fig. 7b, gate electrode 3, para 24] and the second signal line [fig. 7b, data line 5, para 21] is disposed on a same layer [para 21; substrate not shown] as the second capacitor electrode [fig. 7b, electrode 14, para 21]. Therefore it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention for the signal lines to be on separate layers to ensure signal isolation to prevent short circuits and to reduce manufacturing cost and complexity instead of forming separate layers for each components with individual isolation. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Rhe as applied to claims 1-3, 5-7, 11-12, 14-20 and further in view of Lee et al. (US 7692753). Regarding claim 10, Rhe teaches The display apparatus according to claim 1, While Rhe notes “all signal lines extending from the active area to the pad area to supply and receive various signals”. Rhe fails to explicitly disclose wherein the first signal line is configured to transmit a gate signal and the second signal line is configured to transmit a data signal. However, Lee teaches wherein the first signal line is configured to transmit a gate signal and the second signal line is configured to transmit a data signal [para 25, “a flat panel display device includes a plurality of data signal lines and a plurality of gate signal lines”]. Therefore it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have separate signal lines for gate and data signals to eliminate crosstalk and ghosting thereby enhancing the reliability of the device. Allowable Subject Matter Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 13, Rhe teaches The display apparatus according to claim 12. The prior art of record fails to explicitly disclose wherein the interface between the first part and the second part is disposed between the active area and the bending area. Thereby claim 13 contains allowable subject matter in light of the additional limitations recited therein and would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FELIX B ANDREWS whose telephone number is (703)756-1074. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FELIX B ANDREWS/Examiner, Art Unit 2812 /William B Partridge/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Oct 03, 2024
Application Filed
Oct 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
88%
With Interview (+8.4%)
3y 3m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 67 resolved cases by this examiner. Grant probability derived from career allowance rate.

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