Office Action Predictor
Last updated: April 16, 2026
Application No. 18/906,206

FLEXIBLE TEST INSTRUCTION SET ARCHITECTURE

Non-Final OA §112
Filed
Oct 04, 2024
Examiner
CHAUDRY, MUJTABA M
Art Unit
2112
Tech Center
2100 — Computer Architecture & Software
Assignee
Signature Ip Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
88%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
694 granted / 824 resolved
+29.2% vs TC avg
Minimal +4% lift
Without
With
+3.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
25 currently pending
Career history
849
Total Applications
across all art units

Statute-Specific Performance

§101
8.1%
-31.9% vs TC avg
§103
24.7%
-15.3% vs TC avg
§102
4.5%
-35.5% vs TC avg
§112
40.0%
+0.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 824 resolved cases

Office Action

§112
DETAILED ACTION Application filed 10/4/2024 has been examined. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-27 are pending. Specification and drawings are accepted. IDS has been considered. PTO-1449 is attached. Application is pending. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. For example, claim 1 recites: A processor-implemented method for testing comprising: accessing a testing environment, wherein the testing environment includes an instruction RAM, an instruction fetch and decode unit (FAD), a code exerciser, a command interface, and a trace RAM, wherein a device under test (DUT) is accessible by the command interface, and wherein the testing environment includes a test instruction set architecture (TISA); programming a test sequence, by a user, wherein the test sequence includes one or more instructions from within the TISA; storing, in the instruction RAM, the test sequence that was programmed; fetching, by the FAD, a first instruction from the test sequence that was stored, wherein the fetching includes decoding the first instruction; translating, by the code exerciser, the first instruction, wherein the translating produces a first packetized communication, wherein the DUT is responsive to the first packetized communication; sending the first packetized communication, by the command interface, to the DUT; receiving a first packetized response, by the command interface, from the DUT, wherein the first packetized response is stored in a trace RAM; and reporting, to the user, the first packetized response that was stored in the trace RAM. The claim lacks clarity. The claim states, “…programming a test sequence, by a user, wherein the test sequence includes one or more instructions from within the TISA…” If the test instruction set is already loaded into the TISA then what exactly does the use program? Is the test sequence input by the user or does the user select a test sequence from the TISA? What is the distinction between the user input and the test instructions in the TISA? Essential elements are missing from the claim. Then the claim states, “…storing, in the instruction RAM, the test sequence that was programmed…” Is the test sequence programmed and download by the user or is does the use select a test sequence on the TISA? Next the claim states, “…fetching, by the FAD, a first instruction from the test sequence that was stored, wherein the fetching includes decoding the first instruction…” Is the first instruction fetched from the TISA? How is this instruction set related to the user test sequence? It is not clear what exactly is being stated in the claim. Essential elements are missing from the claim. The claim states, “…sending the first packetized communication, by the command interface, to the DUT; receiving a first packetized response, by the command interface, from the DUT, wherein the first packetized response is stored in a trace RAM” What is the first packetized communication? Is this used to test the DUT? Is it test data? Is the response received from the DUT stored ahead of time in the trace RAM or is this compared to something previous stored in the trace RAM? Essential elements are missing. Independent claims 26 and 27 are rejected for similar reasons. Respective dependent claims 2-25 are rejected at least based on dependency. Applicants are requested to review all claims. Corrections are requested. It is the Examiner’s conclusion that the claims of the present application, as presented, are not clear. Applicants are encouraged to formulate claim language that clear defines the novelty of the application. Pertinent prior arts have been cited for Applicants review. Conclusion The following are suggested formats for either a Certificate of Mailing or Certificate of Transmission under 37 CFR 1.8(a). The certification may be included with all correspondence concerning this application or proceeding to establish a date of mailing or transmission under 37 CFR 1.8(a). Proper use of this procedure will result in such communication being considered as timely if the established date is within the required period for reply. The Certificate should be signed by the individual actually depositing or transmitting the correspondence or by an individual who, upon information and belief, expects the correspondence to be mailed or transmitted in the normal course of business by another no later than the date indicated. Certificate of Mailing I hereby certify that this correspondence is being deposited with the United States Postal Service with sufficient postage as first class mail in an envelope addressed to: Commissioner for Patents P.O. Box 1450 Alexandria, VA 22313-1450 on __________. (Date) Typed or printed name of person signing this certificate: ________________________________________________________ Signature: ______________________________________ Certificate of Transmission by Facsimile I hereby certify that this correspondence is being facsimile transmitted to the United States Patent and Trademark Office, Fax No. (___)_____ -_________ on _____________. (Date) Typed or printed name of person signing this certificate: _________________________________________ Signature: ________________________________________ Certificate of Transmission via USPTO Patent Electronic Filing System I hereby certify that this correspondence is being transmitted via the U.S. Patent and Trademark Office (USPTO) patent electronic filing system to the USPTO on _____________. (Date) Typed or printed name of person signing this certificate: _________________________________________ Signature: ________________________________________ Please refer to 37 CFR 1.6(a)(4), 1.6(d) and 1.8(a)(2) for filing limitations concerning transmissions via the USPTO patent electronic filing system, facsimile transmissions and mailing, respectively. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUJTABA M CHAUDRY whose telephone number is (571)272-3817. The examiner can normally be reached Monday-Friday 9am-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Albert DeCady can be reached at 571-272-3819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MUJTABA M. CHAUDRY Primary Examiner Art Unit 2112 /MUJTABA M CHAUDRY/Primary Examiner, Art Unit 2112
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Prosecution Timeline

Oct 04, 2024
Application Filed
Dec 01, 2025
Non-Final Rejection — §112
Feb 04, 2026
Examiner Interview (Telephonic)
Feb 04, 2026
Examiner Interview Summary
Apr 03, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
88%
With Interview (+3.5%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 824 resolved cases by this examiner. Grant probability derived from career allow rate.

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