DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Objections
Claim 12 is objected to because of the following informalities: in the first clause following the preamble of the claim, “The” should be lower-cased. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 13-19 are rejected under 35 U.S.C. 112(b), as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 13 recites the limitation "the storage device" in line 11. There is insufficient antecedent basis for this limitation in the claim because the first instance of a “storage device” occurs in the preamble and is specifically indicated as “a vehicle storage device.” Claims 14-19 are rejected due to dependence on claim 13.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-9, 13-17, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kreuchauf et al. (US Pub. No. 2005/0030824), hereinafter referred to as Kreuchauf, in view of Yahya et al. (US Pub. No. 2024/0020257), hereinafter referred to as Yahya.
Referring to claim 1, Kreuchauf discloses an electronic device (fig. 1), comprising: a plurality of processors (fig. 1, data processors 10-12); and a storage device (fig. 1, combination of 9, 14, and 13), the storage device including a first storage interface connected to a first processor among the plurality of processors (fig. 1, interface 15 connected to data processor 10), a second storage interface connected to a second processor among the plurality of processors (fig. 1, interface 15 connected to data processor 11), a memory (fig. 1, memory 13), and an interface controller (fig. 1, apparatus 9) configured to control a connection relationship between the first storage interface, the second storage interface, and the non-volatile memory ([0030-0034]), and wherein the storage device is configured to communicate with the first and second processors via different methods, such that the storage device is configured to communicate with the first processor according to a first method and to communicate with the second processor according to a second method different from the first method (apparatus 9 has a first set of interfaces 15, each interface 15 being connected to a data processing device 10, 11 and 12 via a respective bus 16…buses 16 are preferably AMBA buses (AMBA=Advanced Microprocessor Bus Architecture), AHB buses (AHB=Advanced Highspeed Bus) and/or FPI buses (FPI=Flexible Peripheral Interconnect), [0031]).
While Kreuchauf teaches a memory, Kreuchauf teaches RAM and DRAM embodiments of memory and therefore does not appear to explicitly disclose the memory is non-volatile. Furthermore, while Kreuchauf discloses SoC embodiments with respect to prior art (see fig. 2 and [0003] and [0007]), Kreuchauf does not appear to explicitly disclose the components of fig. 1 as an SoC, and therefore does not appear to explicitly disclose the first processor, the second processor, and the storage device are on a first substrate.
However, Yahya discloses non-volatile memory (Read Only Memory (ROM), [0062]), and the first processor, the second processor, and the storage device are on a first substrate (FIG. 2A, the electrical board 200a may include four semiconductor devices 202a-202d. A semiconductor device may include a system-on-chip (SOC), a system-on-chip (SOC), a processor, and/or a graphic processor unit (GPU). Each semiconductor device may be electrically coupled to a memory; [0034-0035]).
Kreuchauf and Yahya are analogous art because they are from the same field of endeavor, processing system interconnect architecture.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to modify the processor system architecture of Kreuchauf according to the electric board architecture and non-volatile memory embodiment of Yahya because of the technical advantages of the electrical board design such as efficient communication between components, as well as the known benefits of non-volatile memory such as reduced power consumption.
The suggestion/motivation for doing so would have been the technical advantages of a consolidated system design and the known benefits of non-volatile memory (Yahya: [0040]).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 2, Kreuchauf discloses the first processor includes a first processor interface (each interface 15 being connected to a data processing device 10, 11 and 12 via a respective bus 16…buses 16 are preferably AMBA buses (AMBA=Advanced Microprocessor Bus Architecture), AHB buses (AHB=Advanced Highspeed Bus) and/or FPI buses (FPI=Flexible Peripheral Interconnect), [0031]).
While Kreuchauf teaches the first processor and the first processor interface, Kreuchauf does not appear to explicitly disclose the first processor is an SoC processor, and the first processor interface is a UFS interface or a PCIe interface.
However, Yahya teaches a SoC processor and a PCIe interface (a plurality of semiconductor devices (e.g., a system-on-chip (SOC)…semiconductor devices can be interconnected with a high speed switch device (e.g., a peripheral component interconnect express (PCIe) switch device), [0021]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to substitute the processor and interface embodiments anticipated by Kreuchauf with the specific SoC and PCIe disclosed by Yahya because the prior art of Kreuchauf contained a device (method, product, etc.) which differed from the claimed device by the substitution of anticipated processor and interface embodiments with the another specific SoC and PCIe; the prior art of Yahya demonstrates that the substituted components (i.e., SoC and PCIe) and their functions were known in the art; and one of ordinary skill in the art could have substituted one known element for another, and the results of the substitution would have been predictable processor and interface embodiment with specific types known in the art before the effective filing date of the claimed invention.
The rationale to support a conclusion that the claim would have been obvious is that the substitution of one known element for another yields predictable results to one of ordinary skill in the art. If any of these findings cannot be made, then this rationale cannot be used to support a conclusion that the claim would have been obvious to one of ordinary skill in the art (see MPEP 2143.I.B).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 4, Kreuchauf discloses the storage device further includes a third storage interface connected to a third processor (fig. 1, interface 15 connected to data processor 16), among the plurality of processors, the third processor includes a third processor interface (each interface 15 being connected to a data processing device 10, 11 and 12 via a respective bus 16…buses 16 are preferably AMBA buses (AMBA=Advanced Microprocessor Bus Architecture), AHB buses (AHB=Advanced Highspeed Bus) and/or FPI buses (FPI=Flexible Peripheral Interconnect), [0031]), the third processor is an application processor (AP) (software application which is assigned to a processor, [0006]).
While Kreuchauf teaches the third processor interface, Kreuchauf does not appear to explicitly disclose the interface is an automotive Ethernet interface or a PCIe interface.
However, Yahya teaches an automotive Ethernet interface (electrical board may also include an ethernet switch device that can allow each electrical board to communicate with another electrical board…in the autonomous vehicle, [0021]) or a PCIe interface (a plurality of semiconductor devices (e.g., a system-on-chip (SOC)…semiconductor devices can be interconnected with a high speed switch device (e.g., a peripheral component interconnect express (PCIe) switch device), [0021]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to substitute the interface embodiment anticipated by Kreuchauf with the specific PCIe disclosed by Yahya because the prior art of Kreuchauf contained a device (method, product, etc.) which differed from the claimed device by the substitution of anticipated interface embodiments with the another specific PCIe; the prior art of Yahya demonstrates that the substituted components (i.e., PCIe) and their functions were known in the art; and one of ordinary skill in the art could have substituted one known element for another, and the results of the substitution would have been predictable processor and interface embodiment with specific types known in the art before the effective filing date of the claimed invention.
The rationale to support a conclusion that the claim would have been obvious is that the substitution of one known element for another yields predictable results to one of ordinary skill in the art. If any of these findings cannot be made, then this rationale cannot be used to support a conclusion that the claim would have been obvious to one of ordinary skill in the art (see MPEP 2143.I.B).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 5, Kreuchauf discloses the storage device further includes a fourth storage interface connected to a fourth processor among the plurality of processors (fig. 1, the dots between processors 11 and 12 indicating the anticipation of more processors and interfaces), [0031]).
Kreuchauf does not appear to explicitly disclose the fourth processor is on a second substrate that is different from the first substrate.
However, Yahya discloses the fourth processor is on a second substrate that is different from the first substrate (electrical board may include a plurality of semiconductor devices (e.g., a system-on-chip (SOC), a processor, [0021]; one or more additional electrical boards, which may have the same design as the electrical board 200a, can be electrically connected to the electrical board 200a so that one semiconductor device on the electrical board 200a can send/receive data with one or more semiconductor devices on one or more additional electrical boards, [0037]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to modify the processor system architecture of Kreuchauf according to the electric board architecture embodiment of Yahya because interfacing between separate electrical boards would allow communication between different subsystems.
The suggestion/motivation for doing so would have been to facilitate communication between subsystems of an ecosystem (Yahya: [0024]).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 6, Kreuchauf discloses the fourth processor includes a fourth processor interface (each interface 15 being connected to a data processing device 10, 11 and 12 via a respective bus 16…buses 16 are preferably AMBA buses (AMBA=Advanced Microprocessor Bus Architecture), AHB buses (AHB=Advanced Highspeed Bus) and/or FPI buses (FPI=Flexible Peripheral Interconnect), [0031]), the fourth processor is an application processor (AP) (software application which is assigned to a processor, [0006]).
Kreuchauf does not appear to explicitly disclose the interface is an automotive Ethernet interface or a PCIe interface.
However, Yahya teaches an automotive Ethernet interface (electrical board may also include an ethernet switch device that can allow each electrical board to communicate with another electrical board…in the autonomous vehicle, [0021]) or a PCIe interface (a plurality of semiconductor devices (e.g., a system-on-chip (SOC)…semiconductor devices can be interconnected with a high speed switch device (e.g., a peripheral component interconnect express (PCIe) switch device), [0021]).
The rationale to support a conclusion of obviousness remains as indicated above with respect to claim 4.
As to claim 7, Kreuchauf in view of Yahya discloses the electronic device is mounted on a vehicle including a plurality of zones and a zone controller configured to control devices included in the plurality of zones, respectively, and the fourth processor is the zone controller (Yahya: vehicle ecosystem 100 for a vehicle 105 that includes a compute controller 165…in-vehicle control computer 150 can be in data communication with a plurality of vehicle subsystems 140, all of which can be resident in the vehicle 105… the vehicle subsystem interface 160 can include a controller area network (CAN) controller to communicate with devices in the vehicle subsystems 140… vehicle 105 may include various vehicle subsystems that support of the operation of vehicle 105; [0024-0025]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to apply the known memory system architecture of Kreuchauf to a known vehicle platform of Yahya because the prior art of Kreuchauf contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement;" the prior art of Yahya contained a known vehicle platform that is applicable to the base device (method, or product); and one of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved vehicle processor, memory interconnect platform.
The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art (MPEP 2143.I.D).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 8, Kreuchauf in view of Yahya discloses the first substrate and the second substrate are fastened to a single housing (Yahya: fig. 1, vehicle 105, [0024-0025]). The rationale to support a conclusion of obviousness remains as indicated above with respect to claims 7.
As to claim 9, Kreuchauf in view of Yahya discloses the vehicle includes an electronic control unit (ECU) configured to control an operation of the vehicle based on data stored in the storage device (Yahya: the vehicle subsystem interface 160 can include a controller area network (CAN) controller to communicate with devices in the vehicle subsystems 140…vehicle 105 may include various vehicle subsystems that support of the operation of vehicle 105. The vehicle subsystems may include…a vehicle control subsystem 146, [0024-0025]; vehicle control subsystem 146 may be configured to control operation of the vehicle 105 and its components, [0029]; memory 175 may contain additional instructions as well, including instructions to transmit data to, receive data from, interact with, or control…the vehicle control subsystem 146, [0032]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to apply the known memory system architecture of Kreuchauf to a known vehicle platform of Yahya because the prior art of Kreuchauf contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement;" the prior art of Yahya contained a known vehicle platform that is applicable to the base device (method, or product); and one of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved vehicle processor, memory interconnect platform.
The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art (MPEP 2143.I.D).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
Referring to claim 13, Kreuchauf discloses a storage device (fig. 1), comprising: a memory (fig. 1, memory 13); and a storage controller (fig. 1, combination of components 9 and 14), the storage controller including a first storage interface connected to a first processor (fig. 1, interface 15 connected to data processor 10) among a plurality of processors (fig. 1, data processors 10-12), a second storage interface (fig. 1, interface 15 connected to data processor 11) connected to a second processor among the plurality of processors and different from the first storage interface, and an interface controller (fig. 1, apparatus 9) configured to control a connection relationship between the first storage interface, the second storage interface, and the memory ([0030-0034]).
While Kreuchauf anticipates various embodiments of the storage system, include mobile platforms, Kreuchauf does not appear to explicitly disclose a vehicle platform such that the storage device is a vehicle storage device mounted on a vehicle. Additionally, while Kreuchauf teaches a memory, Kreuchauf teaches RAM and DRAM embodiments of memory and therefore does not appear to explicitly disclose the memory is non-volatile.
However, Yahya discloses non-volatile memory (Read Only Memory (ROM), [0062]).
Kreuchauf and Yahya are analogous art because they are from the same field of endeavor, processing system interconnect architecture.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to modify the processor system architecture of Kreuchauf according to the electric board architecture and non-volatile memory embodiment of Yahya because of the known benefits of non-volatile memory such as reduced power consumption.
Furthermore, Yahya discloses a vehicle platform (fig. 1, [0004-0005]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to apply the known memory system architecture of Kreuchauf to a known vehicle platform of Yahya because the prior art of Kreuchauf contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement;" the prior art of Yahya contained a known vehicle platform that is applicable to the base device (method, or product); and one of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved vehicle processor, memory interconnect platform.
The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art (MPEP 2143.I.D).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 14, while Kreuchauf discloses SoC embodiments with respect to prior art (see fig. 2 and [0003] and [0007]), Kreuchauf does not appear to explicitly disclose the components of fig. 1 as an SoC, and therefore does not appear to explicitly disclose the first processor, the second processor, and the storage device are on a first substrate.
However, Yahya discloses non-volatile memory (Read Only Memory (ROM), [0062]), and the first processor, the second processor, and the storage device are on a first substrate (FIG. 2A, the electrical board 200a may include four semiconductor devices 202a-202d. A semiconductor device may include a system-on-chip (SOC), a system-on-chip (SOC), a processor, and/or a graphic processor unit (GPU). Each semiconductor device may be electrically coupled to a memory; [0034-0035]).
Kreuchauf and Yahya are analogous art because they are from the same field of endeavor, processing system interconnect architecture.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to modify the processor system architecture of Kreuchauf according to the electrical board architecture and non-volatile memory embodiment of Yahya because of the technical advantages of the electrical board design such as efficient communication between components, as well as the known benefits of non-volatile memory such as reduced power consumption.
The suggestion/motivation for doing so would have been the technical advantages of a consolidated system design and the known benefits of non-volatile memory (Yahya: [0040]).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 15, Kreuchauf discloses the storage device further includes a fourth storage interface connected to a fourth processor among the plurality of processors (fig. 1, the dots between processors 11 and 12 indicating the anticipation of more processors and interfaces), [0031]).
Kreuchauf does not appear to explicitly disclose the fourth processor is on a second substrate that is different from the first substrate.
However, Yahya discloses the fourth processor is on a second substrate that is different from the first substrate (electrical board may include a plurality of semiconductor devices (e.g., a system-on-chip (SOC), a processor, [0021]; one or more additional electrical boards, which may have the same design as the electrical board 200a, can be electrically connected to the electrical board 200a so that one semiconductor device on the electrical board 200a can send/receive data with one or more semiconductor devices on one or more additional electrical boards, [0037]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to modify the processor system architecture of Kreuchauf according to the electric board architecture embodiment of Yahya because interfacing between separate electrical boards would allow communication between different subsystems.
The suggestion/motivation for doing so would have been to facilitate communication between subsystems of an ecosystem (Yahya: [0024]).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 16, Kreuchauf in view of Yahya discloses the vehicle includes a plurality of zones and a plurality of zone controllers, each separate zone controller of the plurality of zone controllers configured to control devices included in a separate, respective zone of the plurality of zones, and the fourth processor is one zone controller of the plurality of zone controllers.
(Yahya: vehicle ecosystem 100 for a vehicle 105 that includes a compute controller 165…in-vehicle control computer 150 can be in data communication with a plurality of vehicle subsystems 140, all of which can be resident in the vehicle 105… the vehicle subsystem interface 160 can include a controller area network (CAN) controller to communicate with devices in the vehicle subsystems 140… vehicle 105 may include various vehicle subsystems that support of the operation of vehicle 105; [0024-0025]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to apply the known memory system architecture of Kreuchauf to a known vehicle platform of Yahya because the prior art of Kreuchauf contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement;" the prior art of Yahya contained a known vehicle platform that is applicable to the base device (method, or product); and one of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved vehicle processor, memory interconnect platform.
The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art (MPEP 2143.I.D).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
As to claim 17, Kreuchauf in view of Yahya discloses the first substrate and the second substrate are fastened to a single housing (Yahya: fig. 1, vehicle 105, [0024-0025]). The rationale to support a conclusion of obviousness remains as indicated above with respect to claims 7.
Referring to claim 20, Kreuchauf discloses an operating method of a storage device (fig. 1), the operating method comprising: receiving first data from a first processor (fig. 1, data processor 10) among a plurality of processors (fig. 1, data processors 10-12) according to a first method (fig. 1, interface 15 connected to data processor 10); receiving second data from a second processor (fig. 1, data processor 11) among the plurality of processors according to a second method (fig. 1, interface 15 connected to data processor 11), the second method different from the first method (apparatus 9 has a first set of interfaces 15, each interface 15 being connected to a data processing device 10, 11 and 12 via a respective bus 16…buses 16 are preferably AMBA buses (AMBA=Advanced Microprocessor Bus Architecture), AHB buses (AHB=Advanced Highspeed Bus) and/or FPI buses (FPI=Flexible Peripheral Interconnect), [0031]); determining a processing order of the first data and the second data; and sequentially writing the first data and the second data to a memory based on the processing order (If access operations by the data processing devices 10, 11 and 12 via the buses 16 occur during the operation, the address of an access operation is sensed by the control devices 21 and compared with the respective address region stored in a memory device 20. If the address is located in the address region, the access operation of the respective data processing device 10, 11 and 12 to the memory 13 is carried out via a respective line 18, a respective interface 17, a respective bus 19 and the memory controller 14. If the address is not located in the address region, the access operation by the respective data processing device 10, 11 and 12 is blocked by the control devices 21…signal on the line 27 indicates the access rejection to the specific data processing device 12…The specific data processing device 12 handles the access rejection as a function of the received information and transmits, for example, data relating to the access rejection to a suitable position for further processing, [0042]).
While Kreuchauf anticipates various embodiments of the storage system, include mobile platforms, Kreuchauf does not appear to explicitly disclose a vehicle platform such that the storage device is a vehicle storage device mounted on a vehicle. Additionally, while Kreuchauf teaches a memory, Kreuchauf teaches RAM and DRAM embodiments of memory and therefore does not appear to explicitly disclose the memory is non-volatile.
However, Yahya discloses non-volatile memory (Read Only Memory (ROM), [0062]).
Kreuchauf and Yahya are analogous art because they are from the same field of endeavor, processing system interconnect architecture.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to modify the processor system architecture of Kreuchauf according to the electric board architecture and non-volatile memory embodiment of Yahya because of the known benefits of non-volatile memory such as reduced power consumption.
Furthermore, Yahya discloses a vehicle platform (fig. 1, [0004-0005]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf and Yahya before him or her, to apply the known memory system architecture of Kreuchauf to a known vehicle platform of Yahya because the prior art of Kreuchauf contained a "base" device (method, or product) upon which the claimed invention can be seen as an "improvement;" the prior art of Yahya contained a known vehicle platform that is applicable to the base device (method, or product); and one of ordinary skill in the art would have recognized that applying the known technique would have yielded predictable results and resulted in an improved vehicle processor, memory interconnect platform.
The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art (MPEP 2143.I.D).
Therefore, it would have been obvious to combine Kreuchauf and Yahya to obtain the invention as specified in the instant claim.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kreuchauf in view of Yahya, as applied to claims 1-2, 4-9, 13-17, and 20 above, further in view of Park et al. (US Pub. No. 2015/0361918), hereinafter referred to as Park.
As to claim 3, Kreuchauf discloses the second processor includes a second processor interface (each interface 15 being connected to a data processing device 10, 11 and 12 via a respective bus 16…buses 16 are preferably AMBA buses (AMBA=Advanced Microprocessor Bus Architecture), AHB buses (AHB=Advanced Highspeed Bus) and/or FPI buses (FPI=Flexible Peripheral Interconnect), [0031]).
While Kreuchauf teaches the second processor and the second processor interface, Kreuchauf does not appear to explicitly disclose second processor is a micro control unit (MCU), and the second processor interface is a serial peripheral interface (SPI) or an Extended SPI (xSPI).
However, Park teaches a micro control unit (MCU) and a serial peripheral interface (SPI) (the MCU 100 and the data storage 240 may communicate with the MCU 100 through a Serial Peripheral Interface (SPI) communication, [0037]).
Kreuchauf, Yahya, and Park are analogous art because they are from the same field of endeavor, processing system interconnect architecture.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf, Yahya, and Park before him or her, to substitute the processor and interface embodiments anticipated by Kreuchauf in view of Yahya with the specific MCU and PCIe disclosed by Park because the prior art of Kreuchauf contained a device (method, product, etc.) which differed from the claimed device by the substitution of anticipated processor and interface embodiments with the another specific SoC and PCIe; the prior art of Park demonstrates that the substituted components (i.e., MCU and SPI) and their functions were known in the art; and one of ordinary skill in the art could have substituted one known element for another, and the results of the substitution would have been predictable processor and interface embodiment with specific types known in the art before the effective filing date of the claimed invention.
The rationale to support a conclusion that the claim would have been obvious is that the substitution of one known element for another yields predictable results to one of ordinary skill in the art. If any of these findings cannot be made, then this rationale cannot be used to support a conclusion that the claim would have been obvious to one of ordinary skill in the art (see MPEP 2143.I.B).
Therefore, it would have been obvious to combine Kreuchauf, Yahya, and Park to obtain the invention as specified in the instant claim.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Kreuchauf in view of Yahya, as applied to claims 1-2, 4-9, 13-17, and 20 above, further in view of Byun et al. (US Pub. No. 2020/0065259), hereinafter referred to as Byun.
As to claim 19, while Kreuchauf discloses the storage controller further configured to perform an address operation, based on a first address received from the first processor to a first physical address with respect to the memory, and a second address received from the second processor to a second physical address with respect to the memory (If access operations by the data processing devices 10, 11 and 12 via the buses 16 occur during the operation, the address of an access operation is sensed by the control devices 21 and compared with the respective address region stored in a memory device 20. If the address is located in the address region, the access operation of the respective data processing device 10, 11 and 12 to the memory 13 is carried, [0042]), Kreuchauf does not appear to explicitly disclose the storage controller further includes a flash translation layer (FTL) configured to perform an address mapping operation, based on a first mapping table that maps a first logical block address received from the first processor to a first physical address with respect to the non-volatile memory, and a second mapping table that maps a second logical block address received from the second processor to a second physical address with respect to the non-volatile memory.
However, Byun discloses the storage controller further includes a flash translation layer (FTL) (memory system 110 may include a Flash Translation Layer (FTL) in the controller 130, [0086]) configured to perform an address mapping operation, based on a first mapping table that maps a first logical block address to a first physical address with respect to the non-volatile memory, and a second mapping table that maps a second logical block address to a second physical address with respect to the non-volatile memory (a first memory mapping table NMT_1 and a second memory mapping table NMT_2. The first memory mapping table NMT_1 and the second memory mapping table NMT_2 may include one or more L2P information for managing data stored in the memory device 150. In the first memory mapping table NMT_1 and the second memory mapping table NMT_2, the first fields may indicate logical addresses, and the second fields may indicate physical addresses or chunk addresses. The first memory mapping table NMT_1 may be allocated to logical addresses LA 0, 1, 2, 3 and 4, and corresponding physical addresses PA 305, 101, 102, 103 and 196. The second memory mapping table NMT_2 may be allocated to logical addresses LA 5, 6, 7, 8 and 9, and corresponding physical addresses PA 10, 14, 203, 204 and 205, [0115]).
Kreuchauf, Yahya, and Byun are analogous art because they are from the same field of endeavor, managing storage operations.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kreuchauf, Yahya, and Byun before him or her, to modify the storage system of Kreuchauf in view of Yahya of to include the FTL mapping tables of Byun because the FTL would provide translation between logical and physical addresses and the plurality of mapping tables would reduce the required searching operation.
The suggestion/motivation for doing so would have been to improve the operations speed of the memory system (Byun: [0088-0090]).
Therefore, it would have been obvious to combine Kreuchauf, Yahya, and Byun to obtain the invention as specified in the instant claim.
Allowable Subject Matter
Claims 10-12 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As to claim 10, the prior art of record does not appear to anticipated, explicitly teach, or fairly suggest the first storage interface configured to receive first data from the first processor, the second storage interface configured to receive second data from the second processor, and the interface controller is configured to determine a processing order of the first data and the second data based on respective communication speeds of the first storage interface and the second storage interface. Furthermore, it would not have been obvious to combine the above limitations with the remaining limitations of the claim. Claim 11 is directly dependent upon claim 10 and therefore distinct from the prior art.
As to claim 12, the prior art of record does not appear to anticipated, explicitly teach, or fairly suggest the first storage interface is configured to receive first data from the first processor, the second storage interface is configured to receive second data from the second processor, the fourth storage interface is configured to receive fourth data from the fourth processor, and the interface controller is configured to determine a processing order of the first data, the second data, and the fourth data based on respective communication speeds of the first storage interface, the second storage interface, and the fourth storage interface. Furthermore, it would not have been obvious to combine the above limitations with the remaining limitations of the claim.
As to claim 18, the prior art of record does not appear to anticipated, explicitly teach, or fairly suggest the first storage interface is configured to receive first data from the first processor, the second storage interface is configured to receive second data from the second processor, and the interface controller is configured to determine a processing order of the first data and the second data based on respective communication speeds of the first storage interface and the second storage interface. Furthermore, it would not have been obvious to combine the above limitations with the remaining limitations of the claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The US Pub. No. 2021/0373799 of Yan et al. relates to a storage device with a plurality of interfaces and sequencing data storage from the different interfaces. The US Pub. No. 2021/0263673 of Norman et al. is pertinent to a storage system interconnecting a plurality of processors and memory interfaces.
The examiner has cited particular column, line, and/or paragraph numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in its entirety as potentially teaching of all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c).
Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(11) and Interview Practice for additional details.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T OBERLY whose telephone number is (571)272-6991. The examiner can normally be reached on M-F 800am-430pm (MT).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached on (571) 272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Center. For more information about the Patent Center, see https://patentcenter.uspto.gov/. Should you have questions on access to the Patent Center system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ERIC T OBERLY/ Primary Examiner, Art Unit 2184