Prosecution Insights
Last updated: October 02, 2026
Application No. 18/908,323

STORAGE DEVICE CONTROL METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM

Non-Final OA §103
Filed
Oct 07, 2024
Priority
Dec 01, 2023 — CN 202311642674.7
Examiner
WOOD, WILLIAM C
Art Unit
Tech Center
Assignee
Beijing Volcano Engine Technology Co., Ltd.
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
274 granted / 367 resolved
+14.7% vs TC avg
Strong +21% interview lift
Without
With
+21.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
12 currently pending
Career history
387
Total Applications
across all art units

Statute-Specific Performance

§101
9.4%
-30.6% vs TC avg
§103
67.5%
+27.5% vs TC avg
§102
6.1%
-33.9% vs TC avg
§112
12.9%
-27.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 367 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 2. This Office Action is sent in response to Applicant’s Communication received 10/7/2024 for application number 18/908,323. The Office hereby acknowledges receipt of the following and placed of record in file: Specification, Drawings, Abstract, Oath/Declaration, claims. 3. Claims 1 – 20 are presented for examination. Claim Rejections - 35 USC § 103 4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 5. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 6. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 7. Claims 1, 2, 11, 12, 15, 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (U.S. Publication 2025/0390358) (Zhang hereinafter) in view of Xu et al. (U.S. 2025/0123986) (Xu hereinafter). 8. As per claim 1, Zhang teaches a storage device control method, comprising: obtaining virtualization mapping information of a target physical device, wherein the virtualization mapping information is used to implement a pass-through connection between a virtual machine client and the target physical device [“virtual machine memory mapping management component, configured to manage a mapping relationship between a memory address inside the virtual machine and a memory address on the host, so that an application software inside the virtual machine does not need to be aware of a virtualization layer when running,” ¶ 0075; “the host 110 includes a virtual machine, where the virtual device is configured to acquire the storage task from a memory address which is negotiated with the virtual machine of the host according to the memory address,” ¶ 0066, Fig. 2], and the target physical device is a storage device that is mounted on a virtual machine host corresponding to the virtual machine client [“a single physical storage device can be virtualized into multiple virtual devices, and the virtual devices can be mounted in multiple virtual machines of the host, so that multi-tenants can share access to the physical devices in the cloud,” ¶ 0064]; and operating, based on the virtualization mapping information, the target physical device in response to a first operation request for a target virtual device to obtain an operation result, wherein the target virtual device is a virtualization device corresponding to the target physical device and created in the virtual machine client [“The hardware offload card 102 is configured to receive a storage task from the host 110, execute the storage task, and send a data access request corresponding to the storage task to the storage device 104,” ¶ 0039; “send a data access request corresponding to the storage task to the storage device to enable the storage device to transmit storage data corresponding to the data access request based on a transmission channel between the host and the storage device,” ¶ 0079]. Zhang does not explicitly disclose but Xu discloses by accessing an extended base address register space [“The memory mapping module may be realized by a physical function (PF)/virtual function (VF) module of the PCI device manager. The device manager and the host can access each other's physical address space of a memory through the PCI base address register (BAR) space, and the device memory of the device manager is mapped to the physical memory address space of the host, which is equivalent to realizing the routing of accessing the device memory,” ¶ 0054]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang and Xu available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang to include the capability of memory mapping as disclosed by Xu, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource. 9. As per claim 2, Zhang and Xu teach the method according to claim 1. Xu further teaches wherein the obtaining virtualization mapping information of a target physical device by accessing an extended base address register space comprises: obtaining an extended base address register identifier of the target virtual device; and accessing the extended base address register space of the target virtual device based on the extended base address register identifier, to obtain the virtualization mapping information [“The memory mapping module may be realized by a physical function (PF)/virtual function (VF) module of the PCI device manager. The device manager and the host can access each other's physical address space of a memory through the PCI base address register (BAR) space, and the device memory of the device manager is mapped to the physical memory address space of the host, which is equivalent to realizing the routing of accessing the device memory,” ¶ 0054; realizing the routing of accessing the device memory suggests an identifier used to obtain mapping information]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang and Xu available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang to include the capability of memory mapping as disclosed by Xu, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource. 10. As per claim 11, Zhang and Xu teach the method according to claim 1. Zhang further teaches wherein the operating, based on the virtualization mapping information, the target physical device in response to a first operation request for a target virtual device, to obtain an operation result comprises: converting, based on the virtualization mapping information, the first operation request into a second operation request for the target physical device; and sending the second operation request to the target physical device, to operate the target physical device and obtain the operation result returned by the target physical device [“The hardware offload card 102 is configured to receive a storage task from the host 110, execute the storage task, and send a data access request corresponding to the storage task to the storage device 104,” ¶ 0039; “send a data access request corresponding to the storage task to the storage device to enable the storage device to transmit storage data corresponding to the data access request based on a transmission channel between the host and the storage device,” ¶ 0079; storage task mapped to first operation request, data access request mapped to second operation request]. 11. As per claim 12, Zhang and Xu teach the method according to claim 2. Zhang further teaches wherein the operating, based on the virtualization mapping information, the target physical device in response to a first operation request for a target virtual device, to obtain an operation result comprises: converting, based on the virtualization mapping information, the first operation request into a second operation request for the target physical device; and sending the second operation request to the target physical device, to operate the target physical device and obtain the operation result returned by the target physical device [“The hardware offload card 102 is configured to receive a storage task from the host 110, execute the storage task, and send a data access request corresponding to the storage task to the storage device 104,” ¶ 0039; “send a data access request corresponding to the storage task to the storage device to enable the storage device to transmit storage data corresponding to the data access request based on a transmission channel between the host and the storage device,” ¶ 0079; storage task mapped to first operation request, data access request mapped to second operation request]. 12. As per claim 15, Zhang and Xu teach the method according to claim 11. Zhang further teaches wherein the virtualization mapping information comprises first mapping information, and the first mapping information is used to represent a mapping relationship between a direct memory access address of operation data in the virtual machine client and a direct memory access address of the operation data in the virtual machine host [“virtual machine memory mapping management component, configured to manage a mapping relationship between a memory address inside the virtual machine and a memory address on the host, so that an application software inside the virtual machine does not need to be aware of a virtualization layer when running,” ¶ 0075; “the data transmission between the host and the storage device avoids overhead such as memory copying by directly accessing the virtual machine memory through DMA. Specifically, the host includes a virtual machine, and a memory is arranged in the virtual machine. The data transmitted between the host and the storage device can be placed in the memory of the virtual machine. The transmission channel between the host and the storage device is a DMA transmission channel. The storage device is configured to directly access a memory of the virtual machine through DMA to transmit the storage data corresponding to the data access request,” ¶ 0071] and the converting, based on the virtualization mapping information, the first operation request into a second operation request for the target physical device comprises: obtaining a first direct memory access address of target operation data corresponding to the first operation request; obtaining, based on the first mapping information, a second direct memory access address corresponding to the first direct memory access address; and generating the second operation request based on the second direct memory access address [“The secure IOMMU 105 is a component of the virtualization computing environment 100 configured to translate device-visible virtual memory addresses to physical memory addresses and to connect the I/O device 160 to a DMA bus with the virtual machine 150. The secure IOMMU 105 can provide functionalities such as DMA remapping functionality that manipulates address translations for the I/O device 160 and interrupt remapping functionality that route interrupts of the I/O device 160 to the corresponding virtual machine 150,” ¶ 0033; DMA remapping via address manipulations suggests generation of multiple operation requests]. 13. As per claim 19, it is a device claim having similar limitations as cited in claim 1. Thus, claim 19 is also rejected under the same rationale as cited in the rejection of claim 1 above. 14. As per claim 20, it is a media claim having similar limitations as cited in claim 1. Thus, claim 20 is also rejected under the same rationale as cited in the rejection of claim 1 above. 15. Claims 3 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang and Xu in further view of Holm et al. (U.S. 2002/0152335) (Holm hereinafter). 16. As per claim 3, Zhang and Xu teach the method according to claim 2. Zhang and Xu do not explicitly disclose but Holm discloses wherein the accessing the extended base address register space of the target virtual device based on the extended base address register identifier, to obtain the virtualization mapping information comprises: calling an input/output remapping method by using the extended base address register identifier as an input parameter, to obtain an address of the extended base address register space of the target virtual device; and accessing the address of the extended base address register space to obtain the virtualization mapping information [“The exemplary embodiment also creates a table containing the pseudonym address range for the base address registers (BAR) of each device that associates these pseudonym addresses with the operating system device structure, which then further contains the parameters required to reference the actual hardware memory addresses for these spaces through hypervisor program calls,” ¶ 0121]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Holm available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of memory mapping via parameters as disclosed by Holm, thereby providing a mechanism to enhance system efficiency by utilizing a centralized, indexed system resource. 17. As per claim 13, Zhang, Xu and Holm teach the method according to claim 3. Zhang further teaches wherein the operating, based on the virtualization mapping information, the target physical device in response to a first operation request for a target virtual device, to obtain an operation result comprises: converting, based on the virtualization mapping information, the first operation request into a second operation request for the target physical device; and sending the second operation request to the target physical device, to operate the target physical device and obtain the operation result returned by the target physical device [“The hardware offload card 102 is configured to receive a storage task from the host 110, execute the storage task, and send a data access request corresponding to the storage task to the storage device 104,” ¶ 0039; “send a data access request corresponding to the storage task to the storage device to enable the storage device to transmit storage data corresponding to the data access request based on a transmission channel between the host and the storage device,” ¶ 0079; storage task mapped to first operation request, data access request mapped to second operation request]. 18. Claims 4 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang and Xu in further view of Kjos et al. (U.S. 2008/0005297) (Kjos hereinafter). 19. As per claim 4, Zhang and Xu teach the method according to claim 2. Zhang and Xu do not explicitly disclose but Kjos discloses wherein before the obtaining an extended base address register identifier of the target virtual device, the method further comprises: creating the target virtual device by calling a device driver of the target physical device, wherein an extended base address register identifier of the target virtual device is set in the device driver; and the obtaining an extended base address register identifier of the target virtual device comprises: obtaining the extended base address register identifier of the target virtual device based on the device driver or the target virtual device [“The host controls the host physical address space, so that guests are not typically allowed to program the actual memory-mapped I/O addresses to which a device can respond. When the guest programs the base MMIO address for a device into a PCI Configuration Base Address Register (BAR), the PCI Configuration Driver 214 tracks the guest's settings but does not modify the actual BAR settings in hardware. When the guest attempts to access the MMIO address range for the first time, the Virtual I/O Map Driver 218 attempts to find the device associated with the given GPA and, upon finding the value in a virtual BAR register, creates a mapping between the guest's address and the value in the physical BAR register of the device. Thus, independent of guest operation, the emulation substitutes the GPA with the HPA for the device,” ¶ 0121]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Kjos available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of device virtualization as disclosed by Kjos, thereby providing a mechanism to enhance system efficiency by utilizing a centralized, indexed system resource to virtualize a physical device. 20. As per claim 14, Zhang, Xu and Kjos teach the method according to claim 4. Zhang further teaches wherein the operating, based on the virtualization mapping information, the target physical device in response to a first operation request for a target virtual device, to obtain an operation result comprises: converting, based on the virtualization mapping information, the first operation request into a second operation request for the target physical device; and sending the second operation request to the target physical device, to operate the target physical device and obtain the operation result returned by the target physical device [“The hardware offload card 102 is configured to receive a storage task from the host 110, execute the storage task, and send a data access request corresponding to the storage task to the storage device 104,” ¶ 0039; “send a data access request corresponding to the storage task to the storage device to enable the storage device to transmit storage data corresponding to the data access request based on a transmission channel between the host and the storage device,” ¶ 0079; storage task mapped to first operation request, data access request mapped to second operation request]. 21. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang, Xu, Holm and Kjos. 22. As per claim 5, Zhang, Xu and Holm teach the method according to claim 3. Zhang, Xu and Holm do not explicitly disclose but Kjos discloses wherein before the obtaining an extended base address register identifier of the target virtual device, the method further comprises: creating the target virtual device by calling a device driver of the target physical device, wherein an extended base address register identifier of the target virtual device is set in the device driver; and the obtaining an extended base address register identifier of the target virtual device comprises: obtaining the extended base address register identifier of the target virtual device based on the device driver or the target virtual device [“The host controls the host physical address space, so that guests are not typically allowed to program the actual memory-mapped I/O addresses to which a device can respond. When the guest programs the base MMIO address for a device into a PCI Configuration Base Address Register (BAR), the PCI Configuration Driver 214 tracks the guest's settings but does not modify the actual BAR settings in hardware. When the guest attempts to access the MMIO address range for the first time, the Virtual I/O Map Driver 218 attempts to find the device associated with the given GPA and, upon finding the value in a virtual BAR register, creates a mapping between the guest's address and the value in the physical BAR register of the device. Thus, independent of guest operation, the emulation substitutes the GPA with the HPA for the device,” ¶ 0121]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu, Holm and Kjos available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang, Xu and Holm to include the capability of device virtualization as disclosed by Kjos, thereby providing a mechanism to enhance system efficiency by utilizing a centralized, indexed system resource to virtualize a physical device. 23. Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang and Xu in further view of Schiattarella et al. (U.S. 2022/0067221) (Schiattarella hereinafter). 24. As per claim 6, Zhang and Xu teach the method according to claim 1. Zhang and Xu do not explicitly disclose but Schiattarella discloses wherein the method further comprises: receiving a configuration instruction sent by the virtual machine host, wherein the configuration instruction comprises the virtualization mapping information; and writing, in response to the configuration instruction, the virtualization mapping information into the extended base address register space of the target virtual device [“The PCIe MAC 316 may support a mechanism or a scheme to map resources available at the I/O device to memory-mapped control regions associated with the virtual I/O devices using a pool of configurable PCIe Base Address Registers (BARs) maps coupled with a resource mapping table in the form of VF BAR maps 314 to store mapping information for the virtual I/O devices. The I/O resources provided by the system 300 may be mapped to host addresses,” ¶ 0075]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Schiattarella available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of managing device access as disclosed by Schiattarella, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource to virtualize multiple physical devices. 25. As per claim 7, Zhang and Xu teach the method according to claim 2. Zhang and Xu do not explicitly disclose but Schiattarella discloses wherein the method further comprises: receiving a configuration instruction sent by the virtual machine host, wherein the configuration instruction comprises the virtualization mapping information; and writing, in response to the configuration instruction, the virtualization mapping information into the extended base address register space of the target virtual device [“The PCIe MAC 316 may support a mechanism or a scheme to map resources available at the I/O device to memory-mapped control regions associated with the virtual I/O devices using a pool of configurable PCIe Base Address Registers (BARs) maps coupled with a resource mapping table in the form of VF BAR maps 314 to store mapping information for the virtual I/O devices. The I/O resources provided by the system 300 may be mapped to host addresses,” ¶ 0075]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Schiattarella available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of managing device access as disclosed by Schiattarella, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource to virtualize multiple physical devices. 26. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang, Xu, Holm and Schiattarella. 27. As per claim 8, Zhang, Xu and Holm teach the method according to claim 3. Zhang, Xu and Holm do not explicitly disclose but wherein the method further comprises: receiving a configuration instruction sent by the virtual machine host, wherein the configuration instruction comprises the virtualization mapping information; and writing, in response to the configuration instruction, the virtualization mapping information into the extended base address register space of the target virtual device [“The PCIe MAC 316 may support a mechanism or a scheme to map resources available at the I/O device to memory-mapped control regions associated with the virtual I/O devices using a pool of configurable PCIe Base Address Registers (BARs) maps coupled with a resource mapping table in the form of VF BAR maps 314 to store mapping information for the virtual I/O devices. The I/O resources provided by the system 300 may be mapped to host addresses,” ¶ 0075]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu, Holm and Schiattarella available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang, Xu and Holm to include the capability of managing device access as disclosed by Schiattarella, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource to virtualize multiple physical devices. 28. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang, Xu, Kjos and Schiattarella. 29. As per claim 9, Zhang, Xu and Kjos teach the method according to claim 4. Zhang, Xu and Kjos do not explicitly disclose but Schiattarella discloses wherein the method further comprises: receiving a configuration instruction sent by the virtual machine host, wherein the configuration instruction comprises the virtualization mapping information; and writing, in response to the configuration instruction, the virtualization mapping information into the extended base address register space of the target virtual device [“The PCIe MAC 316 may support a mechanism or a scheme to map resources available at the I/O device to memory-mapped control regions associated with the virtual I/O devices using a pool of configurable PCIe Base Address Registers (BARs) maps coupled with a resource mapping table in the form of VF BAR maps 314 to store mapping information for the virtual I/O devices. The I/O resources provided by the system 300 may be mapped to host addresses,” ¶ 0075]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu, Kjos and Schiattarella available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang, Xu and Kjos to include the capability of managing device access as disclosed by Schiattarella, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource to virtualize multiple physical devices. 30. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang, Xu, Holm, Kjos and Schiattarella. 31. As per claim 10, Zhang, Xu, Holm and Kjos teach the method according to claim 5. Zhang, Xu, Holm and Kjos do not explicitly disclose but Schiattarella discloses wherein the method further comprises: receiving a configuration instruction sent by the virtual machine host, wherein the configuration instruction comprises the virtualization mapping information; and writing, in response to the configuration instruction, the virtualization mapping information into the extended base address register space of the target virtual device [“The PCIe MAC 316 may support a mechanism or a scheme to map resources available at the I/O device to memory-mapped control regions associated with the virtual I/O devices using a pool of configurable PCIe Base Address Registers (BARs) maps coupled with a resource mapping table in the form of VF BAR maps 314 to store mapping information for the virtual I/O devices. The I/O resources provided by the system 300 may be mapped to host addresses,” ¶ 0075]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu, Kjos and Schiattarella available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang, Xu and Kjos to include the capability of managing device access as disclosed by Schiattarella, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource to virtualize multiple physical devices. 32. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang and Xu in further view of Tsai et al. (U.S. Publication 2011/0119455) (Tsai hereinafter). 33. As per claim 16, Zhang and Xu teach the method according to claim 15. Zhang and Xu do not explicitly disclose but Tsai discloses wherein the virtualization mapping information comprises second mapping information, and the second mapping information is used to represent a mapping relationship between a logical block address of the virtual device and a logical block address of the physical device; and the method further comprises: obtaining a first logical block address of the target virtual device; and obtaining a second logical block address of the target physical device based on the second mapping information, wherein the generating the second operation request based on the second direct memory access address comprises: generating the second operation request based on the second direct memory access address and the second logical block address [“The new non-data command includes certain parameters, such as initial LBA, target LBA, move count, move type, and command code. The initial LBA is to replace the conventional Read DMA (Direct Memory Access) command, and specifies the logical block address of a source block. The target LBA is to replace the conventional Write DMA command, and specifies the logical block address of a target block. The move count defines the number of blocks to be moved internally. The move type specifies if the command is an internal data swap command (e.g., Type =0) or an internal data move with auto-free command (e.g., Type =1),” ¶ 0030; memory move mapped to operation request, initial and target LBA mapped to first and second logical block addresses]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Tsai available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of managing device access using an address mapping table as disclosed by Tsai, thereby providing a mechanism to enhance system efficiency by utilizing a centralized system resource to access target devices via logical block addresses. 34. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang and Xu in further view of Maroney (U.S. Publication 2024/0378073) (Maroney hereinafter). 35. As per claim 17, Zhang and Xu teach the method according to claim 15. Zhang and Xu do not explicitly disclose but Maroney discloses wherein the first mapping information comprises input/output memory management unit address mapping; and the obtaining, based on the first mapping information, a second direct memory access address corresponding to the first direct memory access address comprises: generating virtual input/output memory management unit address mapping based on the input/output memory management unit address mapping; and obtaining the second direct memory access address corresponding to the first direct memory access address based on the virtual input/output memory management unit address mapping [“the memory sub-system may use hardware-assisted virtualization techniques, such as input/output memory management units (IOMMUs) or direct memory access (DMA) remapping, for creating multiple virtual instances of the physical device, each of which can be assigned to a different virtual machine. One of the benefits of using IOMMUs is that they provide memory protection and isolation for input/output operations,” ¶ 0018; DMA remapping suggests correspondence between first and second DMAs]. It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Maroney available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of managing scalable virtualization as disclosed by Maroney, thereby providing a mechanism to enhance system efficiency by creating multiple virtual instances of a physical device. 36. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang and Xu in further view of Hoppert (U.S. Publication 2018/0189090) (Hoppert hereinafter). 37. As per claim 18, Zhang and Xu teach the method according to claim 11. Zhang and Xu do not explicitly disclose but Hoppert discloses wherein the virtualization mapping information comprises third mapping information, and the third mapping information is used to represent a mapping relationship between a queue identifier of the physical device and a queue identifier of the virtual device; and the method further comprises: obtaining a first queue identifier of a target virtual read/write submission queue corresponding to the first operation request; and obtaining a second queue identifier of a physical read/write submission queue of the target physical device based on the third mapping information and the first queue identifier, wherein the sending the second operation request to the target physical device, to operate the target physical device and obtain the operation result returned by the target physical device comprises: determining a target physical read/write submission queue of the target physical device based on the second queue identifier; sending the second operation request to the target physical read/write submission queue of the target physical device; and after the target physical read/write submission queue responds to the second operation request, receiving an operation result returned by a target physical read/write completion queue of the target physical device, and storing the operation result in a virtual read/write completion queue corresponding to the virtual read/write submission queue [“At 410, input and output of the virtual devices is mapped to respective input and output of the data I/O hardware work queues. By way of example, the input 310 and the output 312 of the virtual device 302 are mapped to respective input and output of the data I/O hardware work queues of the corresponding physical device. This is used to form a data structure capable of being stored and updated to indicate the mapping, such as the virtual device I/O to hardware work queue mapping 208 (VD I/O to HW work queue mapping 208). The VD I/O to HW work queue mapping 208 is referenced to relay data input to the input 310 by the virtual machines 110 to a data I/O hardware work queue, such as the hardware work queue 204 of the device A. Similarly, the VD I/O to HW work queue mapping 208 is referenced to relay data output by the physical device as a result of furnishing its functionality to the output 312 of the virtual device 302,” ¶ 0052; It would have been obvious to one of ordinary skill in the art, having the teachings of Zhang, Xu and Hoppert available before the effective filing date of the claimed invention, to modify the capability of virtualizing system hardware resources as taught by Zhang and Xu to include the capability of managing work queues as virtual devices as disclosed by Hoppert, thereby providing a mechanism to enhance system efficiency by creating multiple virtual instances of a physical device via queueing mechanisms. Conclusion 38. Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM C WOOD whose telephone number is (571)272-5285. The examiner can normally be reached Monday - Friday, 8:00 am - 4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chat C Do can be reached at 571-272-3721. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM C WOOD/Examiner, Art Unit 2193 /Chat C Do/Supervisory Patent Examiner, Art Unit 2193
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Prosecution Timeline

Oct 07, 2024
Application Filed
Sep 24, 2026
Non-Final Rejection mailed — §103 (current)

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Patent 12626099
Using Deep Learning Models to Obfuscate and Optimize Communications
3y 3m to grant Granted May 12, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
96%
With Interview (+21.0%)
2y 10m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 367 resolved cases by this examiner. Grant probability derived from career allowance rate.

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