CTNF 18/909,094 CTNF 87557 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Drawings 06-36 AIA The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the insulating layer that contacts the base electrode layer in the first and second band portions as required by claim 5 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 18, and their depending claims are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1 and 18 require the insulating layer to be disposed on the first and second band portions which are positioned on the first surface. However, claims 1 and 18 require the insulating layer to be disposed on the second surface. The claim will be examined as the insulating layer is disposed on the first surface. Note that this is consistent with Figures 1 and 2 of the Drawings of the Instant Specification. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-10 and 17-20 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Tozawa et al. (US Publication 2018/0337001) . In re claim 1, Tozawa discloses a multilayer electronic component, comprising: a body (1 – Figure 1, Figure 4, ¶55) including a dielectric layer (4 – Figure 3, ¶59-60) and first and second internal electrodes (21, 22 – Figure 3, ¶62) alternately disposed with the dielectric layer interposed therebetween (Figure 3), the body having first and second surfaces (1a, 1b – Figure 1, ¶56) opposing each other in a first direction (D1 – Figure 1), third and fourth surfaces (1c, 1d – Figure 1, Figure 4, ¶56) connected to the first and second surfaces and opposing each other in a second direction (D2 – Figure 1, Figure 4), and fifth and sixth surfaces (1d, 1e – Figure 1, ¶56) connected to the first to fourth surfaces and opposing each other in a third direction (D3 – Figure 1); a first external electrode (11 – Figure 4, ¶55) including a first connection portion (portion of 11 on 1c – Figure 4) disposed on the third surface (1c – Figure 4), and a first band portion (portion of 11 extending to 1a – Figure 4) extending from the first connection portion to a portion of the first surface (1a – Figure 4; Note that the Examiner is taking the ridge portion to be part of 1a.); a second external electrode (12 – Figure 4, ¶55) including a second connection portion (portion of 12 on 1d – Figure 4) disposed on the fourth surface (1d – Figure 4), and a second band portion (portion of 121 extending to 1a – Figure 4) extending from the second connection portion to a portion of the first surface (1a – Figure 4; Note that the Examiner is taking the ridge portion to be part of 1a.); and an insulating layer (I – Figure 4, ¶96) disposed on the first surface (1a – Figure 4) to extend onto the first and second band portions (Figure 4), wherein the first and second external electrodes include an electrode layer (E1, E2– Figure 4, ¶97-98) and a plating layer (E3, E4 – Figure 4, ¶91-92) disposed on the electrode layer (Figure 4), and the insulating layer (I – Figure 4) is in contact with the electrode layer (E1 – Figure 4) in the first and second band portions and is disposed to cover an end of the electrode layer (Figure 4; Note that the Examiner is taking the ridge portion to be part of surface 1a.). In re claim 2, Tozawa discloses the multilayer electronic component of claim 1, as explained above. Tozawa further discloses wherein an end of the insulating layer (I – Figure 4) is in contact with an end of the plating layer (E3, E4 – Figure 4) in the first and second band portions (portion of 11, 12 on 1a – Figure 4). In re claim 3, Tozawa discloses the multilayer electronic component of claim 1, as explained above. Tozawa further discloses wherein the electrode layer comprises a base electrode layer (E1 – Figure 4) disposed to be in contact with the body (1 – Figure 1, Figure 4) and a conductive resin layer (E2 – Figure 4, ¶90) disposed on the base electrode layer and including a conductive metal and a resin (¶90). In re claim 4, Tozawa discloses the multilayer electronic component of claim 3, as explained above. Tozawa further discloses wherein the conductive resin layer (E2 – Figure 4) is disposed to cover the base electrode layer (E1 – Figure 4). In re claim 5, Tozawa discloses the multilayer electronic component of claim 3, as explained above. Tozawa further discloses wherein an end of the insulating layer (I – Figure 4) is disposed to contact the base electrode layer (E1 – Figure 4) in the first and second band portions (portions of 11, 12 on 1a – Figure 4; Note that the Examiner is taking the ridge portion to be part of surface 1a.). In re claim 6, Tozawa discloses the multilayer electronic component of claim 3, as explained above. Tozawa further discloses wherein an end of the insulating layer (I – Figure 4) is in contact with an end of the plating layer (E3, E4 – Figure 4) on the conductive resin layer (E2 – Figure 4) of the first and second band portions (portions of 11, 12 on 1a – Figure 4). In re claim 7, Tozawa discloses the multilayer electronic component of claim 3, as explained above. Tozawa further discloses wherein the base electrode layer (E1 – Figure 4) comprises glass (¶89). In re claim 8, Tozawa discloses the multilayer electronic component of claim 3, as explained above. Tozawa further discloses wherein the insulating layer (I – Figure 4) comprises a resin (¶101). In re claim 9, Tozawa discloses the multilayer electronic component of claim 8, as explained above. Tozawa further discloses wherein the resin included in the insulating layer is at least one of an epoxy resin, a silicone resin, a fluorine resin, an acrylic resin, and ethyl cellulose (¶101). In re claim 10, Tozawa discloses the multilayer electronic component of claim 8, as explained above. Tozawa further discloses wherein the resin included in the insulating layer is the same type as the resin included in the conductive resin layer (¶90, ¶101; Note that both layers may include epoxy resin.). In re claim 17, Tozawa discloses the multilayer electronic component of claim 1, as explained above. Tozawa further discloses wherein an end of the insulating layer (I- Figure 4) is in contact with an end of the plating layer (E3, E4 – Figure 4) in the first and second band portions (Figure 4), and a step is formed in a region in which the end of the insulating layer and the end of the plating layer are in contact with each other (Figure 4; Note that the step formation is the change in elevation between the plating layer and the insulation layer shown in Figure 4.). In re claim 18, Tozawa discloses a multilayer electronic component, comprising: a body (1 – Figure 1, Figure 4, ¶55) including a dielectric layer (4 – Figure 3, ¶59-60) and first and second internal electrodes (21, 22 – Figure 3, ¶62) alternately disposed with the dielectric layer interposed therebetween (Figure 3), the body having first and second surfaces (1a, 1b – Figure 1, ¶56) opposing each other in a first direction (D1 – Figure 1), third and fourth surfaces (1c, 1d – Figure 1, Figure 4, ¶56) connected to the first and second surfaces and opposing each other in a second direction (D2 – Figure 1, Figure 4), and fifth and sixth surfaces (1d, 1e – Figure 1, ¶56) connected to the first to fourth surfaces and opposing each other in a third direction (D3 – Figure 1); a first external electrode (11 – Figure 4, ¶55) including a first connection portion (portion of 11 on 1c – Figure 4) disposed on the third surface (1c – Figure 4), and a first band portion (portion of 11 extending to 1a – Figure 4) extending from the first connection portion to a portion of the first surface (1a – Figure 4; Note that the Examiner is taking the ridge portion to be part of 1a.); a second external electrode (12 – Figure 4, ¶55) including a second connection portion (portion of 12 on 1d – Figure 4) disposed on the fourth surface (1d – Figure 4), and a second band portion (portion of 121 extending to 1a – Figure 4) extending from the second connection portion to a portion of the first surface (1a – Figure 4; Note that the Examiner is taking the ridge portion to be part of 1a.); and an insulating layer (I – Figure 4, ¶96) disposed on the first surface (1a – Figure 4) to extend onto the first and second band portions to partially cover the first and second band portions (Figure 4; Note that the insulating layer covers the band portion in the D1 direction.), wherein the first and second external electrodes include a plating layer (E3, E4 – Figure 4) extending in a partial region of the first and second band portions (Figure 4; Note that since the plating layer extends in the full region, it also extends in a partial region.) In re claim 19, Tozawa discloses the multilayer electronic component of claim 18, as explained above. Tozawa further discloses wherein an end of the insulating layer (I – Figure 4) is in contact with an end of the plating layer (E3, E4 – Figure 4) in the first and second band portions (portion of 11, 12 on 1a – Figure 4). In re claim 20, Tozawa discloses the multilayer electronic component of claim 18, as explained above. Tozawa further discloses wherein the insulating layer (I – Figure 4) comprises a resin (¶101) . 07-15-03-aia AIA Claim(s) 1-7, 11-13, 18-19, 21-23, and 25 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kato et al. (US Publication 2025/0132094) . In re claim 1, Kato discloses a multilayer electronic component, comprising: a body (3 – Figure 1, Figure 2, ¶89) including a dielectric layer (¶83, Figure 2) and first and second internal electrodes (7, 9 – Figure 2, ¶117) alternately disposed with the dielectric layer interposed therebetween (Figure 3), the body having first and second surfaces (3a, 3b – Figure 2, ¶89) opposing each other in a first direction (D1 – Figure 1), third and fourth surfaces (3e – Figure 1, Figure 2, ¶89) connected to the first and second surfaces and opposing each other in a second direction (D2 – Figure 1, Figure 2), and fifth and sixth surfaces (3c, 3d – Figure 1, ¶89) connected to the first to fourth surfaces and opposing each other in a third direction (D3 – Figure 1); a first external electrode (left 5 – Figure 1, Figure 2, ¶89) including a first connection portion (left 5e – Figure 1, Figure 2, ¶90) disposed on the third surface (left 3e – Figure 2), and a first band portion (left 5a – Figure 2, ¶90) extending from the first connection portion to a portion of the first surface (3a – Figure 2); a second external electrode (right 5 – Figure 2) including a second connection portion (right 5e – Figure 2) disposed on the fourth surface (right 3e – Figure 2), and a second band portion (right 5a – Figure 2) extending from the second connection portion to a portion of the first surface (3a – Figure 2); and an insulating layer (EIa – Figure 2) disposed on the first surface (3a – Figure 2) to extend onto the first and second band portions (Figure 2), wherein the first and second external electrodes include an electrode layer (E1, E2– Figure 4, ¶97-98) and a plating layer (E3 – Figure 4, ¶91) disposed on the electrode layer (Figure 4), and the insulating layer (EIa – Figure 2, ¶86) is in contact with the electrode layer in the first and second band portions (5a – Figure 2) and is disposed to cover an end of the electrode layer (Figure 2; Note that the Examiner is taking the portions of 5 adjacent to 3 to be ‘an end’.). In re claim 2, Kato discloses the multilayer electronic component of claim 1, as explained above. Kato further discloses wherein an end of the insulating layer (EIa – Figure 2) is in contact with an end of the plating layer (E3 – Figure 2, ¶113) in the first and second band portions (5a – Figure 2). In re claim 3, Kato discloses the multilayer electronic component of claim 1, as explained above. Kato further discloses wherein the electrode layer comprises a base electrode layer (E1 – Figure 2, ¶91) disposed to be in contact with the body (3 – Figure 1) and a conductive resin layer (E2 – Figure 2, ¶91) disposed on the base electrode layer and including a conductive metal and a resin (¶112). In re claim 4, Kato discloses the multilayer electronic component of claim 3, as explained above. Kato further discloses wherein the conductive resin layer (E2 – Figure 2) is disposed to cover the base electrode layer (E1 – Figure 2). In re claim 5, Kato discloses the multilayer electronic component of claim 3, as explained above. Kato further discloses wherein an end of the insulating layer (EIa – Figure 2) is disposed to contact the base electrode layer (E1 – Figure 2) in the first and second band portions (5a – Figure 1). In re claim 6, Kato discloses the multilayer electronic component of claim 3, as explained above. Kato further discloses wherein an end of the insulating layer (EIa – Figure 2) is in contact with an end of the plating layer (E3 – Figure 2) on the conductive resin layer (E2 – Figure 2) of the first and second band portions (5a – Figure 2). In re claim 7, Kato discloses the multilayer electronic component of claim 3, as explained above. Kato further discloses wherein the base electrode layer (E1 – Figure 2) comprises glass (¶111). In re claim 11, Kato discloses the multilayer electronic component of claim 1, as explained above. Kato further discloses wherein the insulating layer comprises a ceramic material (¶88). In re claim 12, Kato discloses the multilayer electronic component of claim 11, as explained above. Kato further discloses wherein the ceramic material included in the insulating layer is at least one of TiO 2 , BaTiO 3 , Al 2 O 3 , BaO, (PbZr x Ti 1-x O 3 ) (0<x<1), SiC, MgO, and SiO 2 (¶88). In re claim 13, Kato discloses the multilayer electronic component of claim 1, as explained above. Kato further discloses wherein, La1>Lb1 is satisfied, in which La1 is an average length from a distal end of the first band portion (left 5a – Figure 2) to an extension line of the third surface (left 3e – Figure 2) in the second direction (D2 – Figure 1, Figure 2), and Lb1 is an average length from the distal end of the first band portion to a distal end of the insulating layer (left end of E1a – Figure 2) disposed on the first external electrode (left 5a – Figure 2) in the second direction (Figure 2). In re claim 18, Kato discloses a multilayer electronic component, comprising: a body (3 – Figure 1, Figure 2, ¶89) including a dielectric layer (¶83, Figure 2) and first and second internal electrodes (7, 9 – Figure 2, ¶117) alternately disposed with the dielectric layer interposed therebetween (Figure 3), the body having first and second surfaces (3a, 3b – Figure 2, ¶89) opposing each other in a first direction (D1 – Figure 1), third and fourth surfaces (3e – Figure 1, Figure 2, ¶89) connected to the first and second surfaces and opposing each other in a second direction (D2 – Figure 1, Figure 2), and fifth and sixth surfaces (3c, 3d – Figure 1, ¶89) connected to the first to fourth surfaces and opposing each other in a third direction (D3 – Figure 1); a first external electrode (left 5 – Figure 1, Figure 2, ¶89) including a first connection portion (left 5e – Figure 1, Figure 2, ¶90) disposed on the third surface (left 3e – Figure 2), and a first band portion (left 5a – Figure 2, ¶90) extending from the first connection portion to a portion of the first surface (3a – Figure 2); a second external electrode (right 5 – Figure 2) including a second connection portion (right 5e – Figure 2) disposed on the fourth surface (right 3e – Figure 2), and a second band portion (right 5a – Figure 2) extending from the second connection portion to a portion of the first surface (3a – Figure 2); and an insulating layer (EIa – Figure 2) disposed on the first surface (3a – Figure 2) to extend onto the first and second band portions to partially cover the first and second band portions (Figure 2; Note that the insulating layer covers the band portion in the D1 direction.), wherein the first and second external electrodes include a plating layer (E3 – Figure 4, ¶91) extending in a partial region of the first and second band portions (Figure 4; Note that a ‘partial region’ does not preclude a ‘whole region’.), and In re claim 19, Kato discloses the multilayer electronic component of claim 18, as explained above. Kato further discloses wherein an end of the insulating layer (EIa – Figure 2) is in contact with an end of the plating layer (E3 – Figure 2, ¶113) in the first and second band portions (5a – Figure 2). In re claim 21, Kato discloses the multilayer electronic component of claim 18, as explained above. Kato further discloses wherein the insulating layer comprises a ceramic material (¶88). In re claim 22, Kato discloses the multilayer electronic component of claim 21, as explained above. Kato further discloses wherein the ceramic material included in the insulating layer is at least one of TiO 2 , BaTiO 3 , Al 2 O 3 , BaO, (PbZr x Ti 1-x O 3 ) (0<x<1), SiC, MgO, and SiO 2 (¶88). In re claim 23, Kato discloses the multilayer electronic component of claim 18, as explained above. Kato further discloses wherein, La1>Lb1 is satisfied, in which La1 is an average length from a distal end of the first band portion (left 5a – Figure 2) to an extension line of the third surface (left 3e – Figure 2) in the second direction (D2 – Figure 1, Figure 2), and Lb1 is an average length from the distal end of the first band portion to a distal end of the insulating layer (left end of E1a – Figure 2) disposed on the first external electrode (left 5a – Figure 2) in the second direction (Figure 2). In re claim 25, Kato discloses the multilayer electronic component of claim 18, as explained above. Kato further discloses wherein the insulating layer (EIa – Figure 5) and the plating layer (E3 – Figure 5) in the first and second band portions (5a – Figure 5) do not overlap with each other in the first direction (D1 – Figure 5). Note that the insulating layer still covers the band portions in the longitudinal direction (D2 in Figure 1) of the component . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 11-12, 15, and 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tozawa et al. (US Publication 2018/0337001) in view of Lee et al. (US Publication 2023/0215643) . In re claim 11, Tozawa discloses the multilayer electronic component of claim 1, as explained above. Tozawa further discloses the insulating layer (I – Figure 4) comprises resin (¶101). Tozawa does not disclose wherein the insulating layer comprises a ceramic material. Lee discloses an insulating layer (261 – Figure 28, ¶276) disposed on the body (110 – Figure 28, ¶74) of an electronic component comprises a ceramic material in addition to resin (¶276). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate an insulating material having improved bonding force (¶276: Lee). In re claim 12, Tozawa discloses the multilayer electronic component of claim 11, as explained above. Tozawa does not disclose wherein the ceramic material included in the insulating layer is at least one of TiO 2 , BaTiO 3 , Al 2 O 3 , BaO, (PbZr x Ti 1-x O 3 ) (0<x<1), SiC, MgO, and SiO 2 . Lee discloses wherein the ceramic material included in the insulating layer is at least one of TiO 2 , BaTiO 3 , Al 2 O 3 , BaO, (PbZr x Ti 1-x O 3 ) (0<x<1), SiC, MgO, and SiO 2 (¶276). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate an insulating material having improved bonding force (¶276: Lee). In re claim 15, Tozawa discloses the multilayer electronic component of claim 1, as explained above. Tozawa does not disclose wherein an average thickness of the plating layer is smaller than an average thickness of the insulating layer. Lee discloses wherein an average thickness of the plating layer that is in contact with an insulation layer is smaller than an average thickness of the insulating layer (¶230). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the insulating layer and plating layer thicknesses as described by Lee to reduce the contact area, and, thus, improve the overall bonding force of the multilayer electronic component (¶231: Lee). In re claim 21, Tozawa discloses the multilayer electronic component of claim 18, as explained above. Tozawa further discloses the insulating layer (I – Figure 4) comprises resin (¶101). Tozawa does not disclose wherein the insulating layer comprises a ceramic material. Lee discloses an insulating layer (261 – Figure 28, ¶276) disposed on the body (110 – Figure 28, ¶74) of an electronic component comprises a ceramic material in addition to resin (¶276). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate an insulating material having improved bonding force (¶276: Lee). In re claim 22, Tozawa discloses the multilayer electronic component of claim 21, as explained above. Tozawa does not disclose wherein the ceramic material included in the insulating layer is at least one of TiO 2 , BaTiO 3 , Al 2 O 3 , BaO, (PbZr x Ti 1-x O 3 ) (0<x<1), SiC, MgO, and SiO 2 . Lee discloses wherein the ceramic material included in the insulating layer is at least one of TiO 2 , BaTiO 3 , Al 2 O 3 , BaO, (PbZr x Ti 1-x O 3 ) (0<x<1), SiC, MgO, and SiO 2 (¶276). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate an insulating material having improved bonding force (¶276: Lee) . 07-21-aia AIA Claim (s) 14 and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kato et al. (US Publication 2025/0132094) in view of Jeong et al. (US Publication 2023/0215627) . In re claim 14, Kato discloses the multilayer electronic component of claim 13, as explained above. Kato does not disclose wherein the average lengths La1 and Lb1 satisfy 0.2≤Lb1/La1≤0.8. Jeong discloses that the relationship between the extension length of an insulating layer and the length of the band portions is correlated to the adhesion strength and ESR characteristics of the device (¶114). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the length of the insulation layer as described by Jeong to achieve a device having desired flexural strength, ESR characteristics, and manufacturing cost since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 205 USPQ 215 (CCPA 1980). In re claim 24, Kato discloses the multilayer electronic component of claim 23, as explained above. Kato does not disclose wherein the average lengths La1 and Lb1 satisfy 0.2≤Lb1/La1≤0.8. Jeong discloses that the relationship between the extension length of an insulating layer and the length of the band portions is correlated to the adhesion strength and ESR characteristics of the device (¶114). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the length of the insulation layer as described by Jeong to achieve a device having desired flexural strength, ESR characteristics, and manufacturing cost since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 205 USPQ 215 (CCPA 1980) . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Choi et al. (US Publication 2019/0189348) Figure 2 Fukumura (US Publication 2019/0131076) Figure 2 Ahn et al. (US Publication 2015/0124370) Figure 2 Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ARUN RAMASWAMY/Primary Examiner, Art Unit 2847 Application/Control Number: 18/909,094 Page 2 Art Unit: 2847 Application/Control Number: 18/909,094 Page 3 Art Unit: 2847 Application/Control Number: 18/909,094 Page 4 Art Unit: 2847 Application/Control Number: 18/909,094 Page 5 Art Unit: 2847 Application/Control Number: 18/909,094 Page 6 Art Unit: 2847 Application/Control Number: 18/909,094 Page 7 Art Unit: 2847 Application/Control Number: 18/909,094 Page 8 Art Unit: 2847 Application/Control Number: 18/909,094 Page 9 Art Unit: 2847 Application/Control Number: 18/909,094 Page 10 Art Unit: 2847 Application/Control Number: 18/909,094 Page 11 Art Unit: 2847 Application/Control Number: 18/909,094 Page 12 Art Unit: 2847 Application/Control Number: 18/909,094 Page 14 Art Unit: 2847 Application/Control Number: 18/909,094 Page 15 Art Unit: 2847 Application/Control Number: 18/909,094 Page 16 Art Unit: 2847
Prosecution Insights