Prosecution Insights
Last updated: October 02, 2026
Application No. 18/909,281

POWER AMPLIFICATION MODULE

Non-Final OA §102§112
Filed
Oct 08, 2024
Priority
Apr 12, 2022 — JP 2022-065875 +1 more
Examiner
KINKEAD, ARNOLD M
Art Unit
Tech Center
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1280 granted / 1403 resolved
+31.2% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
14 currently pending
Career history
1414
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
41.6%
+1.6% vs TC avg
§102
30.8%
-9.2% vs TC avg
§112
18.1%
-21.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1403 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 112 Claims 5 and 10-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 5, dependent from claim 3, recites the limitation "a third resistor" in line 2. There is insufficient antecedent basis for this limitation in the claim. This claim 5 should be dependent from claim 4 instead. Claim 10, dependent from claim 9, recites the limitation "a sixth transistor" in line 3. There is insufficient antecedent basis for this limitation in the claim. This claim 10 should be dependent from claim 8 instead. Same for claim 11: Claim 11, dependent from claim 2, recites the limitation "a sixth transistor" in line 3. There is insufficient antecedent basis for this limitation in the claim. This claim 11 should be dependent from claim 8 instead. This will auto clear antecedent issues for the claims dependent from claim 11, such as claims 12-15 for the transistor numbering. For claim 16: Claim 16 should be corrected to depend from claim 14 as this will fix the antecedent issue for “tenth transistor”, etc. Similarly, for claim 17. Claim 17 should be corrected to depend from claim 14 as this will fix the antecedent issue for “tenth transistor”, etc. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) s 1, 2 and 3 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ito et al (US 2019/0068129). The reference from Ito et al, see figure below, shows a power amplification module(see figure 2) with a carrier amplifier circuit(111); a carrier bias circuit (131A,121A)configured to supply a bias to the carrier amplifier circuit; A peak amplifier circuit(112); and a peak bias circuit (122A)comprising a first transistor(Q4) having a collector(C) or a drain connected to a reference potential(Vcc) and that is configured to supply a bias to the peak amplifier circuit from an emitter or a source of the first transistor, wherein the peak bias circuit is electrically connected to a current output circuit(130A/MP2) configured to output a predetermined current from the emitter (Ibias)or the source of the first transistor. Re Claim 2. The power amplification module includes the current output circuit(130A/MP2). PNG media_image1.png 958 928 media_image1.png Greyscale Re Claim 3. The current output circuit (130A)has a diode-connected second transistor (MP1)that has a collector or a drain supplied with a first current (Id1)from a current control circuit and an emitter or a source electrically connected to the reference potential(Vcc), and a third transistor(MP2) having a base or a gate electrically connected to a base or a gate of the second transistor(MP1), a collector or a drain electrically connected to the emitter or the source of the first transistor(Q4), and an emitter or a source electrically connected to the reference potential(Vcc). Allowable Subject Matter Claims 5 and 10-17 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Claims 4, 6-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARNOLD M KINKEAD whose telephone number is (571)272-1763. The examiner can normally be reached M-F 7am-5:30pm(Fri-Flex). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ARNOLD M KINKEAD/Primary Examiner, Art Unit 2836
Read full office action

Prosecution Timeline

Oct 08, 2024
Application Filed
Sep 14, 2026
Non-Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+7.8%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1403 resolved cases by this examiner. Grant probability derived from career allowance rate.

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