Prosecution Insights
Last updated: July 31, 2026
Application No. 18/909,915

LEVEL SHIFT CIRCUIT AND HIGH-VOLTAGE HALF-BRIDGE DRIVER CHIP

Final Rejection §112
Filed
Oct 08, 2024
Priority
Dec 26, 2023 — CN 202311816649.6
Examiner
NGUYEN, LONG T
Art Unit
2842
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Suteng Innovation Technology Co., Ltd.
OA Round
2 (Final)
89%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
836 granted / 937 resolved
+21.2% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
26 currently pending
Career history
969
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
27.5%
-12.5% vs TC avg
§102
36.4%
-3.6% vs TC avg
§112
27.5%
-12.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 937 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This office action is in respond to the amendment filed on 06/02/26. Upon further reconsideration, claim 9 is rejointed in this office action. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “shaping module wherein a second end is configured to obtain the power supply voltage, and a third end is connected to a second ground” (as recited in claim 7); and “a first inverter has a second end configured to obtain the power supply voltage and a third end connecting to the second ground; and a second inverter has a second end configured to obtain the power supply voltage and a third end connecting to the second ground” (as recited in claim 8) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. (Note that Figure 13 shows the shaping module (36) comprising first inverter (361) and second inverter (362) but does not show any power supply and ground connection). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The disclosure is objected to because of the following informalities: in the substitute specification filed on 06/02/26, the following changes should be made: In paragraph [0034], line 23 “Dz1, first voltage regulator transistor; Dz2, second voltage regulator transistor” should be changed to “Dz1, first voltage regulator diode; Dz2, second voltage regulator diode” (i.e., “transistor” in the above phrase should be changed to “diode” to match with the drawings). In paragraph [0043], lines 9-10, “first power supply voltage VSS”, “first ground voltage VDD”, “second power supply voltage VSSH” and “second ground voltage VDDH” should be changed to “first power supply voltage VDD”, “first ground voltage VSS”, “second power supply voltage VDDH” and “second ground voltage VSSH”, respectively. In paragraph [0065], line 3, “transistor r MP6” should be changed to “transistor MP6”. In paragraph [0066], throughout the paragraph, “transistor Dz1” and “transistor Dz2” should be respectively change to “diode Dz1” and “diode Dz2” (see the drawings of Figure 10). Applicant’s cooperation is requested in review the entire specification and correcting any further errors of which applicant may become aware in the specification. Appropriate correction is required. Claim Objections Claim 5-9 are objected to because of the following informalities: Claim 5, line 5, “a third configured should be changed to “a third end configured”. Claims 6-8 are objected to because they depend on claim 5. Claim 9, line 6, “tube” should be changed to “diode”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 7-8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In the instant, the original specification has failed to describe “a third end of the shaping module is connected to a second ground” (as recited in claim 7); and “a first inverter has a third end connecting to the second ground; and a second inverter has a third end connecting to the second ground” (as recited in claim 8). Note that the disclosure (substitute specification) discloses in paragraph [0085] that Figure 13 includes “a shaping module 36 wherein a third end of the shaping module 36 is grounded” (but it does not specifically recite “second ground” as recited in claim 7); and also discloses in paragraph [0086] that “the shaping module 36 includes a first inverter 361 and a second inverter 362, wherein the third end of the first inverter 361 is grounded and the third end of the second inverter 362 is grounded” (however, it does not specifically recite “second ground” as recited in claim 8). Clarification and/or appropriate correction is required. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1 and 4-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. For claim 1, the recitations “a second end of the first current mirror connected to the first ground” (lines 11-12) and “a second end of the second current mirror connected to the first ground” (lines 14-15)” are indefinite because it is inconsistent with what is disclosed and shown. Note that the claim already recited that a first end of the first high-voltage MOS transistor connected to a first ground (see lines 2-4), and a first end of the second high-voltage MOS transistor connected to the first ground (see lines 5-7). It is also note that Figures 12-13 show that the first high-voltage MOS transistor LD1 and the second high-voltage MOS transistor LD2 each having a first end connected to a first ground (VSS, see the ground symbol for VSS in Figure 1 which is the same as the ground of MOS transistors LD1 and LD2 in Figures 12-13). However, Figures 12-13 each shows that the first current mirror 311 and the second current mirror 312 each having a second end connected to ground VSSH (see Figures 12-13), and the specification also disclose that VSSH is for “second ground” (see par. [0034], line 13), so it is not clear why the claim recites “a second end of the first current mirror connected to the first ground” (lines 11-12) and “a second end of the second current mirror connected to the first ground” (lines 14-15)” which are indefinite. Clarification and/or appropriate correction is required. Claims 4-9 are indefinite because they depend on claim 1. Response to Arguments Applicant's arguments filed 06/02/26 have been fully considered but they are not persuasive. Regarding 112(b) rejection of claim 1, Applicant argues that “Applicant has amended claim 1 to explicitly recite that the first ends of the first and second high-voltage MOS transistors and the second ends of the first and second current mirrors are connected to "a first ground." As shown in the originally filed FIGs. 12-13, the high-voltage MOS transistors (LD1, LD2) and the current mirrors of the cross-coupling module are referenced to the first ground voltage VSS”. However, this does not overcome the indefinite problem of claim 1 because, as discussed above, Figures 12-13 show MOS transistors (LD1, LD2) are connected to VSS (which is first ground) while first and second current mirrors (311, 312) are connected to VSSH (which is second ground), i.e., they are not connected to the same first ground as recited in the claim. Regarding claims 7-8, the amendment of the claims to recite “second ground” which causes new matter because the original specification has failed to describe “a third end of the shaping module is connected to a second ground” (as recited in claim 7); and “a first inverter has a third end connecting to the second ground; and a second inverter has a third end connecting to the second ground” (as recited in claim 8). Note that the disclosure (substitute specification) discloses in paragraph [0085] that Figure 13 includes “a shaping module 36 wherein a third end of the shaping module 36 is grounded” (but it does not specifically recite “second ground” as recited in claim 7); and also discloses in paragraph [0086] that “the shaping module 36 includes a first inverter 361 and a second inverter 362, wherein the third end of the first inverter 361 is grounded and the third end of the second inverter 362 is grounded” (however, it does not specifically recite “second ground” as recited in claim 8). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directly to Examiner Long Nguyen whose telephone number is (571) 272-1753. The Examiner can normally be reached on Monday to Friday from 8:30am to 5:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch, can be reached at (571) 270-7101. The fax number for this group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. /Long Nguyen/ Primary Examiner Art Unit 2836
Read full office action

Prosecution Timeline

Oct 08, 2024
Application Filed
Mar 04, 2026
Non-Final Rejection mailed — §112
Jun 02, 2026
Response Filed
Jun 24, 2026
Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
89%
Grant Probability
98%
With Interview (+8.3%)
1y 10m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 937 resolved cases by this examiner. Grant probability derived from career allowance rate.

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