DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 13-19 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Claim 13 recites a "a computer program stored in memory" and the broadest reasonable interpretation of the claimed "computer program stored in memory" consistent with the specification, the state- of-the-art, and a conclusion reached by one skilled in the art, is that the full scope covers non-statutory "transitory signals and carrier waves" embodiments. The specification does not specifically define a "computer-readable medium" to exclude transitory media. The state-of-the- art at the time the invention was made included signals, carrier waves and other wireless communication modalities (e.g., RF, infrared, etc.) as media on which executable code was recorded and from which computers acquired such code. Thus, the full scope of the claim covers "signals" and their equivalents, which are non- statutory per se. (In re Nuijten). The examiner suggests clarify the claim to exclude such non-statutory signal embodiments, such as (but not limited to) by reciting a "non-transitory computer-readable medium".
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 7 recites the limitation "the operational amplifier" in 5. There is insufficient antecedent basis for this limitation in the claim.
Claim 14 recites the limitation "the operational amplifier" in 5. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 6, 12-13 and 19-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lindeboom (USPN 5,657,238).
With respect to claim 1, Lindeboom discloses, in Figs. 1-2h, a temperature detection circuit (Fig. 1 details of operation disclosed in Figs. 2a-2h), comprising a charging module (6 and 8), a temperature detection module (14 with 16), a timing module (18 and 22), and a processing module (26, 28, 30, 32 and 34),
wherein the charging module is coupled to detection terminals of the temperature detection module (14 connected to a terminal of 6 and 8 at 10) and the timing module respectively (18 and 22 connected to 6 and 8), and an output terminal of the timing module is coupled to the processing module (D1 and D2 connected to 26), wherein the temperature detection module is configured to charge the charging module based on a detected temperature (when S2 is closed 14 charges 8 according to the detected temperature associated with the negative temperature coefficient of 14);
the timing module is configured to detect the voltage of the charging module (22 and 18 detect if the voltage across 8, i.e., Uc is larger than Uref2 and/or Uref1) to determine a charging rate of the temperature detection module (D1 and D2 determine the charging rate of 14 by initiating count CNT1 and CNT2 of Figs. 2g and 2h when D2 is high and stopping counts CNT1 and CNT2 when D1 becomes high. The values of D1 and D2 are dependent upon the rate of charge of 8 which is, at least in part, dependent upon the value of 14, see Figs. 2A and 2d-2h), generate a first time signal corresponding to the charging rate (at least one of D1 and D2, note a digital signal may include more than one bit such as the two-bit-digital-signal D1 with D2), and send the first time signal to the processing module (26 receiving D1 and D2); and
the processing module is configured to determine a target temperature value through the first time signal (the counting and determining of the temperature is based on at least one of D1 and D2, see Col. 4 lines 5-13 and Col. 5 lines 45-53).
With respect to claim 2, the temperature detection circuit according to claim 1, wherein the temperature detection module comprises a temperature-sensitive resistor (14 has a negative temperature coefficient), a first terminal of the temperature-sensitive resistor is coupled to a first port of the processing module (S2 port or port 2 which will be coupled to the power supply port of 26), and a second terminal of the temperature-sensitive resistor is coupled to the charging module (terminal of 14 connected to the terminal of 8 that is connected to 10).
With respect to claim 3, the temperature detection circuit according to claim 1, wherein the charging module comprises a calibration unit (6) and a first capacitor (8), a first terminal of the first capacitor is coupled to the detection terminals of the calibration unit (terminal of 8 connected to node 10 which is connected to 6), the temperature detection module (14 at node 10), and the timing module respectively (at node 10 connected to 22 and 18), and a second terminal of the first capacitor is grounded (8 is grounded); and
the calibration unit is configured to charge the first capacitor at a preset charging rate (preset rate according to the resistance of 6 when 16 removes 14 from charging).
With respect to claim 4, the temperature detection circuit according to claim 3, wherein the calibration unit comprises a first resistor (6 is a resistor), wherein a first terminal of the first resistor is coupled to a second port of the processing module (terminal connected to port 2 which will be connected to the power supply port of 26. S2 may be considered the first port), and a second terminal of the first resistor is coupled to the first terminal of the first capacitor (terminal of 6 connected to 10); and
the first resistor is a non-temperature-sensitive resistor (the resistor of 6 is not dependent upon temperature).
With respect to claim 6, a temperature detection method (method of operating Fig. 1 further details disclosed in Figs. 2a-2h), wherein the temperature detection method is applied to a temperature detection circuit (circuit of Fig. 1), and the temperature detection circuit comprises a charging module (6 with 8), a temperature detection module (16 with 14), a timing module (22 with 18), and a processing module (26 with 28 and 30), wherein the charging module is coupled to detection terminals of the temperature detection module and the timing module respectively (6 with 8 are connected to 14 and 22 with 18 at node 10), and an output terminal of the timing module is coupled to the processing module (at least one of D1 and D2 connected to 26. D1 and D2 may be considered a signal output of a digital signal, since digital signals may include a signal that includes one than one bit), wherein the temperature detection module is configured to charge the charging module based on a detected temperature (due to the negative temperature coefficient of 14);
the timing module is configured to detect the voltage of the charging module (22 and 18 detect if the voltage across 8, i.e., Uc is larger than Uref2 and/or Uref1) to determine a charging rate of the temperature detection module (D1 and D2 determine the charging rate of 14 by initiating count CNT1 and CNT2 of Figs. 2g and 2h when D2 is high and stopping counts CNT1 and CNT2 when D1 becomes high. The values of D1 and D2 are dependent upon the rate of charge of 8 which is, at least in part, dependent upon the value of 14, see Figs. 2A and 2d-2h), generate a first time signal corresponding to the charging rate (at least one of D1 and D2, note a digital signal may include more than one bit such as the two-bit-digital-signal D1 with D2), and send the first time signal to the processing module (26 receiving D1 and D2); and
the processing module is configured to determine a target temperature value through the first time signal (the counting and determining of the temperature is based on at least one of D1 and D2, see Col. 4 lines 5-13 and Col. 5 lines 45-53);
the temperature detection method comprises:
sending a first charging signal to the temperature detection module, so that the temperature detection module charges the charging module (sending S2 to 16 such that 16 with 14 charges 8);
receiving a first time signal sent by the timing module (at least one of D1 and D2, wherein D1 and D2 may be considered a digital time signal since digital signals may include more than one bit), wherein the first time signal is generated based on a charging rate of the temperature detection module (when S2 is high the charging rate of 8 is dependent upon 16 and the negative temperature coefficient of 14), and the charging rate is obtained by detecting the voltage of the charging module (the charging rate is obtained by 18 and 22 detecting the voltage across 8 at node 10 and providing CN2 according to S2 being provided, see Figs. 2c-2h) and
determining a target temperature value through the first time signal (the targeted temperature of an accurately measured temperature is determined through the first time signal CNT2, see Col. 4 lines 5-13 and Col. 5 lines 45-53).
With respect to claim 12, the temperature detection method according to claim 6, wherein before the step of sending a first charging signal to the temperature detection module (time period before S2 is sent see t1-t4) module, the method further comprises:
sending a second charging signal to the first resistor to charge the first capacitor (S1 which clears C8 for a second charging according to 6 when S2 is low, see CNT1, D1, D2 S1 and S2 from t1 to t3 of Figs. 2a-2h);
receiving a second time signal sent by the timing module (one of D1 and D2 for controlling CNT1 during t1 to t4);
determining whether the second time signal is consistent with a preset calibration time (preset calibration time according to the resistance of 6 durign t1 to t4); and
performing a warning operation if the second time signal is inconsistent with the preset calibration time; or
performing the step of sending a first charging signal to the temperature detection module if the second time signal is consistent with the preset calibration time (the above claim is written in the alternative. If/when the detection signal is consistent with the charging of 6, the first charging will be performed during t4 to t8 to provide CNT2).
With respect to claim 13, an electronic device (Fig. 1), comprising a memory (at least one of 28 and 30), a processor (26), and a computer program stored in the memory and executable on the processor (program within at least one of 28 and 30 executed by 26), wherein the computer program, when executed by the processor, implements a temperature detection method (performing the steps of Fig. 2a-2h), and the temperature detection method comprises:
sending a first charging signal to the temperature detection module, so that the temperature detection module charges the charging module (sending S2 to 16 such that 16 with 14 charges 8);
receiving a first time signal sent by the timing module (at least one of D1 and D2, wherein D1 and D2 may be considered a digital time signal since digital signals may include more than one bit), wherein the first time signal is generated based on a charging rate of the temperature detection module (when S2 is high the charging rate of 8 is dependent upon 16 and the negative temperature coefficient of 14), and the charging rate is obtained by detecting the voltage of the charging module (the charging rate is obtained by 18 and 22 detecting the voltage across 8 at node 10 and providing CN2 according to S2 being provided, see Figs. 2c-2h) and
determining a target temperature value through the first time signal (the targeted temperature of an accurately measured temperature is determined through the first time signal CNT2, see Col. 4 lines 5-13 and Col. 5 lines 45-53).
With respect to claim 19, the electronic device of claim 13, wherein before the step of sending a first charging signal to the temperature detection module (time period before S2 is sent see t1-t4), the method further comprises:
sending a second charging signal to the first resistor to charge the first capacitor (S1 which clears C8 for a second charging according to 6 when S2 is low, see CNT1, D1, D2 S1 and S2 from t1 to t3 of Figs. 2a-2h);
receiving a second time signal sent by the timing module (one of D1 and D2 for controlling CNT1 during t1 to t4);
determining whether the second time signal is consistent with a preset calibration time (preset calibration time according to the resistance of 6 durign t1 to t4); and
performing a warning operation if the second time signal is inconsistent with the preset calibration time; or
performing the step of sending a first charging signal to the temperature detection module if the second time signal is consistent with the preset calibration time (the above claim is written in the alternative. If/when the detection signal is consistent with the charging of 6, the first charging will be performed during t4 to t8 to provide CNT2).
Claim 20 merely recites the method of operating/constructing the electronic device as recited in claim 13. Claim 20 is rejected for the same reasons as claim 13.
Claim(s) 1 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Vail et al. (USPN 6,390,672).
With respect to claim 1, Vail et al. discloses, in Fig. 2 a temperature detection circuit (Fig. 2), comprising a charging module (C1, R5, Rp, Rs and C1), a temperature detection module (R4), a timing module (30 with R1, R2 and R3), and a processing module (26 with 28),
wherein the charging module is coupled to detection terminals of the temperature detection module (R4 is connected to C1) and the timing module respectively (C1 is connected to the inverting terminal of 30), and an output terminal of the timing module is coupled to the processing module (output of 30 provided to 26), wherein the temperature detection module is configured to charge the charging module based on a detected temperature (R4 has a temperature coefficient that changes the resistance of R4 and thus charges C1 based on the detected temperature of R4);
the timing module is configured to detect the voltage of the charging module to determine a charging rate of the temperature detection module (30 with the resistors R1, R2 and R3 that determines the rate of charge by setting the non-inverting input relative to the inverting input and the feedback to the non-inverting terminal), generate a first time signal corresponding to the charging rate (the oscillated pulse output from 30 is responsive, at least in part on the rate of charge of C1), and send the first time signal to the processing module (26 receives the output of 30); and
the processing module is configured to determine a target temperature value through the first time signal (the counting and determining of the temperature is based the output of 30 to detect/sense the temperature, see Col. 4 lines 19-34).
With respect to claim 5, the temperature detection circuit according to claim 1, wherein the timing module comprises an operational amplifier (30), a second resistor (R2), a third resistor (R3), and a fourth resistor (R3), wherein an inverting input terminal of the operational amplifier is coupled to the charging module (inverting terminal connected to C1), a non-inverting input terminal of the operational amplifier is grounded through the second resistor (R2 connected between the non-inverting terminal of 30 and ground), the non-inverting input terminal of the operational amplifier is also coupled to a third port of the processing module through the third resistor (R1 connected the non-inverting terminal of 30 which is connected to the power supply voltage +5V which inturn will be connected to the third power supply port of the processing circuitry of 26 and 28), and an output terminal of the operational amplifier serves as the output terminal of the timing module (output of 30 is the output terminal of the timing module);
a first terminal of the fourth resistor is coupled to the output terminal of the operational amplifier (terminal of R3 connected to the output of 30), and a second terminal of the fourth resistor is coupled between the second resistor and the third resistor (at the non-inverting terminal of 30).
Claim(s) 6 and 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mills (USPN 5,724,334).
With respect to claim 6, as far as understood, Mills discloses, in Figs. 1 and 2, a temperature detection method (method of operating Fig. 1 details disclose in Fig. 2), wherein the temperature detection method is applied to a temperature detection circuit (Fig. 1), and the temperature detection circuit comprises a charging module (at least one of 18 and 19 with 13), a temperature detection module (at least one of 16 and 17), a timing module (at least one of 20, 21, 28, 33 with 30 and 22, 23, 29, 30 with 34), and a processing module (35, 36 and 42, or 42 alone), wherein the charging module is coupled to detection terminals of the temperature detection module and the timing module respectively (18 and 19 are respectively coupled to 16 and 17 and the timing circuit at the respective Vr and Vs nodes), and an output terminal of the timing module is coupled to the processing module (the output of 33 and 34 is directly connected to 35 and 36 and connected to 42 via 35 and 36), wherein the temperature detection module is configured to charge the charging module based on a detected temperature (the charging is temperature dependent according to the temperature dependencies of 16 and 17, see Col. 4 lines 40-50 and Col. 4 line 59 to Col. 5 line 5 and Col. 11 liens 54-58);
the timing module is configured to detect the voltage of the charging module to determine a charging rate of the temperature detection module (the output of the AND gates 28 and 39 determine the rate of charge of the capacitors, since the above outputs are dependent upon the rate of charge of Vr and Vs, see Fg. 2), generate a first time signal corresponding to the charging rate (at least one of the outputs of AND 28 and 29), and send the first time signal to the processing module (the outputs are provided to the processor); and
the processing module is configured to determine a target temperature value through the first time signal (the processor determines the PV value, see Col. 11 lines 37-46 and the PV value is determined by the sensed parameter, i.e., temperature, see Col. 5 lines 21-56);
the temperature detection method comprises:
sending a first charging signal to the temperature detection module, so that the temperature detection module charges the charging module (when 13 is activated 18 and 19 are charged by 16 and 17);
receiving a first time signal sent by the timing module (one of the outputs of 33 and 34 is received by the processor of 35, 36 and 42, or by 42 via 35 and 36), wherein the first time signal is generated based on a charging rate of the temperature detection module, and the charging rate is obtained by detecting the voltage of the charging module (the outputs of 33 and 34 are controlled according to the outputs of 28 and 29 which are controlled by 20-23 and the rate of charging of 18 and 19); and
determining a target temperature value through the first time signal (24 computes the temperature, i.e., PV value).
With respect to claim 7, the temperature detection method according to claim 6, wherein the step of receiving a first time signal sent by the timing module comprises:
activating a timer for timing when sending the first charging signal to the temperature detection module (AND 28 and 29 activate the timer, i.e., 30 via the control of 33 and 34 by the outputs of 28 and 29. The outputs of 28 and 29 are activated by charging signal of the capacitors);
stopping the timer when receiving a low-level signal sent by the operational amplifier, to obtain timing duration (the timer is stopped when any one of the operational amplifiers of 20-23 generate a low-level signal thus cause 28 and 29 to provide a low and therefore stopping 33 and 34 from providing the output of 30); and
designating the timing duration as the first time signal (the timing duration is the first timing signal due to the counting of 35 and 36 and the calculation of 42 based on the counting when the timer is enabled).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 13-14 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Mills (USPN 5,274,334).
With respect to claim 13, Mills discloses, an electronic device (Fig. 1), comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements a temperature detection method (Mills discloses a computer/microcontroller, i.e., 42 see Col. 11 lines 36-46 which will inherently have memory to store a computer program and the processor will execute the program in order for the microcontroller/computer to provide the signal processing. If the computer/microcontroller was not programmed by instructions stored on memory the computer/microcontroller would be incapable of providing the calculations and/or correct operations), and the temperature detection method comprises:
the temperature detection method comprises:
sending a first charging signal to the temperature detection module, so that the temperature detection module charges the charging module (when 13 is activated 18 and 19 are charged by 16 and 17);
receiving a first time signal sent by the timing module (one of the outputs of 33 and 34 is received by the processor of 35, 36 and 42, or by 42 via 35 and 36), wherein the first time signal is generated based on a charging rate of the temperature detection module, and the charging rate is obtained by detecting the voltage of the charging module (the outputs of 33 and 34 are controlled according to the outputs of 28 and 29 which are controlled by 20-23 and the rate of charging of 18 and 19); and
determining a target temperature value through the first time signal (24 computes the temperature, i.e., PV value).
Assuming, arguendo, that the memory and computer program are not inherent and/or disclosed by Mills. It would have been obvious to one of ordinary skill in the art to add memory with a computer program within the memory that is executed by processor 42 of Mills for the purpose of having elements that a capable of programming the processor to be able to operate as desired/required by the user. Furthermore, the use of a computer program and memory allows one to reprogram/update the operation of the microcontroller to further fine tune the operations of the electronic device according to desired operations and/or the environment in which the electronic device is required to operate. Examiner takes official notice that is known to write a program on memory and execute the program by a computer/processor for the purpose of providing a desired operation of the computer/processor.
Claim 14, as far as understood, is rejected for the same reasons as claim 7.
Allowable Subject Matter
Claims 8-11 and 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thomas J. Hiltunen whose telephone number is (571)272-5525. The examiner can normally be reached 9:00AM-5:30PM EST M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at (571)270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/THOMAS J. HILTUNEN/ Primary Examiner, Art Unit 2836
Prosecution Insights