DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending and examined in this office action.
Per claim 9, the examiner interprets “one or more physically manufactured computer-readable storage media” as “tangible computer readable storage media” described in applicant’s specification paragraph [0054], and “tangible computer readable storage media” do not include transitory communication signal.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, mathematical relationship or an abstract idea) without significantly more.
Statutory Category: Claim 1 recites a method, comprising: generating a register database, wherein the register database is configured to store one or more parameters of a plurality of registers, the plurality of registers representing the registers for a plurality of functional blocks on a system on chip (SoC); determining one or more pattern strings, wherein each of the pattern strings identify a common functionality among the plurality of registers; performing a search on a register database for identifying a group of registers from the plurality of registers, wherein names of each of the group of registers include the pattern string; and generating a virtual register definition that relates to the group of registers.
Step 2A – Prong 1: Claim 1 recites: determining one or more pattern strings, wherein each of the pattern strings identify a common functionality among the plurality of registers (a mental step of determining); performing a search on a register database for identifying a group of registers from the plurality of registers, wherein names of each of the group of registers include the pattern string (a user can manually/mentally search a pattern string); generating a virtual register definition that relates to the group of registers (a user can manually/mentally generate a virtual register definition). That is, nothing in the claim elements precludes the steps from practically being performed mentally or using pen and paper. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the mental process grouping of abstract idea. Accordingly, the claim recites an abstract idea under step 2A prong 1.
This judicial exception is not integrated into a practical application. In particular, the claim 1 recites additional elements such as generating a register database, wherein the register database is configured to store one or more parameters of a plurality of registers, the plurality of registers representing the registers for a plurality of functional blocks on a system on chip (SoC), which is a pre solution activity of generating a database, that is a Well-Understood, Routine, Conventional (WURC) Activity, as evidenced in Orthner (claims 1, 4; generating a system database by importing data of functional blocks of a circuit). Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea under Prong II step 2B.
Dependent claims 2-8 do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the dependent claims 2-8 recite more steps of a mental process (such as defining, mapping, determining, adding) which can be performed mentally or using pen and paper. The additional element of dependent claims 2-8 recite more extra-solution activities (providing, connecting, executing, storing), which do not impose any meaningful limits on practicing the mental process (insignificant additional element that are well known in the field of the art). Therefore, these claims are not patent eligible.
Independent claim 9 (a storage medium storing instructions to perform the method similar to claim 1) with dependent claims 10-15 are rejected under the similar rational as claims 1-8. The additional elements in the claim amounts to no more than generic hardware component with instructions to apply the exception, which cannot integrate a judicial exception into a practical application or provide an inventive concept.
Independent claim 16 (a system with memory and a processor to perform the method of claim 1) with dependent claims 17-20 are rejected under the similar rational as claims 1-5. The additional elements in the claim amounts to no more than generic hardware component with instructions to apply the exception, which cannot integrate a judicial exception into a practical application or provide an inventive concept.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8-9, 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Orthner (US patent 7827517), in view of Kaasten et al. (US PGPUB 2006/0200466) hereinafter Kaasten.
Per claim 1, Orthner discloses a method, comprising: generating a register database, wherein the register database is configured to store one or more parameters of a plurality of registers, the plurality of registers representing the registers for a plurality of functional blocks on a system on chip (SoC) (claims 1, 4; generating a system database by importing data of functional blocks of a circuit, including register information (a register name and a register type); column 2, line 25-30; the circuit can be a SOC).
Orthner does not explicitly teach determining one or more pattern strings, wherein each of the pattern strings identify a common functionality among the plurality of registers; performing a search on a register database for identifying a group of registers from the plurality of registers, wherein names of each of the group of registers include the pattern string; and generating a virtual register definition that relates to the group of registers. However, Kaasten suggest the above (paragraphs [0019]-[0022]; claims 1, 12; creating libraries from items stored in a database; receiving the filter term corresponding to a metadata property entered by the user in the filter area; each library contain items with one or more specified metadata properties; i.e. filtering these items by user entered metadata properties (pattern strings) to create groups (libraries); generating a virtual folder (definition) that relates to the group of items; paragraph [0099]; if filtered by user entered year, each library is identified by the user entered year (name of the group include the pattern string)). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Orthner and Kaasten to create libraries (groups) of database items (registers) based on user entered pattern strings, this would help users to organize items based on common elements (Kaasten, paragraph [0012]).
Per claim 8, Orthner further suggests determining an addition of a new functional block to the SoC; determining a set of registers on the newly added functional block; and adding the parameters of the set of registers on the newly added functional block to the register database (claims 1-4; repeatly importing functional blocks of a circuit into a database, including importing register information of each new functional block).
Claims 9 and 15 recite similar limitations as claims 1 and 8. Therefore, claims 9 and 15 are rejected under similar rationales as claims 1 and 8.
Claim 16 recites similar limitations as claim 1. Therefore, claim 16 is rejected under similar rationales as claim 1.
Conclusion
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/HANG PAN/Primary Examiner, Art Unit 2193
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