DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Reissue Applications
This application seeks to reissue US Patent No. 11,470,233 (“the ‘233 patent”). In a 05/05/2026 response to the 12/05/2025 non-final Office action, the applicant has reverted claims 1-26 to their original, unamended form, and added new claims 27-37. Claims 1-37 are pending.
For reissue applications filed before September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the law and rules in effect on September 15, 2012. Where specifically designated, these are “pre-AIA ” provisions.
For reissue applications filed on or after September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the current provisions.
Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceeding in which Patent No. 11,470,33 is or was involved. These proceedings would include any trial before the Patent Trial and Appeal Board, interferences, reissues, reexaminations, supplemental examinations, and litigation.
Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is material to patentability of the claims under consideration in this reissue application.
These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
APPLICANT’S RESPONSE TO THE NON-FINAL OFFICE ACTION
Objection under 37 CFR 1.173
The non-final Office action (NFOA) included objections under 37 CFR 1.173. These objections have been overcome by the recent amendment and the accompanying description of support. These objections are withdrawn.
Claim Objection
The claim objection that was described in the NFOA (pg. 4) has been overcome and is withdrawn.
Claim Rejections under Res Judicata
Claims 1-26 were rejected in the NFOA under res judicata. See NFOA at 4-7. The applicant submits that by reverting these claims to their original and unamended form, this rejection has been overcome. See Remarks at 12-13. This is not persuasive.
Claims 1-7 and 27-37 are sufficiently different from the claims of US Application 15/910,567 (“the ‘567 application”) that they are drawn to a patentably distinct invention. The rejection under res judicata of these claims is withdrawn. However, claims 8-26 include only obvious variants of the claims of the ‘567 application. Therefore a rejection under res judicata of these claims is appropriate. MPEP 2190 II.
MPEP 2190 states that a “patent owner or applicant may be precluded from seeking a claim that is not patentably distinct from a claim that was previously rejected if the rejection was affirmed on appeal and the decision on appeal became final.” This is similar to language in 37 CFR 42.73(d)(3)(i), which precludes “obtaining in any patent … A claim that is not patentably distinct from a finally refused or canceled claim.” This Rule and MPEP 2190 both use the phrase “not patentably distinct” to compare a prior claim and a claim in question.
In a decision addressing the meaning of “patentably distinct” in 37 CFR 42.73(d)(3)(i), the CAFC stated that this phrase “should be read to invoke the term's established meaning in the double patenting and interference contexts.” SOFTVIEW LLC v. Apple Inc., 108 F.4th 1366, 1372 (Fed. Cir. 2024). This is because “[i]dentical words used in a given field of law typically carry the same meaning” and the “term ‘not patentably distinct’ has a precise meaning in patent law.” Id. Therefore the phrase “not patentably distinct,” as used in MPEP 2190 in the context of res judicata, must be interpreted in the same manner as it is in 37 CFR 42.73(d)(3)(i) and in a double patenting analysis. The examiner is unaware of any guidance or precedent showing that this term should be defined differently in a res judicata analysis.
A “later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim.” Eli Lilly and Co. v. Barr Laboratories, Inc., 251 F. 3d 955, 968 (Fed. Cir. 2001). Determining whether a patentable distinction exists between the claims “is analogous to an obviousness analysis under 35 U.S.C. § 103." Eli Lilly & Co. v. Teva Parenteral Medicines, Inc., 689 F.3d 1368, 1377 (Fed. Cir. 2012). A proper analysis in this context involves applying “KSR’s1 instruction” to previous claims “rather than to prior art references.” SOFTVIEW, 108 F.4th at 1372.
Therefore, when a later claim is obvious in light of an earlier claim, and a rejection of the earlier claim was affirmed in a final PTAB decision, the later claim must be rejected under res judicata. Such is the case here.
The applicant describes how claim 1 of this application includes limitations that were not found in the claims of the ‘567 application. See Remarks at 12-13. The examiner agrees that currently-pending claim 1 is patentably distinct over the claims of the ‘567. However, claims 8, 14, and 20 are not patentably distinct over the claims of the ‘567 application. See below.
Claim Rejections under §112(b)
The §112(b) rejection of claims 1-7 has been overcome by the recent amendment. This rejection is withdrawn.
Claim Rejections under §103
The applicant submits that currently-pending claims 1-26, which are the same as the allowed claims of the ‘233 patent, were allowed in US Application 17/145,740, “[t]hus, claims 1-26 are believed to be in condition for allowance.” Remarks at 13. The fact that these claims were previously allowed does not mean they are in condition for allowance in this reissue application.
It does not matter whether the claims are identical to those of the patent or changed from those in the patent. It also does not matter that a rejection was not made in the prosecution of the patent, or could have been made, or was in fact made and dropped during prosecution of the patent; the prior action in the prosecution of the patent does not prevent that rejection from being made in the reissue application. Claims in a reissue application enjoy no "presumption of validity."
MPEP 1445. The allowance of these claims by the examiner in US Application 17/145,740 has no bearing on their patentability in this reissue application.
The applicant argues that the Mizosoe-Shimizu combination “does not teach or suggest a frame sync signal that is indicative of both (a) a timing of video data capture by a first camera and a second camera and (b) a time to receive the transmissions from the first serial interface circuit and the second serial interface circuit.” Remarks at 14. This is not persuasive. While the applicant’s arguments relate to mostly claim 1, which is now allowed, this same or a similar limitation is present in claims 8-26, which are rejected below.
This same limitation was present in the claims of the ‘567 application and was the primary focus of the applicant’s appeal to PTAB. In its decision affirming the examiner’s rejection, PTAB stated that the Mizosoe-Shimizu combination renders this claim limitation obvious. See the 09/29/2022 Decision on Appeal in the ‘567 application (“PTAB decision”) at 4-7. This appeal decision was not further contested by the applicant, and therefore is final. See MPEP 1216.
A “Board decision in an application is the ‘law of the case,’ and is thus controlling in that application and any subsequent, related application.” MPEP 706.07(h)(XI)(A). As described above, the PTAB decision found that the Mizosoe-Shimizu combination renders the disputed claim limitation obvious. This is the “law of the case” in this reissue application, and the examiner is not at liberty to revisit the merits of this decision. The applicant has not shown that the disputed limitation in claims 8-26 differs in a non-obvious manner from limitations that were finally rejected by PTAB in the ‘567 application. For reasons given by PTAB, Mizosoe-Shimizu renders this claim limitation obvious. See the PTAB decision at 4-7.
Claims 1, 27, 31, and 33 contain additional limitations beyond the claims whose rejection was affirmed by PTAB in the ‘567 application. These claims are indicated below as reciting allowable subject matter. However, claims 8-26 remain rejected. See below.
Objection, 37 CFR 1.175 – Defective Reissue Declaration
The reissue declaration filed with this application is defective (see 37 CFR 1.175 and MPEP § 1414). The declaration that was filed with the application on 10/10/2024 described that certain removed limitations in claim 1 were “unnecessary for the claim to be patentable over the cited art.” Claim 1 has been reverted to its unamended form in the recent response. Therefore the original declaration does not properly describe an error in the ‘233 patent that this reissue application is filed to remedy. In addition, the declaration does not indicate whether, or how, new claims 27-37 represent a broadening of the claims of the ‘233 patent.
For an application filed on or after September 16, 2012 that seeks to enlarge the scope of the claims of the patent, the reissue oath or declaration must also identify a claim that the application seeks to broaden in the identification of the error that is relied upon to support the reissue application.
Any error in the claims must be identified by reference to the specific claim(s) and the specific claim language wherein lies the error.
MPEP 1414 II.
Claim Rejections, 35 U.S.C. §251
Claims 1-37 are rejected as being based upon a defective reissue declaration under 35 U.S.C. 251 as set forth above. See 37 CFR 1.175. The nature of the defect(s) in the declaration is set forth in the discussion above in this Office action.
Claims 27-28 are rejected under 35 U.S.C. 251 as being an impermissible recapture of broadened claimed subject matter surrendered in the application for the patent upon which the present reissue is based. In re McDonald, 43 F.4th 1340, 1345, 2022 USPQ2d 745 (Fed. Cir. 2022); Greenliant Systems, Inc. et al v. Xicor LLC, 692 F.3d 1261, 103 USPQ2d 1951 (Fed. Cir. 2012); In re Youman, 679 F.3d 1335, 102 USPQ2d 1862 (Fed. Cir. 2012); In re Shahram Mostafazadeh and Joseph O. Smith, 643 F.3d 1353, 98 USPQ2d 1639 (Fed. Cir. 2011); North American Container, Inc. v. Plastipak Packaging, Inc., 415 F.3d 1335, 75 USPQ2d 1545 (Fed. Cir. 2005); Pannu v. Storz Instruments Inc., 258 F.3d 1366, 59 USPQ2d 1597 (Fed. Cir. 2001); Hester Industries, Inc. v. Stein, Inc., 142 F.3d 1472, 46 USPQ2d 1641 (Fed. Cir. 1998); In re Clement, 131 F.3d 1464, 45 USPQ2d 1161 (Fed. Cir. 1997); Ball Corp. v. United States, 729 F.2d 1429, 1436, 221 USPQ 289, 295 (Fed. Cir. 1984). The reissue application contains claim(s) that are broader than the issued patent claims. The record of the application for the patent family shows that the broadening aspect (in the reissue) relates to claimed subject matter that applicant previously surrendered during the prosecution of the application. Accordingly, the narrow scope of the claims in the patent was not an error within the meaning of 35 U.S.C. 251, and the broader scope of claim subject matter surrendered in the application for the patent cannot be recaptured by the filing of the present reissue application.
The recapture analysis involves a 3-step process:
(1) first, we determine whether, and in what respect, the reissue claims are broader in scope than the original patent claims;
(2) next, we determine whether the broader aspects of the reissue claims relate to subject matter surrendered in the original prosecution; and
(3) finally, we determine whether the reissue claims were materially narrowed in other respects, so that the claims may not have been enlarged, and hence avoid the recapture rule.
MPEP 1412.02(II).
Step 1: claim 27 omits limitations describing the content of the frame sync signal. Each claim of the ‘233 patent recited that the frame synch signal is indicative of “a timing of video data capture by a first camera and a second camera” and “a time to receive the transmissions from the first serial interface circuit and the second serial interface circuit.” By omitting this limitation, claim 27 has been broadened relative to the broadest claims of the ‘233 patent. Analysis therefore proceeds to step 2.
Step 2: during prosecution of US Application 15/910,567 (the parent application of the application from which the ‘233 patent issued), the claims were amended on 02/19/2020 to overcome prior art rejections of the 11/19/2019 non-final Office action. For example, claim 1 of this application was amended to recite:
encode a clock signal and a frame sync signal in the control information, the frame sync signal indicative of (a) a timing of video data capture by the first camera and the second camera and (b) a time to receive the transmissions from the first serial interface circuit and the second serial interface circuit.
The applicant also pointed to these limitations to argue that the amended claim was not taught or suggested by the prior art of record. See the 02/19/2020 Remarks at 7-9. The added limitations were surrendered because they were “relied upon by applicant in the original application to make the claims allowable.” MPEP 1412.02(II)(B)(1). By removing these limitations from claim 27, the applicant has omitted surrendered subject matter. Analysis therefore proceeds to step 3.
Step 3: claim 27 has not been materially narrowed relative to the surrendered subject matter because these limitations have been entirely omitted. MPEP 1412.02(II)(C). By removing this limitation, claim 27 violates the recapture rule of §251.
Dependent claims 29-30, as well as all other new claims of this application, include the surrendered subject matter or similar limitations. These claims are not rejected under this heading.
Claim Rejections – Res Judicata
Claims 8-26 are rejected on the grounds of res judicata. A rejection under res judicata is appropriate for a claim that “is not patentably distinct from a claim that was previously rejected if the rejection was affirmed on appeal and the decision on appeal became final.” MPEP 2190 II.
The instant application is for the reissue of the ‘233 patent, which issued from US Application 17/145,740. This application was a continuation of US Application 15/910,567 (“the ‘567 application”). During prosecution of the ‘567 application, the examiner’s rejections in the 06/02/2020 final Office action were affirmed on appeal. See the 09/29/2022 Patent Board Decision (the “PTAB Decision”) in the ‘567 application, which affirmed “the Examiner’s rejection of independent claims 1, 11, and 19 under 35 U.S.C. § 103 as being unpatentable over Mizosoe in view of Shimizu, likewise with the rejection of dependent claims 2-5, 7-9, 12-14, 17, and 20.” PTAB Decision at 6-7. The rejections of claims 10 and 18 were also upheld. Id. at 7-8.
The ‘567 application was subsequently abandoned on 12/15/2022, and no civil action or appeal to the U.S. Court of Appeals for the Federal Circuit was filed. This decision on appeal in the ‘567 application is therefore final. See MPEP 1209.
The claims of the instant application are not patentably distinct from claims in the ‘567 application. Claim 8 of the instant application is compared below with claim 19 of the ‘567 application:
18/911,885
15/810,567 (02/19/2020 claims)
8. A receiver comprising:
Claim 19: A system comprising a plurality of transceivers
a first input for receiving a clock signal
each of the transceivers configured to: encode the clock signal [implicitly received, via an input, from the clock generator]
a second input for receiving a frame sync signal
each of the transceivers configured to: encode the frame sync signal [implicitly received, via an input, from the frame sync generation circuitry]
a third input for receiving transmissions from a serial interface circuit;
wherein the receiver is configured to: receive transmissions from the serial interface circuit;
each of the transceivers configured to: communicate bidirectionally with a serial interface circuit
encode the clock signal and the frame sync signal into control information, the frame sync signal indicative of (a) a timing of video data capture by a camera and (b) a time to receive the transmissions from the serial interface circuit.
the frame sync signal indicative of (a) a timing of video data capture by a camera and (b) a time to provide the video data to the hub interface circuit
…
encode the clock signal and the frame sync signal in control information to be transmitted to a serial interface circuit
As shown in the table above, the invention that is recited in claim 8 is only an obvious variant of claim 19 of the ‘567 application. Independent claim 14 recites similar features and are rejected under res judicata as described above.
Claim 20 is similar to claim 8, but differs from the claims of the ‘567 application only in the following language: “a second output coupled to an image processor interface circuit.” This difference amounts to only an obvious variant of the claims of the ‘567 application, and thus claim 1 is not patentably distinct from claims 1 and 19 of the ‘567 application. The same Mizosoe reference that was relied upon in the rejections in the ‘567 application discloses transceivers that have “an output coupled to the input of an image processor interface circuit.” See Mizosoe Fig. 7: 504 and ¶¶ 47-50.
It would have been obvious to a skilled artisan before the effective filing date of the claimed invention to modify the claims of the ‘567 application to include these teachings in Mizosoe, the rationale being to enable proper decoding of the image that is received from the cameras. The POSITA would recognize that providing this would result in a system with improved performance.
The dependent claims of this application all correlate to claims that were upheld on appeal in the ‘567 application, and are likewise rejected.
Because claims 8-26 are only an obvious variant of (that is, are not patentably distinct from) claims that were affirmed in an appeal decision that is final, the claims are rejected under res judicata. See MPEP 2190 II.
Claims 1-7 of this application are not rejected under res judicata. Claim 1 differs from the claims of the ‘567 by reciting “a clock generator circuit having a first input, a second input and an output wherein the first input is coupled to a reference clock signal; a frame sync generation circuit having a first output and a second output wherein the first output is coupled to the second input of the clock generator circuit.” This particular arrangement is not recited in the claims of the ‘567 application. Due to these limitations, in combination with the remaining features that are recited in claim 1, claim 1 recites an invention that is patentably distinct over the claims of the ‘567 application.
Claim 27 recites many features that are found in the claims of the ‘567 application. However, claim 27 also recites that the transceivers are configured to: “receive first video data from an output of a first serial interface circuit at a third input of the transceivers; receive second video data from an output of a second serial interface circuit at a fourth input of the transceivers” and “encode the clock signal and the frame sync signal into the control information, wherein the transceivers encode the clock signal into the control information by providing transitions in the control information, the transitions indicating the clock signal.” Claim 31 includes similar limitations. These limitations are not found in the claims of the ‘567 application, and this amounts to a patently indistinct invention over those claims.
Claim 33 further recites “the frame sync signal indicating a timing of capture of first video data by the first camera, a timing of capture of second video data by the second camera, a timing of transfer of the first video data from the first serial interface circuit to the hub interface circuit, and a timing of transfer of the second video data from the second serial interface circuit to the hub interface circuit” and “wherein the timing of the capture of the first video data by the first camera and the timing of the capture of the second video data by the second camera are synchronized according to both the clock signal and the frame sync signal recovered from the control information.” These limitations are not found in the claims of the ‘567 application, and this amounts to a patently indistinct invention over those claims.
Therefore claims 1-7 and 27-37 are not rejected under res judicata.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8-26 are rejected under 35 U.S.C. 103 as being unpatentable over Mizosoe, US 20130287144 in view of Shimizu, JP2001282714 (see translation that was provided in the 06/02/2020 final Office action in the ‘567 application).
Claim 8: The Mizosoe-Shimizu combination that was described in the 06/02/2020 final Office action in the ‘567 application renders claim 8 obvious. See ‘567 final action at 4-21, and the PTAB decision at 4-7. As described under the res judicata rejection above, this rejection was affirmed on appeal, and the decision affirming this rejection has become final. This is therefore the “law of the case” in this application. See above.
The Mizosoe-Shimizu combination discloses a receiver comprising:
a first input for receiving a clock signal; a second input for receiving a frame sync signal; a third input for receiving transmissions from a serial interface circuit (Mizosoe Fig. 26 – the decoder/expansion circuitry 5021-5023 and 5031-5033 are receivers. These circuits are coupled, via the bus that is depicted in Fig. 25, to each circuit in the manner required by this claim limitation);
wherein the receiver is configured to:
receive transmissions from the serial interface circuit; encode the clock signal and the frame sync signal into control information, the frame sync signal indicative of (a) a timing of video data capture by a camera and (b) a time to receive the transmissions from the serial interface circuit (A Synch packet and DelayResp packets together form control information that is generated to synchronize transmission between the server and client. Mizosoe ¶110. The DelayResp packet acts to indicate a time to receive transmission from the interface circuits. Id. ¶¶ 91 and 110, and Figures 13 and 15. Likewise, the control information encodes the clock signal from the generation part 51. Id. ¶¶ 62-65. As such, Mizosoe teaches this claim limitation. See also the 09/29/2022 Decision on appeal in the ‘567 application at 4-6, in which it was found that the Mizosoe-Shimizu combination taught a substantially similar claim limitation.)
Claim 9: The Mizosoe-Shimizu combination discloses that the serial interface circuit includes a clock recovery circuit configured to extract the clock signal from the control information received from the receiver (Mizosoe ¶¶91-95, Shimizu Fig. 1 and 7, and ¶¶12-13 and 39-41. See the 06/02/2020 final Office action in the ‘567 application at 6-7 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 10: The Mizosoe-Shimizu combination discloses that the serial interface circuit includes clock generation circuitry configured to generate a clock signal based on the clock signal extracted from the control information. (Mizosoe ¶¶85 and 91-95. See the 06/02/2020 final Office action in the ‘567 application at 6-7 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 11: Mizosoe-Shimizu discloses that the serial interface circuit is configured to provide a clock signal to the camera (Mizosoe ¶99. See the 06/02/2020 final Office action in the ‘567 application at 8 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 12: Mizosoe-Shimizu discloses that the serial interface circuit is configured to extract the frame sync signal from the control information (Mizosoe ¶¶ 110 and 132-133. See the 06/02/2020 final Office action in the ‘567 application at 9 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 13: Mizosoe-Shimizu discloses the serial interface circuit is configured to provide the frame sync signal extracted from the control information to the camera (Mizosoe ¶¶ 90-91, 9697, and 136. See the 06/02/2020 final Office action in the ‘567 application at 9 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 14: this claim closely corresponds to claims 11 and 19 of the ‘567 application, and is likewise rejected under res judicata as described above.
Mizosoe-Shimizu discloses a transmitter comprising:
a first output for transmitting control information; a second output coupled to an image processor interface circuit (Mizosoe Fig. 26 – the decoder/expansion circuitry 5021-5023 and 5031-5033 are transmitted in that they transmit data. These circuits are coupled, via the bus that is depicted in Fig. 25, to each circuit in the manner required by this claim limitation);
wherein the transmitter is configured to: transmit control information to a serial interface circuit wherein the control information is an encoding of a clock signal and a frame sync signal indicative of (a) a timing of video data capture by a camera and (b) a time to receive the transmissions from the serial interface circuit (A Synch packet and DelayResp packets together form control information that is generated to synchronize transmission between the server and client. Mizosoe ¶110. The DelayResp packet acts to indicate a time to receive transmission from the interface circuits. Id. ¶¶ 91 and 110, and Figures 13 and 15. Likewise, the control information encodes the clock signal from the generation part 51. Id. ¶¶ 62-65. As such, Mizosoe teaches this claim limitation. See also the 09/29/2022 Decision on appeal in the ‘567 application at 4-6, in which it was found that the Mizosoe-Shimizu combination taught a substantially similar claim limitation.).
Claim 15: The Mizosoe-Shimizu combination discloses that the serial interface circuit includes a clock recovery circuit configured to extract the clock signal from the control information received from the transmitter. (Mizosoe ¶¶91-95, Shimizu Fig. 1 and 7, and ¶¶12-13 and 39-41. See the 06/02/2020 final Office action in the ‘567 application at 6-7 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 16: The Mizosoe-Shimizu combination discloses that the serial interface circuit includes clock generation circuitry configured to generate a clock signal based on the clock signal extracted from the control information (Mizosoe ¶¶85 and 91-95. See the 06/02/2020 final Office action in the ‘567 application at 6-7 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 17: Mizosoe-Shimizu discloses that the serial interface circuit is configured to provide a clock signal to the camera (Mizosoe ¶99. See the 06/02/2020 final Office action in the ‘567 application at 8 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 18: Mizosoe-Shimizu discloses that the serial interface circuit is configured to extract the frame sync signal from the control information (Mizosoe ¶¶ 110 and 132-133. See the 06/02/2020 final Office action in the ‘567 application at 9 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 19: Mizosoe-Shimizu discloses the serial interface circuit is configured to provide the frame sync signal extracted from the control information to the camera (Mizosoe ¶¶ 90-91, 9697, and 136. See the 06/02/2020 final Office action in the ‘567 application at 9 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Claim 20 Mizosoe-Shimizu discloses a transceiver comprising:
a first input for receiving a clock signal (Mizosoe Fig. 26: the transceiver receive a clock signal from the generation part 51);
a second input for receiving a frame synch signal (Mizosoe Fig. 26: time control packet generating part 53 transmits the frame synch signal to the transceiver);
a third input for receiving transmissions from a serial interface circuit (Mizosoe Fig. 7);
a first output for transmitting control information (see rejection of claim 1 showing that the hub circuit, via the transceiver, includes this first output);
a second output coupled to an image processor interface circuit (Mizosoe Fig. 7);
wherein the transceiver is configured to: receive transmissions from the serial interface circuit; transmit control information to the serial interface circuit; and encode the clock signal and the frame sync signal into the control information, the frame sync signal indicative of (a) a timing of video data capture by a camera and (b) a time to receive the transmissions from the serial interface circuit (A Synch packet and DelayResp packets together form control information that is generated to synchronize transmission between the server and client. Mizosoe ¶110. The DelayResp packet acts to indicate a time to receive transmission from the interface circuits. Id. ¶¶ 91 and 110, and Figures 13 and 15. Likewise, the control information encodes the clock signal from the generation part 51. Id. ¶¶ 62-65. As such, Mizosoe teaches this claim limitation. See also the 09/29/2022 Decision on appeal in the ‘567 application at 4-6, in which it was found that the Mizosoe-Shimizu combination taught a substantially similar claim limitation.).
Claims 21-25: see rejection of claims 9-13, respectively.
Claim 26: Mizosoe-Shimizu discloses that the serial interface circuit is configured to transmit video data to a hub interface circuit, the video data comprising video frames synchronized to the frame sync signal extracted from the control information (Mizosoe ¶¶ 53-55, 119, and 132-135. See the 06/02/2020 final Office action in the ‘567 application at 10 (the position of which is adopted in this rejection), as well as the PTAB Decision affirming this rejection at 6-7).
Allowable Subject Matter
Claims 1-37 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for indicating allowable subject matter.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
The closest prior art is the Mizosoe-Shimizu combination that is described above and in the PTAB Decision in the ‘567 application. This prior art fails to teach or suggest:
“a clock generator circuit having a first input, a second input and an output wherein the first input is coupled to a reference clock signal; a frame sync generation circuit having a first output and a second output wherein the first output is coupled to the second input of the clock generator circuit” as recited in claim 1.
transceivers are configured to: “receive first video data from an output of a first serial interface circuit at a third input of the transceivers; receive second video data from an output of a second serial interface circuit at a fourth input of the transceivers” and “encode the clock signal and the frame sync signal into the control information, wherein the transceivers encode the clock signal into the control information by providing transitions in the control information, the transitions indicating the clock signal” as recited in claim 27, and similarly in claim 31.
“the frame sync signal indicating a timing of capture of first video data by the first camera, a timing of capture of second video data by the second camera, a timing of transfer of the first video data from the first serial interface circuit to the hub interface circuit, and a timing of transfer of the second video data from the second serial interface circuit to the hub interface circuit” and “wherein the timing of the capture of the first video data by the first camera and the timing of the capture of the second video data by the second camera are synchronized according to both the clock signal and the frame sync signal recovered from the control information” as recited in claim 33.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT J HANCE whose telephone number is (571)270-5319. The examiner can normally be reached M-F 11:00am-7:00pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Fuelling can be reached at (571) 270-1367. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ROBERT J HANCE/Reexamination Specialist, Art Unit 3992
Conferees: /JOSEPH R POKRZYWA/ Primary Examiner, Art Unit 3992 /M.F/Supervisory Patent Examiner, Art Unit 3992
1 KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007).
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