Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
2. Claims 1-16 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1-22 of U.S. patent 12,149,340 (hereinafter ‘340). Although the conflicting claims are not identical, they are not patentably distinct from each other because of the following:
Regarding claim 1, ‘340 discloses:
A system, comprising multiple processors to communicate with one another at
predefined time slots (claim 1; col. 12; lines 29-31) , wherein a given processor among the processors is to: hold a predetermined schedule plan that specifies which of the other processors in the system are accessible to the given processor at which of the time slots, the predetermined schedule plan having been determined before receiving data for transmission from the given processors to the other processors (claim 1; col. 12; lines 24-33);
queue data that is destined to one or more of the other processors (claim 1; col. 12; lines 34-35); and
transmit the queued data in accordance with the predetermined schedule plan (claim 1; col. 12; lines 36-37).
Regarding claim 9, 340’ discloses:
A method, comprising (claim 11; col. 13; line 18):
in a given processor, among multiple processors that communicate with one another at predefined time slots, holding a predetermined schedule plan that specifies which of the other processors are accessible to the given processor at which of the time slots, the predetermined schedule plan having been determined before receiving data for transmission from the given processors to the other processors (claim 11; col. 13; lines 19-28);
queuing data that is destined to one or more of the other processors (claim 11; col. 13; lines 29-30); and
transmitting the queued data in accordance with the predetermined schedule plan (claim 11; col. 13; lines 31-32).
Claims 2-8 and 10-16 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 2-10 and 12-22 of U.S. patent 12,149,340 (hereinafter ‘340).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the 20claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1-4, 6-8, 9-12 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Fujii (US 2013/0159577, hereinafter Fujii) in view of Hu et al. (US 2015/0104171, hereinafter Hu).
Regarding claim 1, Fujii discloses a system, comprising multiple processors to communicate with one another (para 0118-0119-0121; ECU1 to ECU5 transmit and receive data according to predetermined time schedule) at predefined time slots (para 0118; ECU1 to ECU5 communicate using predetermined slots), wherein a given processor among the processors is to:
hold a predetermined schedule plan that specifies which of the other processors in the
system are accessible to the given processor at which of the time slots (para 0120; fig. 2- allocation of the transmitter nodes for all slots), the predetermined schedule plan having been determined before receiving data for transmission from the given processors to the other processors (para 0117; communication schedule is determined at the time of system design); store data that is destined to one or more of the other processors (para 0082-0083; 0126; storing data in reception buffer) and
transmit the stored data in accordance with the predetermined schedule plan (para 0117; and fig.2; transmit the stored data in accordance with the schedule).
Fujii does not explicitly disclose that the data is stored in a queue.
In an analogous art, Hu discloses that the data is stored in a queue (para 0019 and 0021). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Fujii’s method/system by having Hu’s disclosure in order to control the data transmission to provide a reliable service.
Regarding claim 9, Fujii discloses a method, comprising:
in a given processor, among multiple processors that communicate with one another (para 0118-0119-0121; ECU1 to ECU5 transmit and receive data according to predetermined time schedule) at predefined time slots (para 0118; ECU1 to ECU5 communicate using predetermined slots), holding a predetermined schedule plan that specifies which of the other processors are accessible to the given processor at which of the time slots (para 0120; fig. 2- allocation of the transmitter nodes for all slots), the predetermined schedule plan having been determined before receiving data for transmission from the given processors to the other processors (para 0117; communication schedule is determined at the time of system design); store data that is destined to one or more of the other processors (para 0082-0083; 0126; storing data in reception buffer) and transmit the stored data in accordance with the predetermined schedule plan (para 0117; and fig.2; transmit the stored data in accordance with the schedule).
Fujii does not explicitly disclose that the data is stored in a queue.
In an analogous art, Hu discloses that the data is stored in a queue (para 0019 and 0021). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Fujii’s method/system by having Hu’s disclosure in order to control the data transmission to provide a reliable service.
Regarding claims 2, and 10, Fujii discloses wherein the predetermined schedule plan (para 0118; predetermined slots) comprises a mapping between the time slots and respective subsets of the processors that are accessible to the given processor during the time slots (Fig.2 – slots are assigned to respective ECUs)
Regarding claims 3 and 11, Fujii discloses wherein the predetermined schedule plan is independent from data that is actually queued for transmission (para 0117; schedule is determined at the time of system design which is independent of data later queued for transmission).
Regarding claims 4 and 12, Fujii discloses wherein the schedule plan specifies a time slot for transmitting data to a destination processor, before queuing data that is destined to the destination processor. (para 0117; schedule is determined at the time of system design which is independent of data later queued for transmission to respective destinations).
Regarding claims 6 and 14, Fujii discloses wherein the given processor is to hold a time reference, and to transmit a queued data item at a respective time slot in response to identifying that the time slot has started, based on the time reference (para 0011; 0013; 0039-0042; and 0052; transmission/reception time table).
Regarding claims 7 and 15, Fujii discoses wherein the given processor is to receive time synchronization messages, and to update the time reference in response to the time synchronization messages (para 0004; 0064; 0119; 0129).
Regarding claims 8 and 16, Fujii does not explicitly disclose wherein the given processor is to queue data items having respective priority levels in respective priority queues, to select a priority queue using a predefined arbitration scheme, to determine a time slot for a data item in the selected priority queue using the predetermined schedule plan, and to transmit the data item from the selected priority queue at the determined time slot.
In an analogous art, Hu discoses wherein the given processor is to queue data items having respective priority levels in respective priority queues, to select a priority queue using a predefined arbitration scheme (para 0021), to determine a time slot for a data item in the selected priority queue using the predetermined schedule plan, and to transmit the data item from the selected priority queue at the determined time slot (para 0021). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Fujii’s method/system by having Hu’s disclosure in order to control the data transmission to provide a reliable service.
4. Claims 5 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Fujii/Hu in view of Kris (US 4630193, hereinafter Kris).
Regarding claims 5 and 13, Fujii/Hu does not explicitly disclose wherein the predetermined schedule plan specifies a cyclic sequence of processors that are accessible in a sequence of successive time slots.
In an analogous art, Kris discloses wherein the predetermined schedule plan specifies a cyclic sequence of processors that are accessible in a sequence of successive time slots (col. 1; lines 22-25 and col.2; lines 10-15). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Fujii/Hu’s method/system by having Kris’s disclosure in order to improve resource allocation of a communication system.
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMINA CHOUDHRY whose telephone number is (571)270-7102. The examiner can normally be reached on Monday to Thursday (7:30 a.m. to 5.00p.m.).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yemane Mesfin can be reached on (571)272-3927. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SAMINA F CHOUDHRY/Primary Examiner, Art Unit 2462