DETAILED ACTION
Application filed 10/14/2024 has been examined.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
The current application is a continuation of application 18185198 (USPN 12119075).
Specification and drawings are accepted.
IDS has been considered. PTO-1449 is attached.
Application is pending.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,119,075.
Although the claims at issue are not identical, they are not patentably distinct from each other. For example, claim 1 of the present application teaches managing a memory device, comprising: identifying a target page for a read operation and an extrinsic page adjacent to the target page; identifying a hard decoding threshold for the target page; modifying, based on read information for one or both of the target page and the extrinsic page, a plurality of thresholds corresponding to the hard decoding threshold, the plurality of thresholds defining a plurality of respective voltage ranges; allocating respective log-likelihood ratios (LLRs) to the plurality of voltage ranges; and decoding, based on the LLRs, the target page. Whereas claim 1 of U.S. patent ‘075 teaches soft correction in a memory device, the computer-implemented method comprising: selecting a plurality of memory locations at a memory device, the memory locations corresponding to a first page including a first plurality of bits and a second page including a second plurality of bits; modifying, based on the first plurality of bits and the second plurality of bits, a first voltage threshold corresponding to an estimated read voltage for the first plurality of bits; allocating, to a voltage range bounded by the first voltage threshold, a log-likelihood ratio (LLR); and decoding, based on the LLR corresponding to the voltage range, the first plurality of bits. The Examiner would like to point out that the claims are obvious variations of each other and not patentably distinct. In both claim sets a first page (or a target page) and a second page (or extrinsic page) are identified (or selected). Based on the read information the voltage thresholds are modified to define a voltage range. Then respective LLRs are allocated to the voltage ranges and decoding is performed accordingly. Therefore the claims are obvious embodiments of each other and not patentably distinct. A terminal disclaimer would obviate the rejection.
Conclusion
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The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUJTABA M CHAUDRY whose telephone number is (571)272-3817. The examiner can normally be reached Monday-Friday 9am-5:30pm.
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MUJTABA M. CHAUDRY
Primary Examiner
Art Unit 2112
/MUJTABA M CHAUDRY/Primary Examiner, Art Unit 2112