ETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Information Disclosure Statement
The Information Disclosure Statement filed on March 27, 2026 has been considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,118,235 in view of Chu et al. (U.S. Patent No. 11,249,646).
Instant Application claim
U.S. Patent No. 12,118,235 claim
1
1. Chu et al. provide the additional teaching of a storage device. It would be obvious to use overflow counters with storage devices. In order to reduce the physical space required for the counters.
2
2
3
3
4
4
5
5
6
6
7
2
8
8
9
9
10
1. Chu et al. provide the additional teaching of a storage device. It would be obvious to use overflow counters with storage devices. In order to reduce the physical space required for the counters.
11
2
12
3
13
4
14
5
15
6
16
9
17
19
18
20
19
3
20
3
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (U.S. Patent No. 11,249,646) in view of Prasad et al. (Pub. No. US 2018/0349280).
Claim 1:
Chu et al. disclose a storage device, comprising:
a non-volatile memory [fig. 1; column 2, lines 33-38 – “FIG. 1 is a flowchart illustrating an embodiment of a process to write large segments of data to storage. In various embodiments, the storage being written to is a solid state drive (SSD), a hard disk drive (HDD) including shingled magnetic recording hard disk drive (SMR HDD), DRAM, etc.”];
a buffer array comprising:
a plurality of buffers configured to buffer data corresponding to data stored by the non-volatile memory [column 12, lines 14-18 – “FIG. 10 is a diagram illustrating an embodiment of a reference count and buffer address associated with a buffer. In embodiments where there are multiple buffers (see, e.g., FIG. 7) there is a reference count and buffer address for each buffer.”],
a plurality of reference counters respectively associated with the plurality of buffers, each of the reference counters configured to store a reference count [column 12, lines 14-18 – “FIG. 10 is a diagram illustrating an embodiment of a reference count and buffer address associated with a buffer. In embodiments where there are multiple buffers (see, e.g., FIG. 7) there is a reference count and buffer address for each buffer.”];
a controller configured to:
manage the reference counts stored by the reference counters in response to requests to access the associated buffers [figs. 5-7; column 12, lines 25-36 – “The reference count (1006) is used to track the number of processes or entities that are currently accessing the buffer. Since there are two read operations accessing the buffer in the example shown here, the reference count here is set to 2 (e.g., where each read operation incremented the reference count when it checked the buffer address (1008), found a match, and decided to read from the buffer). When each read operation is complete, it decrements the reference count by 1 so that when both reads are done (and assuming no new reads come along) the reference count will return to 0. In some embodiments, only processes which are reading from the corresponding buffer increment the reference count.”];
However, Chu et al. do not specifically disclose,
an overflow counter; and
the controller configured to:
determine whether the reference count stored by one of the reference counters satisfies a reference threshold; and
in response to a determination that the one request count satisfies the reference threshold:
allocate the overflow counter to the one reference counter, and
manage an overflow count stored by the overflow counter in response to requests to access the buffer associated with the one reference counter.
In the same field of endeavor, Prasad et al. disclose,
an overflow counter [fig. 5; pars. 0027-0031 – “Overflow counters 250, in the illustrated embodiment, are configured to continue counting for counters in filter circuitry 240 that have saturated, as discussed in further detail below with reference to FIG. 5.”]; and
the controller configured to:
determine whether the reference count stored by one of the reference counters satisfies a reference threshold [figs. 4-5; pars. 0033-0039 – It is determined whether any counter is saturated. (“In the illustrated embodiment, when a cache line is allocated and one of the corresponding smaller counters 540 is already saturated (counter B in the example of FIG. 5), snoop filter 130 is configured to allocate an entry in overflow array 250 with a larger counter 542.”)]; and
in response to a determination that the one request count satisfies the reference threshold:
allocate the overflow counter to the one reference counter [figs. 4-5; pars. 0033-0039 – An overflow counter may be allocated when the counters become saturated. (“In the illustrated embodiment, when a cache line is allocated and one of the corresponding smaller counters 540 is already saturated (counter B in the example of FIG. 5), snoop filter 130 is configured to allocate an entry in overflow array 250 with a larger counter 542. In the illustrated embodiment, snoop filter 130 tags the larger counter with the index of the smaller counter to which it corresponds. In this way, when a saturated counter 540 has a corresponding allocation or eviction, the counters index can be used to determine whether there is an overflow counter 542 allocated in array 250.”)], and
manage an overflow count stored by the overflow counter in response to requests to access the buffer associated with the one reference counter [figs. 4-5 pars. 0033-0039 – The overflow counter is incremented and decremented in place of the saturated counter. (“When a cache line is allocated for a saturated small counter in array 540, the corresponding large counter 542 is incremented instead. Similarly, when a cache line is evicted for a saturated small counter in array 540, the corresponding large counter 542 is decremented instead (assuming it has not yet reached its start value). Once the large counter 542 reaches its start value, it may be de-allocated and the corresponding small counter 540 may then be decremented on the next eviction.”)].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chu et al. to include overflow counters, as taught by Prasad et al. in order to reduce physical size requirements for the counters.
Claim 10:
Claim 10, directed to a method, is rejected for the same reasons set forth in the rejection of claim 1 above, mutatis mutandis.
Claim(s) 9 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu et al. (U.S. Patent No. 11,249,646) in view of Prasad et al. (Pub. No. US 2018/0349280) as applied to claim 1 and 10 above, respectively, and further in view of Kang et al. (Pub. No. US 2005/0176193).
Claim 9 (as applied to claim 1 above):
Chu et al. and Prasad et al. disclose all the limitations above but do not specifically disclose,
wherein the buffer array comprises SRAM.
In the same field of endeavor, Kang et al. disclose,
wherein the buffer array comprises SRAM [par. 0005 – “The SRAM device offers the benefits of rapid speed, low power consumption and a relatively simple structure. For these, and other, reasons, the SRAM device is popular in the semiconductor memory field. In addition, while information stored in the DRAM device needs to be periodically refreshed, a periodic refresh of information stored in the SRAM device is not necessary.”].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings of Chu et al. and Prasad et al. to include SRAM buffers, as taught by Kang et al., in order to provide improved performance and reduced power consumption.
Claim 16 (as applied to claim 10 above):
Claim 16, directed to a method, is rejected for the same reasons set forth in the rejection of claim 9 above, mutatis mutandis.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LARRY T MACKALL whose telephone number is (571)270-1172. The examiner can normally be reached Monday - Friday, 9am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald G Bragdon can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
LARRY T. MACKALL
Primary Examiner
Art Unit 2131
30 April 2026
/LARRY T MACKALL/Primary Examiner, Art Unit 2139