Prosecution Insights
Last updated: October 02, 2026
Application No. 18/916,778

PRINTED CIRCUIT BOARD

Non-Final OA §103
Filed
Oct 16, 2024
Priority
Dec 07, 2023 — DE 10 2023 212 333.9
Examiner
DINH, THAI T
Art Unit
Tech Center
Assignee
Robert Bosch GmbH
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
583 granted / 677 resolved
+26.1% vs TC avg
Minimal +0% lift
Without
With
+0.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
693
Total Applications
across all art units

Statute-Specific Performance

§101
3.1%
-36.9% vs TC avg
§103
51.3%
+11.3% vs TC avg
§102
21.4%
-18.6% vs TC avg
§112
21.7%
-18.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 677 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5-8 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Gurr et al (hereinafter Gurr, US 2017/0271952 A1) in view of Lee et al (hereinafter Lee, US 6,194,990 B1). For claim 1, Gurr discloses a printed circuit board in which a braking resistor is implemented that is configured as a clamping path (Figs. 1-2 of Gurr discloses a printed circuit board 30 in which a braking resistor 21 is implemented that is configured as a clamping path 36 – see Gurr, Figs. 1-2, paragraph [0026]). Figs. 1-2 of Gurr disclose an electrical braking circuit 20 including a braking resistor 21 and a braking switch 22, wherein the braking resistor 21 is realized as clamping path 36 on the circuit board 30. Gurr does not disclose that the clamping path is formed by at least two conductive layers within the printed circuit board that runs at a distance from one another and allows a current to flow back and forth. However, Lee discloses the clamping path which is formed by at least two conductive layers within the printed circuit board that run at a distance from one another and allow a current to flow back and forth (Figs. 10-11 of Lee disclose the resistor is formed by at least two conductive layers 34 and 38 within the printed circuit board 12 that run at a distance from one another via an insulating dielectric layer 36 and allow a current to flow back and forth – see Lee, Figs. 10-11, col. 5, lines 16-42. It is noted that Lee discloses the clamping path is formed by two layers resistor structure incorporated within a printed circuit board 26 and comprising first and second superimposed resistive layer 34 and 38 separated from one another by a dielectric layer 36. The resistive layers are electrically interconnected such that the current path extends along one resistive layer, passes to the other resistive layer, and extends back along the other resistive layer). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the conductor-path braking resistor 56 of Gurr in accordance with the multilayer resistor arrangement taught by Lee, such that the braking resistor is formed by at least two spaced conductive/resistive layers within the printed circuit board and the resistive current path extends back and forth between the layers for purpose of reducing the parasitic inductance of the conductor-path resistor and reducing the printed circuit board area occupied by the resistor. For claim 5, Gurr in view of Lee disclose all limitations as applied in claim 1 above, Gurr does not disclose a meander-shaped arrangement of the copper structure which is provided on the two layers of one or more cores of the printed circuit board. However, Lee discloses a meander-shaped arrangement of the copper structure which is provided on the two layers of one or more cores of the printed circuit board (see Lee, Figs. 5 and 10-11, col. 4, lines 38-55). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to provide the multilayer resistor structure of the Gurr in view of Lee with a meander-shaped arrangement of the copper structure as taught by Lee for purpose of providing an increased resistive path length within a limited printed circuit board area. For claim 6, Gurr disclose an intelligent current distributor (Fig. 1 of Gurr discloses an intelligent current distributor 1 which comprising a control unit 3 which is used to control operation of the electric motor M – see Gurr, Figs. 1-2, paragraphs [ 0023]-[0026]. Thus, the circuit 1 of Gurr ca. Furthermore, the recitation "an intelligent current distributor" has not been given patentable weight because it has been held that a preamble is denied the effect of a limitation where the claim is drawn to a structure and the portion of the claim following the preamble is a self-contained description of the structure not depending for completeness upon the introductory clause. Kropa v. Robie, 88 USPQ 478 (CCPA 1951)), comprising: at least one printed circuit board in which a braking resistor is implemented that is configured as a clamping path, wherein the clamping path is formed by at least two conductive layers within the printed circuit board that run at a distance from one another and allow a current to flow back and forth (similarity as claim 1 above, explanation is omitted). For claim 7, Gurr in view of Lee disclose the intelligent current distributor according to claim 6, wherein the intelligent current distributor is configured to disconnect a channel having consumers from another channel in an on-board electrical system, wherein the clamping path in the printed circuit board is configured to convert electrical energy fed in as a result of the disconnection into thermal energy (Gurr discloses the printed circuit board comprising a braking resistor (Gurr disclose the clamping path 36 in the printed circuit board 30 which is configured to convert electrical energy fed in as a result of the disconnection into thermal energy -- see Gurr, Figs. 2-3, paragraphs [0025] and [0033]. It is noted that the clamping path 36 comprising a braking resistor 21 which is used to convert extra electrical energy into heat). Claims 8 and 11 are "method" claims which are either same or similar to that of the "a printed circuit board" claim 1 or claim 6. Explanation is omitted. For claim 10, Gurr in view of Lee disclose the method according to claim 8, wherein the converting of the electrical energy into thermal energy reduces run-down times of an electric motor (see Gurr, paragraph [0003]). Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Gurr et al (hereinafter Gurr, US 2017/0271952 A1) in view of Lee et al (hereinafter Lee, US 6,194,990 B1), further in view of Tani et al. (hereinafter Tani, US 2002/0182958 A1). For claims 2 and 3, Gurr in view of Lee disclose all limitations as applied in claim 1 above. Gurr in view of Lee disclose the clamping path is formed by two layers. Gurr in view of Lee does not disclose two layers of a core of the printed circuit board. However, Tani discloses two layers of a core of the printed circuit board (Fig. 1 of Tani discloses a multilayer printed wiring board 1 comprising layers 20, 30, 40, and 50a of a core 10 of the printed circuit board 1 – see Tani, Fig. 1, paragraph [0039]), Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify multilayer conductive/resistive structure of Gurr in view of Lee to use multilayer printed-circuit board core construction taught by Tani for purpose of eliminating stress concentration and preventing excessive sheet thinning, metal cracking and buckling. For claim 4, Gurr in view of Lee disclose all limitations as applied to claim 1 above. Gurr in view of Lee do not disclose a layer including a woven fabric is arranged at least in portions between the at least two layers. However, Tani discloses a layer including a woven fabric is arranged at least in portions between the at least two layers (Figs. 1 and 2a-2d of Tani disclose a multilayer printed wiring board 1 comprising a core member 10 which contains at least one glass cloth 14 impregnated with a resin, wherein the glass cloth comprises woven glass yarns, each of which includes a bundle of glass filaments – see Tani, Figs. 1 and 2a-2d, abstract, paragraph [0043]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify multilayer conductive/resistive structure of Gurr in view of Lee to use multilayer printed-circuit board core construction taught by Tani for purpose of insulating portions of multilayer printed wiring boards, thereby providing mechanical reinforcement and electrical separation between conductive layers. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Gurr et al (hereinafter Gurr, US 2017/0271952 A1) in view of Lee et al (hereinafter Lee, US 6,194,990 B1), further in view of Peter et al. (hereinafter Peter, GE 10 2007 031 016 A1). For claim 9, Gurr in view of Lee disclose all limitation as applied to claim 8 above. Gurr in view of Lee disclose the converting of the electrical energy includes converting electrical energy fed in by switching currents into thermal energy (Fig. 1 of Gurr discloses an electrical braking circuit 20 including a braking resistor 21 and a braking switch 22 for converting of the electrical energy fed in by switching currents into thermal energy -- see Gurr, Fig. 1, paragraph [0025]). Gurr discloses the braking switch 22 which is silent for using MOSFETs. However, Figs. 7-8 of Peter disclose the braking switch 26/26’ which is MOSFETs – see Peter, Figs. 7-8, paragraphs [0029]-[0030]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Gurr’s braking switch to use MOSFETs taught by Peter for purpose of increasing reliability and durability. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAI T DINH whose telephone number is (571)270-3852. The examiner can normally be reached (571)270-3852. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eduardo Colon-Santana can be reached at (571)272-2060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THAI T DINH/Primary Examiner, Art Unit 2837 Sep 18, 2026
Read full office action

Prosecution Timeline

Oct 16, 2024
Application Filed
Sep 21, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
86%
With Interview (+0.2%)
2y 4m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 677 resolved cases by this examiner. Grant probability derived from career allowance rate.

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