Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner’s Comments
The examiner notes additional referenced not currently relied upon, but may be relevant: Gibiansky discloses a parameter based learning system and teaches that processors 202 are coupled via bus 220 (fig. 2, para. 62 discloses that processor 202 can be multiple processors coupled to memory via the bus), where a first processor can update the parameters of a second processor (claim 4) as part of a known computing architecture (para. 62). Gibiansky (US 20160110657 A1): It may have been obvious to one skilled in the art to implement the updated parameters of the ANR system of Christopher using the processor architecture taught by Gibiansky for the purpose of conforming to well known standards and architectures (such as the RISC and CISC architectures in para. 62) in order to implement the processor based functions of the system of Cohen and Christopher
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12148413. Although the claims at issue are not identical, they are not patentably distinct from each other because the application claim 1 claims the same device claimed in the patent, noting the detect an spl as recited in the application is part of detecting instability or error condition events as recited in the patent, and also the first and second processor as claimed in the patent claim 1 require the first DSP processor functions at lower latency relative to the second as recited in the application
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The following claims 1-6,9-16,19,20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (US 20070255435 A1) and further in view of Christopher et al (US 20140363010 A1).
As per claim 1,11, Cohen discloses a personal active noise reduction (ANR) device, comprising:
An audio communication interface configured to receive a source audio stream (inputs to receive signal 70 in fig. 5) and also control signals (71);
a driver (58);
a microphone system 64,66; and
an ANR computational architecture comprising:
a first DSP processor configured to:
receive the source audio stream and signals from the microphone system, perform ANR on the source audio stream (at least the squelch function per para 104) according to a core algorithm using a set of operational parameters stored in the first DSP processor (the cited functions, as digital require corresponding parameters and software to be implemented), and output a processed audio stream to the driver; (the device to interface the signals from 64,66,51 in order to output to the driver 58) in order to output processed audio stream to a driver 58 (as shown in fig. 5),
a second DSP processor configured to perform the
detect at least one of a sound pressure level (SPL) or a performance characteristic; and alter the set of operational parameters on the first DSP (para. 104, used in conjunction with dynamic range compression as applied to hearing aids to reduce the gain for very low level inputs. The gain adjustment is a function of the power of the input signal/ the second DSP deviating from a corresponding threshold or rule, noting that inputs from microphones are by nature an indication of SPL); and
and a general purpose processor 83,86,87 is operationally coupled to at least a first and second DSP ( (the first and second processors in fig. 5, are implemented via a general processor implementing the timing and synchronization between each delineated processor/logical or physical element in fig. 5) operationally coupled to the first DSP processor and the second DSP processor and configured to: achieve a desired user experience in response to at least one of the SPL or the performance characteristic detected by the second DSP deviating from a corresponding threshold or rule (the functions/algorithms in block 81 achieve a desired user experience by contributing to the core audio processing algorithm which comprises adjusting the gain of the signal based on measured environmental noise as cited above),
wherein the first DSP processor and the second DSP processor share signals over a common bus 70 (fig. 5) that is also accessible by the GP processor (the GP processor requires access to all disclosed elements in Fig. 5 in order to provide the powering and synchronization between those elements when implemented),
Wherein the first DSP processor and second DSP processor operate at different speeds in which the first DSP processor function with a lower latency relative to the second DSP processor (DSP 2 comprises determining a single parameter, while DSP 1 comprises performing the remainder of the ANR functions and inputting and outputting the audio, therefore DSP 1 requires a /higher bandwidth/higher speed/lower latency for the purpose of being synchronized to DSP2 which requires relatively less bandwidth and speed/higher latency).
However, Cohen does not disclose the particular hardware implementation of the cited functions notably, with the general ANR and DAC and ADC performed by first DSP, and the operational state analysis and detection performed by second a DSP.
Christopher discloses a personal ANR device and teaches that it comprises an ANR architecture comprising (in fig. 4):
a first DSP processor (the summation stage in fig. 4) configured to:
receive the source audio stream (from 205) and signals from the microphone system (output of Kfb and 222), perform ANR on the source audio stream according to a set of operational parameters (the parameters defining the gain at 224 and 222) stored in the first DSP processor, where ANR comprises a core algorithm in order to apply the gain parameters to the audio stream, and output a processed audio stream to the driver (the input to the DAC);
a second DSP processor (208,206) configured to:
generate state data in response to an analysis of at least one of the source audio stream, signals from the microphone system (input to 210), and the processed audio stream (input to 212); and
alter the set of operational parameters on the first DSP processor (via outputs from 220 and 216); and
the general purpose processor (the means of powering, implementing and synchronizing the algorithms defining each of the first and second DSP) additionally configured to:
process state data from the second DSP processor (the general processor implements, powers and synchronizes the determination of the state defined by the outputs of 212 and 216, and the state defined by the outputs of 210 and 214), and alter the set of operational parameters on the first DSP processor (via enabling, powering and synchronizing the signals from 218 and 220 to alter the operation parameters defining the gain applied by the processing 224 and 222 in the first DSP).
Christopher further teaches
Christopher teaches that this allows for stability in the ANR headphone. It would have been obvious to one skilled in the art that the DSP algorithms of Cohen could comprise the architecture taught by Christopher with the general ANR performed by one DSP and the analysis of the audio to generate state indicators performed by the second DSP for the purpose providing ANR with stability for the personal ANR device.
Where the combined system requires a common bus between each of the first and second DSP’s and the general purpose processor for the purpose of providing at least the timing/synchronization/clock signaling to each digital stage described above as required by all digital processor based systems.
As per claims 2,12, The ANR device of claim 1, wherein at least one of the second DSP or the GP processor communicate signals to the first DSP processor over the common bus to alter the set of operational parameters stored in the first DSP processor (the parameters are updated per the gains adjusted via the detected signal level, which are relative to the timing/clock signaling between the processor per the claim 1 rejection).
As per claim 3,13, wherein achieving the desired user experience includes analyzing sensor data to provide feedback to a gateway device (the signal level feedback via the microphone/environmental noise as used to adjust gains/gateway device which filters the signal accordingly in response to the detected signal level).
As per claim 4,14, Cohen does not disclose wherein achieving the desired user experience includes coordinating performance between earphones in a pair of headphones. The examiner takes official notice it would have been well known in the art at the time of filing to implement and earpiece as multiple synchronized earpieces for the purpose of providing stereo audio to the user.
As per claim 5,15, the GP processor is configured to determine that a first earphone is operating at a low ANR performance level (the GP processor determines low ANR performance whenever it determines that an operating parameter such as the gain cited above, needs to be modified).
As per claim 6,16, in response to determining that the first earphone is operating at the low ANR performance level, the GP processor causes a second earphone to approximately match the low ANR performance level of the first earphone. Since the earpiece, when implemented as a stereo pair of earpieces, requires adjustments to gain per the claim 1 rejection, said adjustments must be made in synchrony to each earpiece for the purpose of maintaining the stereo image because signal amplitude directly affects the stereo image between a pair of earphones.
As per claim 9,19, wherein the GP processor utilizes a machine learning model to achieve the desired user experience (the model adapts over time via the adapted gain parameters per the claim 1 rejection).
As per claim 10,20, The ANR device of claim 9, wherein the machine learning model evaluates state data received from the second DSP and time-based signals collected from the microphone system or communication interface (the audio from the microphone is analyzed over time and the gain values are updated based on state data per the claim 1 rejection).
The following claims 7,17,8,18, is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al (US 20070255435 A1) in view of Christopher et al (US 20140363010 A1) as applied to claim 1,11 and further in view of Ji et al (US 20200107110 A1).
As per claim 7,17, Cohen and Christopher do not disclose achieving the desired user experience includes outputting a warning that the device is not properly fitted on a user of the ANR device.
Ji discloses a stereo earphone system and teaches to have the earphones per para 173: configured to send the user an alert indicating such and possibly instruct the user to make certain adjustments to the fit of the wireless listening device 700. Ji teaches that this informs the user what adjustments to make. It would have been obvious to one skilled at the art at the time of filing that the earphone could alert the user if improperly fitted for the purpose of better informing the user.
As per Claim 8,18, the warning is output from the communications device (Ji discloses an alert sent to the user by the wireless earpiece, and further teaches that the device can notify with audio/via the communications interface per para 81: so that speaker 123 can emit audible noise capable of being heard by a user for notification purposes).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER KRZYSTAN whose telephone number is 571-272-7498, and whose email address is alexander.krzystan@uspto.gov
The examiner can usually be reached on m-f 7:30-4:00 est.
If attempts to reach the examiner by telephone or email are unsuccessful, the examiner’s supervisor, Fan Tsang can be reached on (571) 272-7547.
The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300 for regular communications and 571-273-8300 for After Final communications.
/ALEXANDER KRZYSTAN/Primary Examiner, Art Unit 2653
Examiner Alexander Krzystan
June 2, 2026
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