Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-2 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-2 of U.S. Patent No. 12,211,438. Although the claims at issue are not identical, they are not patentably distinct from each other because all aspects of the instant claims are wholly encompassed by and thus anticipated by the patented claims, as seen by the chart below.
Instant Application
12,211,438
1. A display substrate, comprising: a base substrate; and a plurality of sub-pixels on the base substrate, wherein the plurality of sub-pixels are arranged in a plurality of rows and a plurality of columns, each sub-pixel comprises a light-emitting element and a pixel circuit for driving the light-emitting element to emit light, and the light-emitting element is configured to emit light according to a driving current that is received; the pixel circuit comprises a driving circuit, a data writing circuit, a storage circuit, and a light-emitting control circuit; the driving circuit comprises a control end, a first end, and a second end, and is configured to control the driving current flowing through the light-emitting element, the first end of the driving circuit receives a first voltage of a first voltage line, and the second end of the driving circuit is connected to the light-emitting control circuit; the data writing circuit is connected to the control end of the driving circuit, and is configured to write a data signal into the control end of the driving circuit in response to a first scan signal; a first end of the light-emitting control circuit is connected to the second end of the driving circuit, a second end of the light-emitting control circuit is connected to a first electrode of the light-emitting element, and the light-emitting control circuit is configured to apply the driving current to the light-emitting element in response to a light-emitting control signal; a first end of the storage circuit is connected to the control end of the driving circuit, a second end of the storage circuit is connected to the second end of the light-emitting control circuit, and the storage circuit is configured to store the data signal written by the data writing circuit;
and orthographic projections of at least part of pixel circuits of every two adjacent sub-pixels in a same row of the plurality of sub-pixels on the base substrate are mirror-symmetrical.
2. The display substrate according to claim 1, wherein the plurality of sub-pixels are divided into a plurality of pixel units, each pixel unit at least comprises three adjacent sub-pixels located in a same row, and each pixel unit comprises a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in sequence along a first direction; a data writing circuit in a pixel circuit of the first sub-pixel is connected to a first data line to receive a corresponding data signal; a data writing circuit in a pixel circuit of the second sub-pixel is connected to a second data line to receive a corresponding data signal; a data writing circuit in a pixel circuit of the third sub-pixel is connected to a third data line to receive a corresponding data signal; the first data line, the second data line, and the third data line extend in a second direction, and the second direction is perpendicular to the first direction, wherein the first data line is on a side of the first sub-pixel away from the second sub-pixel, and the second data line and the third data line are between the second sub-pixel and the third sub-pixel; or the first data line and the second data line are between the first sub-pixel and the second sub-pixel, and the third data line is on a side of the third sub-pixel away from the second sub-pixel.
1. A display substrate, comprising: a base substrate; and a plurality of sub-pixels on the base substrate, wherein the plurality of sub-pixels are arranged in a plurality of rows and a plurality of columns, each sub-pixel comprises a light-emitting element and a pixel circuit for driving the light-emitting element to emit light, and the light-emitting element is configured to emit light according to a driving current that is received; the pixel circuit comprises a driving circuit, a data writing circuit, a storage circuit, a first control circuit, a second control circuit, and a light-emitting control circuit; the driving circuit comprises a control end, a first end, and a second end, and is configured to control the driving current flowing through the light-emitting element, the first end of the driving circuit receives a first voltage of a first voltage line, and the second end of the driving circuit is connected to the light-emitting control circuit; the data writing circuit is connected to the control end of the driving circuit, and is configured to write a data signal into the control end of the driving circuit in response to a first scan signal; a first end of the light-emitting control circuit is connected to the second end of the driving circuit, a second end of the light-emitting control circuit is connected to a first electrode of the light-emitting element, and the light-emitting control circuit is configured to apply the driving current to the light-emitting element in response to a light-emitting control signal; a first end of the storage circuit is connected to the control end of the driving circuit, a second end of the storage circuit is connected to the second end of the light-emitting control circuit, and the storage circuit is configured to store the data signal written by the data writing circuit;
the first control circuit is connected to the control end of the driving circuit, and is configured to write a reference voltage into the control end of the driving circuit in response to a second scan signal; the second control circuit is connected to the first electrode of the light-emitting element, and is configured to write an initial voltage into the first electrode of the light-emitting element in response to a third scan signal;
and orthographic projections of at least part of pixel circuits of every two adjacent sub-pixels in a same row of the plurality of sub-pixels on the base substrate are mirror-symmetrical.
2. The display substrate according to claim 1, wherein the plurality of sub-pixels are divided into a plurality of pixel units, each pixel unit comprises three adjacent sub-pixels located in a same row, and each pixel unit comprises a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in sequence along a first direction; a data writing circuit in a pixel circuit of the first sub-pixel is connected to a first data line to receive a corresponding data signal; a data writing circuit in a pixel circuit of the second sub-pixel is connected to a second data line to receive a corresponding data signal; a data writing circuit in a pixel circuit of the third sub-pixel is connected to a third data line to receive a corresponding data signal; the first data line, the second data line, and the third data line are parallel to each other and extend in a second direction, and the second direction is perpendicular to the first direction; and
an orthographic projection of the pixel circuit of the first sub-pixel and an orthographic projection of the pixel circuit of the second sub-pixel on the base substrate are mirror-symmetrical with respect to a center line between the first data line and the second data line, and the orthographic projection of the pixel circuit of the second sub-pixel and an orthographic projection of the pixel circuit of the third sub-pixel on the base substrate are mirror-symmetrical with respect to a center line between the second data line and the third data line.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID D DAVIS whose telephone number is (571)272-7572. The examiner can normally be reached Monday - Friday, 8 a.m. - 4 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DAVID D DAVIS/Primary Examiner, Art Unit 2627
DDD
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