DETAILED ACTION
This is the initial Office action based on the application filed October 17, 2024.
Claims 1-20 are pending and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statement filed 10/17/2024 has been considered. An initialed copy of Form 1449 is enclosed herewith.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Windh (US 2022/0206846).
Regarding claim 1, Windh discloses:
generating, via a host, a first thread of a process (see at least paragraph 131, calls originating from the HIF (host interface and dispatch module) are issued by a host processor and are defined as a master thread);
generating, via the first thread, a second thread, the first thread configuring the second thread as a proxy of the first thread (see at least paragraph 28, the thread creates a new thread to process one half of the work and continues working; paragraph 54, the HIF can dispatch new threads of execution on processor or compute elements of the HTP or HTF); and
executing the second thread on an accelerator (see at least paragraph 133, an HTP thread can execute a thread create instructions to initiate a thread on an accelerator resource)
Regarding claim 5, the rejection of claim 1 is incorporated, and Windh further discloses:
configuring, via the host, the first thread to execute on a processor of the host (see at least paragraph 131, calls originating from the HIF (host interface and dispatch module) are issued by a host processor and are defined as a master thread); and
configuring, via the first thread, the second thread to execute on the accelerator (see at least paragraph 133, an HTP thread can execute a thread create instructions to initiate a thread on an accelerator resource)
Regarding claim 6, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein, upon completing execution, the second thread provides a result of the execution to the first thread (see at least paragraph 134, information that is returned when the created thread completes, when a thread completes the thread writes its return information for use by the parent thread)
Regarding claim 7, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the first thread determines execution of the second thread is complete based on the first thread periodically polling the second thread (see at least paragraph 136, a parent thread determines if a child has completed)
Regarding claim 8, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the accelerator executing the second thread is viewed by the host as the first thread executing on a processor of the host (see at least paragraphs 28 and 30, balanced thread tree)
Regarding claim 9, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the first thread configuring the second thread comprises the first thread populating a memory location on a memory of the host that is accessible by the accelerator (see at least paragraph 54, the HIF can be configured to facilitate access to host-based command request queues and response queues)
Regarding claim 10, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the first thread configuring the second thread comprises the first thread populating a memory location of a memory of the accelerator (see at least paragraph 51, SIF (scale fabric interface module) can facilitate communication between the first memory compute device and a device space such as a PGAS so memory-compute devices can access memory or other resources on a different memory-compute device)
Regarding claim 11, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the first thread configuring the second thread comprises the first thread passing a message to the second thread that bypasses a processor of the host (see at least paragraph 51, SIF (scale fabric interface module) can facilitate communication between the first memory compute device and a device space such as a PGAS)
Regarding claim 12, the rejection of claim 1 is incorporated, and Windh further discloses:
waking the first thread from a sleep state based on the second thread detecting a system interrupt and the second thread sending a wake-up command to the first thread; and pausing execution of the second thread (see at least paragraph 77, a thread can be paused when it waits for other pending events to complete, allows threads to initialize or wake-in; paragraph 134, waiting for a parent thread to execute a thread join)
Regarding claim 13, the rejection of claim 12 is incorporated, and Windh further discloses:
processing, via the first thread, the system interrupt; and resuming execution of the second thread based on the second thread receiving a resume command from the first thread (see at least paragraph 77, a thread can be paused when it waits for other pending events to complete, allows threads to initialize or wake-in)
Regarding claim 14, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the first thread requests a metric from the second thread based on the first thread receiving a request for the metric from the host (see at least paragraph 167, measuring in a master thread a workload to produce a metric; paragraph 174, measuring the second member to produce a second metric)
Regarding claim 15, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the host requests a metric from the second thread based on the host detecting that the second thread is the proxy of the first thread (see at least paragraph 167, measuring in a master thread a workload to produce a metric; paragraph 174, measuring the second member to produce a second metric)
Regarding claim 16, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the host fetches a metric from a memory location of the accelerator to determine a status associated with execution of the second thread (see at least paragraph 136, returning thread completion status to the initiating parent thread; paragraph 135, reserving space for returned information)
Regarding claim 17, the rejection of claim 1 is incorporated, and Windh further discloses:
wherein the second thread comprises a pre-compiled binary packaged as a multiarchitecture binary (see at least paragraph 57, HTF accelerator can be designed to enable programming of the HTF using a high-level programming language and the compiler can generate a binary file that runs on the HTF hardware; paragraph 97, 182)
Regarding claims 18 and 20, the scope of the instant claims does not differ substantially from that of claim 1 and the claims are rejected for the same reasons.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-4 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Windh (US 2022/0206846) in view of Tsirkin (US 2019/0179767).
Regarding claim 2, the rejection of claim 1 is incorporated. However, Windh does not explicitly disclose, but Tsirkin discloses:
wherein: the first thread is generated in a user memory space of the host, and the first thread enters a sleep state in a kernel memory space of the host (see at least page 14, a thread in the user space; paragraph 45, kernel may place the thread to sleep, using the monitor processing thread to handle events may move tasks from the kernel to the user-space memory processing thread reducing the burden on the kernel)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Windh by adapting the teachings of Tsirkin to include the thread entering a sleep state in the kernel memory space. The combination allows for reducing the burden on the kernel improving performance (Tsirkin ¶13, 45).
Regarding claim 3, the rejection of claim 2 is incorporated, and Windh further discloses:
wherein the first thread places itself in the sleep state based on the second thread executing on the accelerator (see at least paragraph 77, a thread can be paused when it waits for other pending events to complete)
Regarding claim 4, the rejection of claim 2 is incorporated, and Windh further discloses:
and the second thread executes in a memory space of the accelerator (see at least paragraph 24, hybrid threading fabric accelerator; paragraph 76; paragraph 132)
However, Windh does not explicitly disclose, but Tsirkin discloses:
wherein: the second thread is generated in the kernel memory space of the host, (see at least paragraph 20, processing thread may be managed by the kernel or part of the kernel)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Windh by adapting the teachings of Tsirkin to include the thread in the kernel space. The combination allows for reducing the burden on the kernel improving performance (Tsirkin ¶13, 45).
Regarding claim 19, the scope of the instant claim does not differ substantially from that of claim 2 and is rejected for the same reasons.
Conclusion
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/KIMBERLY L JORDAN/Examiner, Art Unit 2194
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