CTNF 18/920,762 CTNF 91888 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Objections 07-29-01 AIA Claim (s) 13, 17, 18 is/are objected to because of the following informalities: claim 13, in line 3, “an indication” should be corrected as “the indication”. claim 17, in line 3, “an indication” should be corrected as “a second indication”. claim 18, in line 4, “an indication” should be corrected as “the second indication”. claim 18, in line 7, “an indication” should be corrected as “the second indication” . Appropriate correction is required. Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claim(s) 20 is/are rejected under 35 U.S.C. 101 as the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because the claim(s) is/are directed to a signal per se (see MPEP § 2106, subsection I). Claim(s) 20 recites A computer-readable medium storing computer executable code. PG-Pub US 20260111992 A1 of the instant application recites “[0146] In this manner, computer-readable media generally may correspond to (1) tangible computer-readable storage media, which is non-transitory or (2) a communication medium such as a signal or carrier wave ”, which indicates the computer-readable medium could be a signal. As an additional note, a non-transitory computer readable medium having executable programming instructions stored thereon is considered statutory as non-transitory computer readable media excludes transitory data signals. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-3, 13-16, 19-20 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Cha et al. (US 20210176396) . Regarding claim 1, Cha discloses An apparatus for image processing, comprising: at least one memory; and at least one processor coupled to the at least one memory and, based at least in part on information stored in the at least one memory, the at least one processor, individually or in any combination, is configured to (Cha, fig. 15, “[0108] The working memory 5000 may store programs and/or data that the AP 4000 processes or executes. The storage 6000 may store data and/or program with respect to an execution algorithm that controls the image processing operation of the ISP 2000, and when the image processing operation is performed, the data and/or program may be loaded into the working memory 5000”) : obtain data for each of a set of frames associated with the image processing (Cha, “[0021] Referring to FIG. 1, the device 10 is capable of capturing and/or storing an image of an object using a solid-state image sensor such as a charge-coupled device and a complementary metal oxide semiconductor (CMOS) and may be implemented in a digital camera, a digital camcorder, a mobile phone, or a tablet computer, or any other portable device. [0027] The image sensor 100 may convert an optical signal of a subject (or an object) incident through an optical lens into an electrical signal, generate image data for each frame based on electrical signals, and output the generated image data to the image processor 250.”) ; allocate at least one first processing engine in a plurality of processing engines for processing the data for each of the set of frames (Cha, FIG.2, “[0035] Referring to FIG. 1, a first channel 310 to a third channel 330 of the ISP 300 may be configured to process image frames of different resolutions, respectively. That is, the channel allocator 200 may determine the frame information FI from the received signal, and set the path such that signals corresponding to the high-resolution image frame and the low-resolution image frame pass through different channels. In other words, the channel allocator 200 may dynamically allocate the high-resolution image frame and the low-resolution image frame to different channels according to resolution”. Therefore, different channels correspond to a plurality of processing enginers) ; and output, for the at least one first processing engine, an indication to process the data for each of the set of frames (Cha, “[0085] The image sensor 100 may generate the frame information FI related to the resolution of the image in the form of a virtual channel ID or in the form of embedded data based on a previously determined channel standard (e.g., the MIPI standard) (S120). The frame information FI may be generated according to the resolution of the image, but is not limited thereto. A signal carrying the generated frame information FI is output to the channel allocator 200. The frame information FI may be carried as header information of the signal”) . Regarding claim 19, it is interpreted and rejected for the same reasons set forth in claim 1. Regarding claim 20, it recites similar limitations as claim 1, except that it further recites a computer-readable medium storing computer executable code, the code when executed by at least one processor causes the at least one processor to… Cha further discloses “[0108] The working memory 5000 may store programs and/or data that the AP 4000 processes or executes. The storage 6000 may store data and/or program with respect to an execution algorithm that controls the image processing operation of the ISP 2000, and when the image processing operation is performed, the data and/or program may be loaded into the working memory 5000”. Regarding claim 2, Cha discloses The apparatus of claim 1. Cha further discloses wherein the at least one processor, individually or in any combination, is further configured to: analyze the data for each of the set of frames associated with the image processing in order to determine the at least one first processing engine in the plurality of processing engines (Cha, “[0022] The device 10 according to the inventive concept may capture an image of a subject (or an object) for each frame. Based on a mode signal MODE generated according to a user's capture command CAPTURE, the device 10 senses a low-resolution image or a high-resolution image. [0023] The device 10 according to the inventive concept may read the channel information from the frame information FI to determine the resolution of the captured image frame. That is, the device 10 may set a path such that the high-resolution image frame and the low-resolution image frame pass through different channels. That is, the device 10 may dynamically allocate the high-resolution image frame and the low-resolution image frame according to resolution”) . Regarding claim 3, Cha discloses The apparatus of claim 2. Cha further discloses wherein to analyze the data for each of the set of frames associated with the image processing in order to determine the at least one first processing engine in the plurality of processing engines, the at least one processor, individually or in any combination, is configured to: identify an identifier for the data for each of the set of frames (Cha, “[0022] Frame information FI may be generated to distinguish a low-resolution image frame from a high-resolution image frame among sensed image frames. [0023] The device 10 according to the inventive concept may read the channel information from the frame information FI to determine the resolution of the captured image frame. [0032] According to an embodiment of the inventive concept, the channel allocator 200 may read the frame information FI based on the received signal and determine the resolution of the received current image frame”) . Regarding claim 13, Cha discloses The apparatus of claim 1. Cha further discloses obtain an indication of an array of a set of channels for the image processing (Cha, “[0023] The device 10 according to the inventive concept may read the channel information from the frame information FI to determine the resolution of the captured image frame. [0035] That is, the channel allocator 200 may determine the frame information FI from the received signal, and set the path such that signals corresponding to the high-resolution image frame and the low-resolution image frame pass through different channels”) . Regarding claim 14, Cha discloses The apparatus of claim 13. Cha further discloses wherein the set of channels is a set of virtual channels (VCs), and wherein to obtain the indication of the array of the set of channels for the image processing, the at least one processor, individually or in any combination, is configured to: receive, from a camera software, the indication of the array of the set of channels (Cha, “[0021] Referring to FIG. 1, the device 10 is capable of capturing and/or storing an image of an object using a solid-state image sensor such as a charge-coupled device and a complementary metal oxide semiconductor (CMOS) and may be implemented in a digital camera, a digital camcorder, a mobile phone, or a tablet computer, or any other portable device. [0030] The image sensor 100 according to the inventive concept may generate the frame information FI in accordance with a standardized channel standard or an arbitrary channel standard determined by a product producer group to distinguish whether the sensed image frame has low-resolution or high-resolution. The generated frame information FI may be transmitted to the image processor 250. [0085] The image sensor 100 may generate the frame information FI related to the resolution of the image in the form of a virtual channel ID or in the form of embedded data based on a previously determined channel standard (e.g., the MIPI standard) (S120)”) . Regarding claim 15, Cha discloses The apparatus of claim 1. Cha further discloses wherein the data for each of the set of frames includes at least one of sensor data, image data, metadata, or camera data for each of the set of frames, wherein the set of frames is a set of image frames or a set of camera frames (Cha, “[0022] The device 10 according to the inventive concept may capture an image of a subject (or an object) for each frame. Frame information FI may be generated to distinguish a low-resolution image frame from a high-resolution image frame among sensed image frames”) , and wherein to obtain the data for each of the set of frames associated with the image processing, the at least one processor, individually or in any combination, is configured to: receive, from a camera sensor, the data for each of the set of frames (Cha, “[0032] The channel allocator 200 may receive image data which is an output signal of the output buffer of the image sensor 100, and set a path such that different image frames having different resolutions pass through different channels based on the image data”) . Regarding claim 16, Cha discloses The apparatus of claim 1. Cha further discloses transmit the indication to process the data for each of the set of frames; or store the indication to process the data for each of the set of frames (Cha, “[0022] For example, the channel information may be stored in a header of a transmitted signal, and may be transmitted to another intellectual property (IP) through a virtual channel without using additional data storage space. [0030] The generated frame information FI may be transmitted to the image processor 250”) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al. (US 20210176396) in view of Nakazato et al. (US 20220360673) . Regarding claim 4, Cha discloses The apparatus of claim 3. On the other hand, Cha fails to explicitly disclose but Nakazato discloses wherein the identifier is a virtual channel number for at least one line in a set of lines of the data for each of the set of frames (Nakazato, “[0064] The frame information 120C includes the number of a virtual channel assigned to each frame, the data type of each region of interest ROI, the payload length per line, etc., for example. [0068] The ECC generating section 142 generates an error correcting code for a line in the frame information 120C, for example, on the basis of the data of the line, e.g., the number of the virtual channel, the data type of each region of interest ROI, the payload length per line, etc. [0073] According to the present embodiment, the number of a common virtual channel is assigned to a VC of each line”) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Cha and Nakazato, to include all limitations of claim 4. That is, adding the number of virtual channel of Nakazato to the frame information FI of Cha. The motivation/ suggestion would have been to realize a correcting process for correcting a defective image in a region of interest (ROI) that is a partial region segmented from a captured image (Nakazato, [0011]) . 07-21-aia AIA Claim (s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al. (US 20210176396) in view of Nakazato et al. (US 20220360673), and further in view of Mizuguchi (US 20150189108) . Regarding claim 5, Cha in view of Nakazato discloses The apparatus of claim 4. On the other hand, Cha in view of Nakazato fails to explicitly disclose but Mizuguchi discloses wherein the virtual channel number for the at least one line in the set of lines of the data corresponds to a camera sensor that is associated with obtaining the data for the set of frames (Mizuguchi, fig.3, “[0058] The controller 11 outputs the signals shown in FIG. 3, namely, the frame signal in common from the cameras 10a and 10b, the respective line signals on the basis of the cameras 10a and 10b, the respective data signals, the frame VC number designation signals and the line VC number designation signals, the latter two signals being in accordance with the assigned virtual channel numbers.”) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Mizuguchi into the combination of Cha and Nakazato, to include all limitations of claim 5. That is, applying the number of virtual channel corresponding to a camera of Mizuguchi to the virtual channel number of Nakazato and Cha. The motivation/ suggestion would have been to transmit each image data within one frame using a plurality of virtual channels (Mizuguchi, [0005]) . 07-21-aia AIA Claim (s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al. (US 20210176396) in view of LIU et al. (US 20230244932) . Regarding claim 9, Cha discloses The apparatus of claim 2. Cha further discloses wherein to analyze the data for each of the set of frames, the at least one processor, individually or in any combination, is configured to: determine whether the data for each of the set of frames corresponds to at least one channel in an array of a set of channels for the image processing (Cha, “[0023] The device 10 according to the inventive concept may read the channel information from the frame information FI to determine the resolution of the captured image frame. Based on the frame information FI, when it is determined that the current image frame is a low-resolution image frame, the device 10 may allocate a signal in regard to the low-resolution image frame to a low-resolution channel with optimized environment configurations to process the low-resolution image frame”). On the other hand, Cha fails to explicitly disclose but LIU discloses wherein the at least one first processing engine is at least one first finite state machine (FSM) and the plurality of processing engines is a plurality of FSMs (LIU, “[0099] Optionally, the number of FSMs 63 embedded in the feature extraction network 61 of the target recognition network 6 and embedded points may be adjusted according to actual requirements, which is not limited. [0106] Optionally, in this embodiment, the target occlusion image may be used as the input of the feature extraction network (specifically, the first feature extraction layer of the feature extraction network) of the target recognition model, the target occlusion region may be used as the input of each FSM embedded in the feature extraction network”) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Cha and LIU, to include all limitations of claim 9. That is, adding the FSMs of LIU to the channels of Cha. The motivation/ suggestion would have been to reduce the influence of the information filled in the occlusion region by the feature extraction network on the target recognition result, thereby improving the accuracy of the target recognition result (LIU, [0100]) . 07-21-aia AIA Claim (s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al. (US 20210176396) in view of Wang (20210183035) . Regarding claim 10, Cha discloses The apparatus of claim 1. On the other hand, Cha fails to explicitly disclose but Wang discloses determine whether each of the plurality of processing engines is temporarily occupied for processing the data for each of the set of frames; identify that the at least one first processing engine in the plurality of processing engines is not temporarily occupied for processing the data for the set of frames; and map the at least one first processing engine to the data for each of the set of frames (Wang, “[0035] When the image inspecting unit 200a is assigned with images 300a and running the model 52 to inspect the images 300a, it means that the image inspecting unit 200a is busy. In this circumstance, the images 300b is assigned to the idle image inspecting unit 200b. It is assumed that the images 300a are all inspected by the model 52 and no more images 300a are assigned to the image inspecting unit 200a during assigning the images 300b to the image inspecting unit 200b, it means that the image inspecting unit 200a is idle. [0039] The assigner 40 additionally assigns (or dispatches) at least another one of the images 300a to the image inspecting unit 200b when the image inspecting unit 200b is idle (step S605). It should be noted that when the image inspecting unit 200b is not idle, the assigner 40 may not additionally assign at least another one of images 300a to the image inspecting unit 200b”) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Cha and Wang, to include all limitations of claim 10. That is, adding the disclosure set forth by Wang to the image processor of Cha. The motivation/ suggestion would have been for manufacturing a product to achieve the load balance in an assembly line (Wang, [0003]) . 07-21-aia AIA Claim (s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al. (US 20210176396) in view of Schaub et al. (US 11829237) . Regarding claim 17, Cha discloses The apparatus of claim 1. On the other hand, Cha fails to explicitly disclose but Schaub discloses obtain an indication that the at least one first processing engine is finished processing the data for each of the set of frames (Schaub, col.12, lines 12-15, “Also, all companion DMA engines (those aborted and those not aborted) finish the current frame with their buffer pointers at the end of the frame and send the frame done message (block 830)”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Cha and Schaub, to include all limitations of claim 17. That is, adding the disclosure set forth by Schaub to the image processor of Cha. The motivation/ suggestion would have been to efficiently streaming data between multiple agents (Schaub, col.1, lines 9-10) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim (s) 6-8, 11-12, 18 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 6, it recites, wherein the at least one line in the set of lines of the data for each of the set of frames is a start-of-frame (SOF) line in the set of lines, wherein the allocation of the at least one first processing engine is based on the at least one line being the SOF line. None of the prior arts on the record or any of the prior arts searched, alone or in combination, renders obvious the combination of elements recited in the claim(s) as a whole. Regarding claim 7, it recites, wherein the at least one line in the set of lines of the data for each of the set of frames is prior to a start-of-frame (SOF) line in the set of lines, and wherein the at least one processor, individually or in any combination, is further configured to: discard the data for each of the set of frames prior to the allocation of the at least one first processing engine. None of the prior arts on the record or any of the prior arts searched, alone or in combination, renders obvious the combination of elements recited in the claim(s) as a whole. Regarding claim 8, it recites, wherein the at least one line in the set of lines of the data for each of the set of frames is subsequent to a start-of-frame (SOF) line in the set of lines, and wherein the at least one processor, individually or in any combination, is further configured to: transmit the data for each of the set of frames subsequent to the allocation of the at least one first processing engine. None of the prior arts on the record or any of the prior arts searched, alone or in combination, renders obvious the combination of elements recited in the claim(s) as a whole. Regarding claim 11, it recites, determine, based on a particular processing engine in the plurality of processing engines being temporarily occupied for processing the data for each the set of frames, a first virtual channel number for data that is currently being processed by the particular processing engine. None of the prior arts on the record or any of the prior arts searched, alone or in combination, renders obvious the combination of elements recited in the claim(s) as a whole. Regarding claim 18, it recites, receive, from a camera sensor, an indication of an end-of-frame (EOF) line for each of the set of frames, and wherein the at least one processor, individually or in any combination, is further configured to: output, for the at least one first processing engine, an indication to release the at least one first processing engine from processing the data for each of the set of frames. None of the prior arts on the record or any of the prior arts searched, alone or in combination, renders obvious the combination of elements recited in the claim(s) as a whole . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRACE Q LI whose telephone number is (571)270-0497. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRACE Q LI/Primary Examiner, Art Unit 2618 5/29/2026 Application/Control Number: 18/920,762 Page 2 Art Unit: 2618 Application/Control Number: 18/920,762 Page 3 Art Unit: 2618 Application/Control Number: 18/920,762 Page 4 Art Unit: 2618 Application/Control Number: 18/920,762 Page 5 Art Unit: 2618 Application/Control Number: 18/920,762 Page 6 Art Unit: 2618 Application/Control Number: 18/920,762 Page 7 Art Unit: 2618 Application/Control Number: 18/920,762 Page 8 Art Unit: 2618 Application/Control Number: 18/920,762 Page 9 Art Unit: 2618 Application/Control Number: 18/920,762 Page 10 Art Unit: 2618 Application/Control Number: 18/920,762 Page 11 Art Unit: 2618 Application/Control Number: 18/920,762 Page 12 Art Unit: 2618 Application/Control Number: 18/920,762 Page 13 Art Unit: 2618 Application/Control Number: 18/920,762 Page 14 Art Unit: 2618 Application/Control Number: 18/920,762 Page 15 Art Unit: 2618
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